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<a name="1204406"> </a><font color="#003366" face="Verdana, Arial, Helvetica, sans-serif">12.1 Memory pipelining</font>
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<a name="1204407"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">The ST20-C2 attempts to perform internal computation concurrently with memory reads to the maximum degree permitted by data dependencies between instructions. This minimizes the cycles taken to execute a program.</font>
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<a name="1204408"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">When a read is issued the ST20-C2 marks the target register as "pending from memory" as soon as the memory system accepts the read<a href="#1204705"><sup>1</sup></a> without waiting for the value to be returned. It then proceeds to the next instruction and continues execution until it hits a dependency on the value pending from memory. </font>
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<a name="1204412"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">Where the instruction value is not needed (for example, moving one register to another) the instruction executes "symbolically" by moving or copying the "pending from memory" tag as needed between registers. </font>
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<a name="1204413"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">Where a real dependency occurs (for example, arithmetic operation on the value, or writing back to memory) the ST20-C2 stalls until the memory access completes and a real value is available.</font>
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<a name="1204414"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">Subject to not hitting data dependencies, there may be multiple reads pending at any time.</font>
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<a name="1204415"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">Memory pipelining applies to all memory instructions, not just <strong>ldl</strong>.</font>
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