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<title>2.1 ST20-C2 overview</title>
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<h2>
<a name="1204405"> </a><font color="#003366" face="Verdana, Arial, Helvetica, sans-serif">2.1 ST20-C2 overview</font>
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<a name="1204406"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">The ST20-C2 is a small and efficient 32-bit microprocessor. There are a number of advanced features which enhance this performance.</font>
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<p> <font size=2 face="Verdana, Arial, Helvetica, sans-serif"><li ><a name="1204407"> </a>A trap-handling mechanism provides for error detection and debugging.</font></p>
<p> <font size=2 face="Verdana, Arial, Helvetica, sans-serif"><li ><a name="1204408"> </a>An interrupt system to allow the processor to respond to external signals.</font></p>
<p> <font size=2 face="Verdana, Arial, Helvetica, sans-serif"><li ><a name="1204409"> </a>A workspace cache which allows access to local variables to be overlapped with operations on their values giving effective zero-cycle access.</font></p>
<p> <font size=2 face="Verdana, Arial, Helvetica, sans-serif"><li ><a name="1204410"> </a>An on-chip real-time kernel means that the processor can run many processes concurrently. This can be used by an operating system, or with a language which has a model of concurrency (for example, occam and parallel C).</font></p>
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<a name="1204411"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">The ST20-C2 can efficiently implement a real-time operating system sharing processor time between concurrent processes. The on-chip real-time kernel provides fast context switch times and manages queues of processes at two priorities and handles the pre-emption of low priority activity by high priority.</font>
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<a name="1204412"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">The ST20-C2 is designed around a process model based on the `Communicating Sequential Process' or CSP model of execution (see <a href="conc_pro.htm#1204403"><font color="#0000ff" face="Verdana, Arial, Helvetica, sans-serif"><i>Chapter⌨️ 快捷键说明
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