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<a name="1204476"> </a><font color="#003366" face="Verdana, Arial, Helvetica, sans-serif">12.2 Instruction grouping</font>
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<a name="1204477"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">Instruction grouping combines certain load instructions with the following instruction so that the two are executed together taking only the time of the second instruction in the pair, that is, the load has an effective execution time of 0燾ycles.</font>
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<a name="1204478"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">The precise conditions under which groups are formed are dependent on implementation version and on memory timing conditions, for example, whether the next instructions have been read when the potentially groupable instruction is being examined.</font>
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<a name="1204479"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">A typical implementation forms the following groups:</font>
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<p> <font size=2 face="Verdana, Arial, Helvetica, sans-serif"><li ><a name="1204480"> </a><strong>ldl</strong> (workspace cache hit) + any single byte instruction (except <strong>ldl</strong>),</font></p>
<p> <font size=2 face="Verdana, Arial, Helvetica, sans-serif"><li ><a name="1204481"> </a><strong>ldc</strong> + any single byte instruction (except <strong>ldl</strong>).</font></p>
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<font size=1 face="Verdana, Arial, Helvetica, sans-serif"> © 1997, 2001, 2002, 2003 STMicroelectronics. All Rights Reserved.<br>
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