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<a name="1206682"> </a><font color="#003366" face="Verdana, Arial, Helvetica, sans-serif">7.3 Data caches in internal SRAM</font>
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<a name="1206685"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">On some ST20 devices the memory used by the data cache can be treated as extra internal SRAM if the data cache is not enabled. See your device datasheet for details.</font>
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<a name="1206687"> </a><font size=2 face="Verdana, Arial, Helvetica, sans-serif">On such devices the use of the data cache effectively reduces the amount of internal SRAM available to the application. However, the processor is not prevented from writing to this memory which can cause cache corruption. It is therefore important that the data cache memory is protected from being used by the application by reserving it during the link process. The recommended method of doing this is to call the command procedure "<font size=2 face=Courier><strong>dcache_internal</strong></font>". This automatically reserves the top 2燢bytes of internal memory. For example:</font>
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<a name="1206688"> </a><font size=2 face=Courier><strong>proc sti5500board_dcache {<br>⌨️ 快捷键说明
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