📄 i915_structs.h
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unsigned mip_filter : 2; unsigned base_level : 5; unsigned chromakey_index : 2; unsigned color_conversion : 1; unsigned planar2packet : 1; unsigned reverse_gamma : 1; } ts0; struct { unsigned east_deinterlacer : 1; unsigned map_index : 4; unsigned normalized_coor : 1; unsigned tcz_control : 3; unsigned tcy_control : 3; unsigned tcx_control : 3; unsigned chromakey_enable : 1; unsigned keyed_texture_filter : 1; unsigned kill_pixel : 1; unsigned pad0 : 6; unsigned min_lod : 8; } ts1; struct { unsigned default_color; } ts2;};struct i915_3dstate_sampler_state{ struct { unsigned length : 6; unsigned pad0 : 10; unsigned opcode : 13; unsigned type : 3; } dw0; struct { unsigned sampler_masker : 16; unsigned pad0 : 16; } dw1; /* we always use two samplers for mc */ struct texture_sampler sampler0; struct texture_sampler sampler1;};struct arithmetic_inst{ struct { unsigned pad0 : 2; unsigned src0_reg : 5; unsigned src0_reg_t : 3; unsigned dest_channel_mask : 4; unsigned dest_reg : 4; unsigned pad1 : 1; unsigned dest_reg_t: 3; unsigned dest_saturate : 1; unsigned pad2 : 1; unsigned opcode : 5; unsigned pad3 : 3; } dw0; struct { unsigned src1_y_select : 3; unsigned src1_y_negate : 1; unsigned src1_x_select : 3; unsigned src1_x_negate : 1; unsigned src1_reg : 5; unsigned src1_reg_t : 3; unsigned src0_w_select : 3; unsigned src0_w_negate : 1; unsigned src0_z_select : 3; unsigned src0_z_negate : 1; unsigned src0_y_select : 3; unsigned src0_y_negate : 1; unsigned src0_x_select : 3; unsigned src0_x_negate : 1; } dw1; struct { unsigned src2_w_select : 3; unsigned src2_w_negate : 1; unsigned src2_z_select : 3; unsigned src2_z_negate : 1; unsigned src2_y_select : 3; unsigned src2_y_negate : 1; unsigned src2_x_select : 3; unsigned src2_x_negate : 1; unsigned src2_reg : 5; unsigned src2_reg_t : 3; unsigned src1_w_select : 3; unsigned src1_w_negate : 1; unsigned src1_z_select : 3; unsigned src1_z_negate : 1; } dw2;};struct texture_inst{ struct { unsigned sampler_reg : 4; unsigned pad0 : 10; unsigned dest_reg : 4; unsigned pad1 : 1; unsigned dest_reg_t : 3; unsigned pad2 : 2; unsigned opcode : 5; unsigned pad3 : 3; } dw0; struct { unsigned pad0 : 16; unsigned address_reg : 5; unsigned pad1 : 3; unsigned address_reg_t : 3; unsigned pad2 : 5; } dw1; struct { unsigned pad0; } dw2;};struct declaration_inst{ struct { unsigned pad0 : 10; unsigned decl_channel_mask : 4; unsigned decl_reg : 4; unsigned pad1 : 1; unsigned decl_reg_t : 2; unsigned pad2 : 1; unsigned sampler_type : 2; unsigned opcode : 5; unsigned pad3 : 3; } dw0; struct { unsigned pad0; } dw1; struct { unsigned pad0; } dw2;};union shader_inst { struct arithmetic_inst a; struct texture_inst t; struct declaration_inst d;};struct i915_3dstate_pixel_shader_header { unsigned length : 9; unsigned pad0 : 6; unsigned retain : 1; unsigned opcode : 13; unsigned type : 3;};struct i915_3dstate_pixel_shader_program{ struct i915_3dstate_pixel_shader_header shader0; /* mov oC, c0.0000 */ uint32_t inst0[3]; struct i915_3dstate_pixel_shader_header shader1; /* dcl t0.xy */ /* dcl t1.xy */ /* dcl_2D s0 */ /* texld r0, t0, s0 */ /* mov oC, r0 */ uint32_t inst1[3*5]; struct i915_3dstate_pixel_shader_header shader2; /* dcl t2.xy */ /* dcl t3.xy */ /* dcl_2D s1 */ /* texld r0, t2, s1 */ /* mov oC, r0 */ uint32_t inst2[3*5]; struct i915_3dstate_pixel_shader_header shader3; /* dcl t0.xy */ /* dcl t1.xy */ /* dcl t2.xy */ /* dcl t3.xy */ /* dcl_2D s0 */ /* dcl_2D s1 */ /* texld r0, t0, s0 */ /* texld r0, t2, s1 */ /* add r0, r0, r1*/ /* mov oC, r0 */ uint32_t inst3[3*10];};#define REG_CR0 0x00000001#define REG_CR1 0x00000002#define REG_CR2 0x00000004#define REG_CR3 0x00000008#define REG_CR4 0x00000010#define REG_CR5 0x00000020#define REG_CR6 0x00000040#define REG_CR7 0x00000080#define REG_CR8 0x00000100#define REG_CR9 0x00000200#define REG_CR10 0x00000400#define REG_CR11 0x00000800#define REG_CR12 0x00001000#define REG_CR13 0x00002000#define REG_CR14 0x00004000#define REG_CR15 0x00008000#define REG_CR16 0x00010000#define REG_CR17 0x00020000#define REG_CR18 0x00040000#define REG_CR19 0x00080000#define REG_CR20 0x00100000#define REG_CR21 0x00200000#define REG_CR22 0x00400000#define REG_CR23 0x00800000#define REG_CR24 0x01000000#define REG_CR25 0x02000000#define REG_CR26 0x04000000#define REG_CR27 0x08000000#define REG_CR28 0x10000000#define REG_CR29 0x20000000#define REG_CR30 0x40000000#define REG_CR31 0x80000000struct shader_constant{ float x; float y; float z; float w;};struct i915_3dstate_pixel_shader_constants{ struct { unsigned length : 8; unsigned pad0 : 8; unsigned opcode : 13; unsigned type : 3; } dw0; struct { unsigned reg_mask; } dw1; /* we only need one constant */ struct shader_constant value;};#define BLOCK_SIS 0x01#define BLOCK_DIS 0x02#define BLOCK_SSB 0x04#define BLOCK_MSB 0x08#define BLOCK_PSP 0x10#define BLOCK_PSC 0x20typedef struct _state_ddword{ struct { unsigned valid : 1; unsigned force : 1; unsigned buffer_address : 30; } dw0; struct { unsigned length : 9; unsigned pad0 : 23; } dw1;} sis_state, ssb_state, msb_state, psp_state, psc_state;typedef struct _state_dword{ struct { unsigned valid : 1; unsigned reset : 1; unsigned buffer_address : 30; } dw0;} dis_state;struct i915_3dstate_load_indirect{ struct { unsigned length : 8; unsigned block_mask : 6; unsigned mem_select : 1; unsigned pad0 : 1; unsigned opcode : 13; unsigned type : 3; } dw0;};#define TEXCOORDFMT_2FP 0x00#define TEXCOORDFMT_3FP 0x01#define TEXCOORDFMT_4FP 0x02#define TEXCOORDFMT_1FP 0x03#define TEXCOORDFMT_2FP_16 0x04#define TEXCOORDFMT_4FP_16 0x05#define TEXCOORDFMT_NOT_PRESENT 0x0fstruct s2_dword{ unsigned set0_texcoord_fmt : 4; unsigned set1_texcoord_fmt : 4; unsigned set2_texcoord_fmt : 4; unsigned set3_texcoord_fmt : 4; unsigned set4_texcoord_fmt : 4; unsigned set5_texcoord_fmt : 4; unsigned set6_texcoord_fmt : 4; unsigned set7_texcoord_fmt : 4;};struct s3_dword{ unsigned set0_pcd : 1; unsigned set0_ws_tcz : 1; unsigned set0_ws_tcy : 1; unsigned set0_ws_tcx : 1; unsigned set1_pcd : 1; unsigned set1_ws_tcz : 1; unsigned set1_ws_tcy : 1; unsigned set1_ws_tcx : 1; unsigned set2_pcd : 1; unsigned set2_ws_tcz : 1; unsigned set2_ws_tcy : 1; unsigned set2_ws_tcx : 1; unsigned set3_pcd : 1; unsigned set3_ws_tcz : 1; unsigned set3_ws_tcy : 1; unsigned set3_ws_tcx : 1; unsigned set4_pcd : 1; unsigned set4_ws_tcz : 1; unsigned set4_ws_tcy : 1; unsigned set4_ws_tcx : 1; unsigned set5_pcd : 1; unsigned set5_ws_tcz : 1; unsigned set5_ws_tcy : 1; unsigned set5_ws_tcx : 1; unsigned set6_pcd : 1; unsigned set6_ws_tcz : 1; unsigned set6_ws_tcy : 1; unsigned set6_ws_tcx : 1; unsigned set7_pcd : 1; unsigned set7_ws_tcz : 1; unsigned set7_ws_tcy : 1; unsigned set7_ws_tcx : 1;};#define VERTEXHAS_XYZ 1#define VERTEXHAS_XYZW 2#define VERTEXHAS_XY 3#define VERTEXHAS_XYW 4#define CULLMODE_BOTH 0#define CULLMODE_NONE 1#define CULLMODE_CW 2#define CULLMODE_CCW 3#define SHADEMODE_LINEAR 0#define SHADEMODE_FLAT 1struct s4_dword{ unsigned anti_aliasing_enable : 1; unsigned sprite_point_enable : 1; unsigned fog_parameter_present : 1; unsigned local_depth_offset_enable : 1; unsigned force_specular_diffuse_color : 1; unsigned force_default_diffuse_color : 1; unsigned position_mask : 3; unsigned local_depth_offset_present : 1; unsigned diffuse_color_presetn : 1; unsigned specular_color_fog_factor_present : 1; unsigned point_width_present : 1; unsigned cull_mode : 2; unsigned color_shade_mode : 1; unsigned specular_shade_mode : 1; unsigned fog_shade_mode : 1; unsigned alpha_shade_mode : 1; unsigned line_width : 4; unsigned point_width : 9;};struct s5_dword { unsigned logic_op_enable : 1; unsigned color_dither_enable : 1; unsigned stencil_test_enable : 1; unsigned stencil_buffer_write_enable : 1; unsigned stencil_pass_depth_pass_op : 3; unsigned stencil_pass_depth_fail_op : 3; unsigned stencil_fail_op : 3; unsigned stencil_test_function : 3; unsigned stencil_reference_value : 8; unsigned fog_enable : 1; unsigned global_depth_offset_enable : 1; unsigned last_pixel_enable : 1; unsigned force_default_point_width : 1; unsigned color_buffer_component_write_disable : 4;};struct s6_dword{ unsigned triangle_pv : 2; unsigned color_buffer_write : 1; unsigned depth_buffer_write : 1; unsigned dest_blend_factor : 4; unsigned src_blend_factor : 4; unsigned color_blend_function : 3; unsigned color_buffer_blend : 1; unsigned depth_test_function : 3; unsigned depth_test_enable : 1; unsigned alpha_reference_value : 8; unsigned alpha_test_function : 3; unsigned alpha_test_enable : 1; };struct s7_dword{ unsigned global_depth_offset_const;};struct i915_3dstate_load_state_immediate_1{ struct { unsigned length : 4; unsigned load_s0 : 1; unsigned load_s1 : 1; unsigned load_s2 : 1; unsigned load_s3 : 1; unsigned load_s4 : 1; unsigned load_s5 : 1; unsigned load_s6 : 1; unsigned load_s7 : 1; unsigned pad0 : 4; unsigned opcode : 13; unsigned type : 3; } dw0;};struct i915_3dstate_scissor_rectangle{ struct { unsigned length : 16; unsigned opcode : 13; unsigned type : 3; } dw0; struct { unsigned min_x : 16; unsigned min_y : 16; } dw1; struct { unsigned max_x : 16; unsigned max_y : 16; } dw2;};#define VERTEX_INLINE 0x00#define VERTEX_INDIRECT 0x01#define PRIM_TRILIST 0x00#define PRIM_TRISTRIP 0x01#define PRIM_TRISTRIP_REVERSE 0x02#define PRIM_TRIFAN 0x03#define PRIM_POLYGON 0x04#define PRIM_LINELIST 0x05#define PRIM_LINESTRIP 0x06#define PRIM_RECTLIST 0x07#define PRIM_POINTLIST 0x08#define PRIM_DIB 0x09#define PRIM_CLEAR_RECT 0x0a#define PRIM_ZONE_INIT 0x0dstruct texture_coordinate_set{ unsigned tcx; unsigned tcy;};struct vertex_data{ unsigned x; unsigned y; struct texture_coordinate_set tc0; struct texture_coordinate_set tc1;};struct i915_3dprimitive{ union { struct { unsigned length : 18; unsigned prim : 5; unsigned vertex_location : 1; unsigned opcode : 5; unsigned type : 3; } inline_prim; struct { unsigned vertex_count : 16; unsigned pad0 : 1; unsigned vertex_access_mode : 1; unsigned prim : 5; unsigned vertex_location : 1; unsigned opcode : 5; unsigned type : 3; } indirect_prim; } dw0;};#endif /*_I915_STRUCTS_H */⌨️ 快捷键说明
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