📄 m6809.c
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/*** m6809: Portable 6809 emulator ******************************************
Copyright (C) John Butler 1997
References:
6809 Simulator V09, By L.C. Benschop, Eidnhoven The Netherlands.
m6809: Portable 6809 emulator, DS (6809 code in MAME, derived from
the 6809 Simulator V09)
6809 Microcomputer Programming & Interfacing with Experiments"
by Andrew C. Staugaard, Jr.; Howard W. Sams & Co., Inc.
System dependencies: word must be 16 bit unsigned int
byte must be 8 bit unsigned int
long must be more than 16 bits
arrays up to 65536 bytes must be supported
machine must be twos complement
*****************************************************************************/
#include <stdio.h>
#include <stdlib.h>
#include "M6809.h"
#include "driver.h"
INLINE byte fetch_effective_address( void );
/* 6809 registers */
static byte cc,dpreg,unused1,unused2;
static union {
#ifdef LSB_FIRST
struct {byte l,h,h2,h3;} b;
struct {word w1,w2;} w;
#else
struct {byte h3,h2,h,l;} b;
struct {word w2,w1;} w;
#endif
}dbreg;
#define areg (dbreg.b.h)
#define breg (dbreg.b.l)
static word xreg,yreg,ureg,sreg,pcreg;
static word eaddr; /* effective address */
static int pending_interrupts; /* NS 970908 */
/* public globals */
int m6809_ICount=50000;
int m6809_Flags; /* flags for speed optimization */
int m6809_slapstic;
/* flag, handlers for speed optimization */
static int (*rd_u_handler)(int);
static int (*rd_u_handler_wd)(int);
static int (*rd_s_handler)(int);
static int (*rd_s_handler_wd)(int);
static void (*wr_u_handler)(int,int);
static void (*wr_u_handler_wd)(int,int);
static void (*wr_s_handler)(int,int);
static void (*wr_s_handler_wd)(int,int);
/* these are re-defined in m6809.h TO RAM, ROM or functions in cpuintrf.c */
#define M_RDMEM(A) M6809_RDMEM(A)
#define M_WRMEM(A,V) M6809_WRMEM(A,V)
#define M_RDOP(A) M6809_RDOP(A)
#define M_RDOP_ARG(A) M6809_RDOP_ARG(A)
/* macros to access memory */
#define IMMBYTE(b) {b = M_RDOP_ARG(pcreg++);}
#define IMMWORD(w) {w = (M_RDOP_ARG(pcreg)<<8) + M_RDOP_ARG(pcreg+1); pcreg+=2;}
#define PUSHBYTE(b) {--sreg;(*wr_s_handler)(sreg,(b));}
#define PUSHWORD(w) {sreg-=2;(*wr_s_handler_wd)(sreg,(w));}
#define PULLBYTE(b) {b=(*rd_s_handler)(sreg);sreg++;}
#define PULLWORD(w) {w=(*rd_s_handler_wd)(sreg);sreg+=2;}
#define PSHUBYTE(b) {--ureg;(*wr_u_handler)(ureg,(b));}
#define PSHUWORD(w) {ureg-=2;(*wr_u_handler_wd)(ureg,(w));}
#define PULUBYTE(b) {b=(*rd_u_handler)(ureg);ureg++;}
#define PULUWORD(w) {w=(*rd_u_handler_wd)(ureg);ureg+=2;}
/* CC masks H NZVC
7654 3210 */
#define CLR_HNZVC cc&=0xd0
#define CLR_NZV cc&=0xf1
#define CLR_HNZC cc&=0xd2
#define CLR_NZVC cc&=0xf0
#define CLR_Z cc&=0xfb
#define CLR_NZC cc&=0xf2
#define CLR_ZC cc&=0xfa
/* macros for CC -- CC bits affected should be reset before calling */
#define SET_Z(a) if(!a)SEZ
#define SET_Z8(a) SET_Z((byte)a)
#define SET_Z16(a) SET_Z((word)a)
#define SET_N8(a) cc|=((a&0x80)>>4)
#define SET_N16(a) cc|=((a&0x8000)>>12)
#define SET_H(a,b,r) cc|=(((a^b^r)&0x10)<<1)
#define SET_C8(a) cc|=((a&0x100)>>8)
#define SET_C16(a) cc|=((a&0x10000)>>16)
#define SET_V8(a,b,r) cc|=(((a^b^r^(r>>1))&0x80)>>6)
#define SET_V16(a,b,r) cc|=(((a^b^r^(r>>1))&0x8000)>>14)
static byte flags8i[256]= /* increment */
{
0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x0a,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08
};
static byte flags8d[256]= /* decrement */
{
0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,
0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08,0x08
};
#define SET_FLAGS8I(a) {cc|=flags8i[(a)&0xff];}
#define SET_FLAGS8D(a) {cc|=flags8d[(a)&0xff];}
/* combos */
#define SET_NZ8(a) {SET_N8(a);SET_Z(a);}
#define SET_NZ16(a) {SET_N16(a);SET_Z(a);}
#define SET_FLAGS8(a,b,r) {SET_N8(r);SET_Z8(r);SET_V8(a,b,r);SET_C8(r);}
#define SET_FLAGS16(a,b,r) {SET_N16(r);SET_Z16(r);SET_V16(a,b,r);SET_C16(r);}
/* for treating an unsigned byte as a signed word */
#define SIGNED(b) ((word)(b&0x80?b|0xff00:b))
/* macros to access dreg */
#define GETDREG (dbreg.w.w1)
#define SETDREG(n) {dbreg.w.w1=n;}
/* macros for addressing modes (postbytes have their own code) */
#define DIRECT {IMMBYTE(eaddr);eaddr|=(dpreg<<8);}
#define IMM8 eaddr=pcreg++
#define IMM16 {eaddr=pcreg;pcreg+=2;}
#define EXTENDED IMMWORD(eaddr)
/* macros to set status flags */
#define SEC cc|=0x01
#define CLC cc&=0xfe
#define SEZ cc|=0x04
#define CLZ cc&=0xfb
#define SEN cc|=0x08
#define CLN cc&=0xf7
#define SEV cc|=0x02
#define CLV cc&=0xfd
#define SEH cc|=0x20
#define CLH cc&=0xdf
/* macros for convenience */
#define DIRBYTE(b) {DIRECT;b=M_RDMEM(eaddr);}
#define DIRWORD(w) {DIRECT;w=M_RDMEM_WORD(eaddr);}
#define EXTBYTE(b) {EXTENDED;b=M_RDMEM(eaddr);}
#define EXTWORD(w) {EXTENDED;w=M_RDMEM_WORD(eaddr);}
/* macros for branch instructions */
#define BRANCH(f) {IMMBYTE(t);if(f){pcreg+=SIGNED(t);change_pc(pcreg);}} /* TS 971002 */
#define LBRANCH(f) {IMMWORD(t);if(f){pcreg+=t;change_pc(pcreg);}} /* TS 971002 */
#define NXORV ((cc&0x08)^((cc&0x02)<<2))
/* macros for setting/getting registers in TFR/EXG instructions */
#define GETREG(val,reg) switch(reg) {\
case 0: val=GETDREG;break;\
case 1: val=xreg;break;\
case 2: val=yreg;break;\
case 3: val=ureg;break;\
case 4: val=sreg;break;\
case 5: val=pcreg;break;\
case 8: val=areg;break;\
case 9: val=breg;break;\
case 10: val=cc;break;\
case 11: val=dpreg;break;}
#define SETREG(val,reg) switch(reg) {\
case 0: SETDREG(val); break;\
case 1: xreg=val;break;\
case 2: yreg=val;break;\
case 3: ureg=val;break;\
case 4: sreg=val;break;\
case 5: pcreg=val;change_pc(pcreg);break; /* TS 971002 */ \
case 8: areg=val;break;\
case 9: breg=val;break;\
case 10: cc=val;break;\
case 11: dpreg=val;break;}
#define EOP 0xff /* 0xff = extend op code */
#define E 0x80 /* 0x80 = fetch effective address */
/* timings for 1-byte opcodes */
static unsigned char cycles1[] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/*0*/ 6, 0, 0, 6, 6, 0, 6, 6, 6, 6, 6, 0, 6, 6, 3, 6,
/*1*/ 255,255, 2, 2, 0, 0, 5, 9, 0, 2, 3, 0, 3, 2, 8, 6,
/*2*/ 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
/*3*/ E+4,E+4,E+4,E+4, 5, 5, 5, 5, 0, 5, 3, 6, 0, 11, 0, 19,
/*4*/ 2, 0, 0, 2, 2, 0, 2, 2, 2, 2, 2, 0, 2, 2, 0, 2,
/*5*/ 2, 0, 0, 2, 2, 0, 2, 2, 2, 2, 2, 0, 2, 2, 0, 2,
/*6*/ E+6,E+0,E+0,E+6,E+6,E+0,E+6,E+6,E+6,E+6,E+6,E+0,E+6,E+6,E+3,E+6,
/*7*/ 7, 0, 0, 7, 7, 0, 7, 7, 7, 7, 7, 0, 7, 7, 4, 7,
/*8*/ 2, 2, 2, 4, 2, 2, 2, 2, 2, 2, 2, 2, 4, 7, 3, 0,
/*9*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 6, 7, 5, 5,
/*A*/ E+4,E+4,E+4,E+6,E+4,E+4,E+4,E+4,E+4,E+4,E+4,E+4,E+6,E+7,E+5,E+5,
/*B*/ 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 5, 7, 8, 6, 6,
/*C*/ 2, 2, 2, 4, 2, 2, 2, 2, 2, 2, 2, 2, 3, 0, 3, 3,
/*D*/ 4, 4, 4, 6, 4, 4, 4, 4, 4, 4, 4, 4, 5, 5, 5, 5,
/*E*/ E+4,E+4,E+4,E+6,E+4,E+4,E+4,E+4,E+4,E+4,E+4,E+4,E+5,E+5,E+5,E+5,
/*F*/ 5, 5, 5, 7, 5, 5, 5, 5, 5, 5, 5, 5, 6, 6, 6, 6
};
/* timings for 2-byte opcodes */
static unsigned char cycles2[] =
{
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/*0*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/*1*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/*2*/ 0, 5, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6,
/*3*/ E+0,E+0,E+0,E+0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 20,
/*4*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/*5*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/*6*/ E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,
/*7*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
/*8*/ 0, 0, 0, 5, 0, 0, 0, 0, 0, 0, 0, 0, 5, 0, 4, 0,
/*9*/ 0, 0, 0, 7, 0, 0, 0, 0, 0, 0, 0, 0, 7, 0, 6, 6,
/*A*/ E+0,E+0,E+0,E+7,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+7,E+0,E+6,E+6,
/*B*/ 0, 0, 0, 8, 0, 0, 0, 0, 0, 0, 0, 0, 8, 0, 7, 7,
/*C*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4, 0,
/*D*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 6, 6,
/*E*/ E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+0,E+6,E+6,
/*F*/ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 7, 7
};
#undef EOP
#undef E
static int rd_slow( int addr )
{
return M_RDMEM(addr);
}
static int rd_slow_wd( int addr )
{
return( (M_RDMEM(addr)<<8) | (M_RDMEM((addr+1)&0xffff)) );
}
static int rd_fast( int addr )
{
extern unsigned char *RAM;
return RAM[addr];
}
static int rd_fast_wd( int addr )
{
extern unsigned char *RAM;
return( (RAM[addr]<<8) | (RAM[(addr+1)&0xffff]) );
}
static void wr_slow( int addr, int v )
{
M_WRMEM(addr,v);
}
static void wr_slow_wd( int addr, int v )
{
M_WRMEM(addr,v>>8);
M_WRMEM(((addr)+1)&0xFFFF,v&255);
}
static void wr_fast( int addr, int v )
{
extern unsigned char *RAM;
RAM[addr] = v;
}
static void wr_fast_wd( int addr, int v )
{
extern unsigned char *RAM;
RAM[addr] = v>>8;
RAM[(addr+1)&0xffff] = v&255;
}
INLINE unsigned M_RDMEM_WORD (dword A)
{
int i;
i = M_RDMEM(A)<<8;
i |= M_RDMEM(((A)+1)&0xFFFF);
return i;
}
INLINE void M_WRMEM_WORD (dword A,word V)
{
M_WRMEM (A,V>>8);
M_WRMEM (((A)+1)&0xFFFF,V&255);
}
/****************************************************************************/
/* Set all registers to given values */
/****************************************************************************/
void m6809_SetRegs(m6809_Regs *Regs)
{
pcreg = Regs->pc;change_pc(pcreg); /* TS 971002 */
ureg = Regs->u;
sreg = Regs->s;
xreg = Regs->x;
yreg = Regs->y;
dpreg = Regs->dp;
areg = Regs->a;
breg = Regs->b;
cc = Regs->cc;
pending_interrupts = Regs->pending_interrupts; /* NS 970908 */
}
/****************************************************************************/
/* Get all registers in given buffer */
/****************************************************************************/
void m6809_GetRegs(m6809_Regs *Regs)
{
Regs->pc = pcreg;
Regs->u = ureg;
Regs->s = sreg;
Regs->x = xreg;
Regs->y = yreg;
Regs->dp = dpreg;
Regs->a = areg;
Regs->b = breg;
Regs->cc = cc;
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