📄 nemesis.c
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/***************************************************************************
Nemesis preliminary :
0x00000 - 0x3ffff ROM
0x40000 - 0x4ffff character RAM + Obj ram
scroll value is the same for every line in nemesis
0x50000 - 0x501ff scroll index per line layer 1 (low byte)
0x50200 - 0x503ff scroll index per line layer 1 (hi byte)
0x50400 - 0x505ff scroll index per line layer 2 (low byte)
0x50600 - 0x507ff scroll index per line layer 2 (hi byte)
0x50800 - 0x50fff ??????
0x52000 - 0x52fff screen RAM 1
0x53000 - 0x53fff screen RAM 2
0x54000 - 0x54fff color ram 1
0x55000 - 0x55fff color ram 2
0x56000 - 0x56fff sprite RAM
0x5c401
0x5c403
0x5cc01
0x5cc03
0x5cc05
0x5cc07
0x5c801 (watchdog ???)
0x5a000 - 0x5afff pallette RAM
***************************************************************************/
#include "driver.h"
#include "vidhrdw/generic.h"
static unsigned char *ram;
extern unsigned char *nemesis_videoram1;
extern unsigned char *nemesis_videoram2;
extern unsigned char *nemesis_characterram;
extern unsigned char *nemesis_xscroll1,*nemesis_xscroll2, *nemesis_yscroll;
extern int nemesis_characterram_size;
int nemesis_videoram1_r(int offset);
void nemesis_videoram1_w(int offset,int data);
int nemesis_videoram2_r(int offset);
void nemesis_videoram2_w(int offset,int data);
int nemesis_characterram_r(int offset);
void nemesis_characterram_w(int offset,int data);
void nemesis_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
int nemesis_vh_start(void);
void nemesis_vh_stop(void);
void salamand_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
void nemesis_init_machine(void);
int irq_on = 0;
int irq1_on = 0;
int irq2_on = 0;
int irq4_on = 0;
void nemesis_init_machine(void)
{
irq_on = 0;
irq1_on = 0;
irq2_on = 0;
irq4_on = 0;
}
int nemesis_interrupt(void)
{
if (irq_on) return 1;
return 0;
}
int konamigt_interrupt(void)
{
if (cpu_getiloops() == 0)
{
if (irq_on) return 1;
}
else
{
if (irq2_on) return 2;
}
return 0;
}
int gx400_interrupt(void)
{
switch (cpu_getiloops())
{
case 0:
if (irq1_on) return 1;
break;
case 1:
if (irq2_on) return 2;
break;
case 2:
if (irq4_on) return 4;
break;
}
return 0;
}
void gx400_irq1_enable_w(int offset,int data)
{
if ((data & 0x00ff0000) == 0)
irq1_on = data & 0x0001;
}
void gx400_irq2_enable_w(int offset,int data)
{
if ((data & 0x00ff0000) == 0)
irq2_on = data & 0x0001;
}
void gx400_irq4_enable_w(int offset,int data)
{
if ((data & 0xff000000) == 0)
irq4_on = data & 0x0100;
}
static unsigned char *gx400_shared_ram;
int gx400_sharedram_nosoundfix_r(int offset)
{
return 2;
}
int gx400_sharedram_r(int offset)
{
return gx400_shared_ram[offset / 2];
}
void gx400_sharedram_w(int offset,int data)
{
gx400_shared_ram[offset / 2] = data;
}
int salamand_interrupt(void)
{
if (irq_on)
return(1);
else
return(0);
}
void nemesis_irq_enable_w(int offset,int data)
{
irq_on = data & 0xff;
}
void konamigt_irq_enable_w(int offset,int data)
{
if ((data & 0x00ff0000) == 0)
{
irq_on = data & 0xff;
}
}
void konamigt_irq2_enable_w(int offset,int data)
{
if ((data & 0x00ff0000) == 0)
{
irq2_on = data & 0xff;
}
}
int konamigt_input_r(int offset)
{
int data=readinputport(1);
int data2=readinputport(6);
int ret=0;
if(data&0x10) ret|=0x0800;
if(data&0x80) ret|=0x0400;
if(data&0x20) ret|=0x0300;
if(data&0x40) ret|=0xf000;
ret|=data2&0x7f;
return ret;
}
void nemesis_soundlatch_w (int offset, int data)
{
soundlatch_w(offset,data & 0xff);
/* the IRQ should probably be generated by 5e004, but we'll handle it here for now */
cpu_cause_interrupt(1,0xff);
}
static int nemesis_portA_r(int offset)
{
#define TIMER_RATE 1024
return cpu_gettotalcycles() / TIMER_RATE;
}
static struct MemoryReadAddress readmem[] =
{
{ 0x000000, 0x03ffff, MRA_ROM },
{ 0x040000, 0x04ffff, nemesis_characterram_r },
{ 0x050000, 0x0503ff, MRA_BANK1 },
{ 0x050400, 0x0507ff, MRA_BANK2 },
{ 0x050800, 0x050bff, MRA_BANK3 },
{ 0x050c00, 0x050fff, MRA_BANK4 },
{ 0x052000, 0x053fff, nemesis_videoram1_r },
{ 0x054000, 0x055fff, nemesis_videoram2_r },
{ 0x056000, 0x056fff, MRA_BANK5 },
{ 0x05a000, 0x05afff, paletteram_word_r },
{ 0x05c400, 0x05c401, input_port_4_r }, /* DSW0 */
{ 0x05c402, 0x05c403, input_port_5_r }, /* DSW1 */
{ 0x05cc00, 0x05cc01, input_port_0_r }, /* IN0 */
{ 0x05cc02, 0x05cc03, input_port_1_r }, /* IN1 */
{ 0x05cc04, 0x05cc05, input_port_2_r }, /* IN2 */
{ 0x05cc06, 0x05cc07, input_port_3_r }, /* TEST */
{ 0x060000, 0x067fff, MRA_BANK6 },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress writemem[] =
{
{ 0x000000, 0x03ffff, MWA_ROM }, /* ROM */
{ 0x040000, 0x04ffff, nemesis_characterram_w, &nemesis_characterram, &nemesis_characterram_size },
{ 0x050000, 0x0503ff, MWA_BANK1, &nemesis_xscroll1 },
{ 0x050400, 0x0507ff, MWA_BANK2, &nemesis_xscroll2 },
{ 0x050800, 0x050bff, MWA_BANK3 },
{ 0x050c00, 0x050fff, MWA_BANK4, &nemesis_yscroll },
{ 0x051000, 0x051fff, MWA_NOP }, /* used, but written to with 0's */
{ 0x052000, 0x053fff, nemesis_videoram1_w, &nemesis_videoram1 }, /* VRAM 1 */
{ 0x054000, 0x055fff, nemesis_videoram2_w, &nemesis_videoram2 }, /* VRAM 2 */
{ 0x056000, 0x056fff, MWA_BANK5, &spriteram, &spriteram_size },
{ 0x05a000, 0x05afff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
{ 0x05c000, 0x05c001, nemesis_soundlatch_w },
{ 0x05c800, 0x05c801, watchdog_reset_w }, /* probably */
{ 0x05e000, 0x05e001, &nemesis_irq_enable_w }, /* Nemesis */
{ 0x05e002, 0x05e003, &nemesis_irq_enable_w }, /* Konami GT */
{ 0x05e004, 0x05e005, MWA_NOP}, /* bit 8 of the word probably triggers IRQ on sound board */
{ 0x060000, 0x067fff, MWA_BANK6, &ram }, /* WORK RAM */
{ -1 } /* end of table */
};
static struct MemoryReadAddress sound_readmem[] =
{
{ 0x0000, 0x3fff, MRA_ROM },
{ 0x4000, 0x47ff, MRA_RAM },
{ 0xe001, 0xe001, soundlatch_r },
{ 0xe086, 0xe086, AY8910_read_port_0_r },
{ 0xe205, 0xe205, AY8910_read_port_1_r },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress sound_writemem[] =
{
{ 0x0000, 0x3fff, MWA_ROM },
{ 0x4000, 0x47ff, MWA_RAM },
{ 0xe006, 0xe006, AY8910_control_port_0_w },
{ 0xe106, 0xe106, AY8910_write_port_0_w },
{ 0xe005, 0xe005, AY8910_control_port_1_w },
{ 0xe405, 0xe405, AY8910_write_port_1_w },
{ -1 } /* end of table */
};
static struct MemoryReadAddress konamigt_readmem[] =
{
{ 0x000000, 0x03ffff, MRA_ROM },
{ 0x040000, 0x04ffff, nemesis_characterram_r },
{ 0x050000, 0x0503ff, MRA_BANK1 },
{ 0x050400, 0x0507ff, MRA_BANK2 },
{ 0x050800, 0x050bff, MRA_BANK3 },
{ 0x050c00, 0x050fff, MRA_BANK4 },
{ 0x052000, 0x053fff, nemesis_videoram1_r },
{ 0x054000, 0x055fff, nemesis_videoram2_r },
{ 0x056000, 0x056fff, MRA_BANK5 },
{ 0x05a000, 0x05afff, paletteram_word_r },
{ 0x05c400, 0x05c401, input_port_4_r }, /* DSW0 */
{ 0x05c402, 0x05c403, input_port_5_r }, /* DSW1 */
{ 0x05cc00, 0x05cc01, input_port_0_r }, /* IN0 */
{ 0x05cc02, 0x05cc03, input_port_1_r }, /* IN1 */
{ 0x05cc04, 0x05cc05, input_port_2_r }, /* IN2 */
{ 0x05cc06, 0x05cc07, input_port_3_r }, /* TEST */
{ 0x060000, 0x067fff, MRA_BANK6 },
{ 0x070000, 0x070001, konamigt_input_r },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress konamigt_writemem[] =
{
{ 0x000000, 0x03ffff, MWA_ROM }, /* ROM */
{ 0x040000, 0x04ffff, nemesis_characterram_w, &nemesis_characterram, &nemesis_characterram_size },
{ 0x050000, 0x0503ff, MWA_BANK1, &nemesis_xscroll1 },
{ 0x050400, 0x0507ff, MWA_BANK2, &nemesis_xscroll2 },
{ 0x050800, 0x050bff, MWA_BANK3 },
{ 0x050c00, 0x050fff, MWA_BANK4, &nemesis_yscroll },
{ 0x051000, 0x051fff, MWA_NOP }, /* used, but written to with 0's */
{ 0x052000, 0x053fff, nemesis_videoram1_w, &nemesis_videoram1 }, /* VRAM 1 */
{ 0x054000, 0x055fff, nemesis_videoram2_w, &nemesis_videoram2 }, /* VRAM 2 */
{ 0x056000, 0x056fff, MWA_BANK5, &spriteram, &spriteram_size },
{ 0x05a000, 0x05afff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
{ 0x05c000, 0x05c001, nemesis_soundlatch_w },
{ 0x05c800, 0x05c801, watchdog_reset_w }, /* probably */
{ 0x05e000, 0x05e001, &konamigt_irq2_enable_w },
{ 0x05e002, 0x05e003, &konamigt_irq_enable_w },
{ 0x05e004, 0x05e005, MWA_NOP}, /* bit 8 of the word probably triggers IRQ on sound board */
{ 0x060000, 0x067fff, MWA_BANK6, &ram }, /* WORK RAM */
{ -1 } /* end of table */
};
static struct MemoryReadAddress gx400_readmem[] =
{
{ 0x000000, 0x00ffff, MRA_ROM },
{ 0x010000, 0x01ffff, MRA_RAM },
{ 0x020000, 0x027ff9, gx400_sharedram_r },
{ 0x027ffa, 0x027fff, gx400_sharedram_nosoundfix_r },
{ 0x030000, 0x03ffff, nemesis_characterram_r },
{ 0x050000, 0x0503ff, MRA_RAM },
{ 0x050400, 0x0507ff, MRA_RAM },
{ 0x050800, 0x050bff, MRA_RAM },
{ 0x050c00, 0x050fff, MRA_RAM },
{ 0x052000, 0x053fff, nemesis_videoram1_r },
{ 0x054000, 0x055fff, nemesis_videoram2_r },
{ 0x056000, 0x056fff, MRA_RAM },
{ 0x057000, 0x057fff, MRA_RAM },
{ 0x05a000, 0x05afff, paletteram_word_r },
{ 0x05c402, 0x05c403, input_port_4_r }, /* DSW0 */
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