📄 eprom.c
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/***************************************************************************
EPRoM Memory Map
----------------
EPRoM 68010 MEMORY MAP
Program ROM 000000-05FFFF R D15-D0
Program ROM shared 060000-07FFFF R D15-D0
Program ROM 080000-09FFFF R D15-D0
EEPROM 0E0001-0E0FFF R/W D7-D0 (odd bytes only)
Program RAM 160000-16FFFF R/W D15-D0
UNLOCK EEPROM 1Fxxxx W
Player 1 Input (left) 260000 R D11-D8 Active lo
Player 2 Input (right) 260010 R D11-D8 Active lo
D8: start
D9: fire
D10: spare
D11: duck
VBLANK 260010 R D0 Active lo
Self-test R D1 Active lo
Input buffer full (@260030) R D2 Active lo
Output buffer full (@360030) R D3 Active lo
ADEOC, end of conversion R D4 Active hi
ADC0, analog port 260020 R D0-D7
ADC1 260022 R D0-D7
ADC2 260024 R D0-D7
ADC3 260026 R D0-D7
Read sound processor 260030 R D0-D7
Watch Dog 2E0000 W xx (128 msec. timeout)
VBLANK Interrupt ack. 360000 W xx
Video off 360010 W D5 (active hi)
Video intensity W D1-D4 (0=full on)
EXTRA cpu reset W D0 (lo to reset)
Sound processor reset 360020 W xx
Write sound processor 360030 W D0-D7
Color RAM Alpha 3E0000-3E01FF R/W D15-D0
Color RAM Motion Object 3E0200-3E03FF R/W D15-D0
Color RAM Playfield 3E0400-3E07FE R/W D15-D0
Color RAM STAIN 3E0800-3E0FFE R/W D15-D0
Playfield Picture RAM 3F0000-3F1FFF R/W D15-D0
Motion Object RAM 3F2000-3F3FFF R/W D15-D0
Alphanumerics RAM 3F4000-3F4EFF R/W D15-D0
Scroll and MOB config 3F4F00-3F4F70 R/W D15-D0
SLIP pointers 3F4F80-3F4FFF R/W D9-D0
Working RAM 3F5000-3F7FFF R/W D15-D0
Playfield palette RAM 3F8000-3F9FFF R/W D11-D8
-----------------------------------------------------------
EPRoM EXTRA 68010 MEMORY MAP
Program ROM 000000-05FFFF R D15-D0
Program ROM shared 060000-07FFFF R D15-D0
Program RAM 160000-16FFFF R/W D15-D0
Player 1 Input (left) 260000 R D11-D8 Active lo
Player 2 Input (right) 260010 R D11-D8 Active lo
D8: start
D9: fire
D10: spare
D11: duck
VBLANK 260010 R D0 Active lo
Self-test R D1 Active lo
Input buffer full (@260030) R D2 Active lo
Output buffer full (@360030) R D3 Active lo
ADEOC, end of conversion R D4 Active hi
ADC0, analog port 260020 R D0-D7
ADC1 260022 R D0-D7
ADC2 260024 R D0-D7
ADC3 260026 R D0-D7
Read sound processor 260030 R D0-D7
VBLANK Interrupt ack. 360000 W xx
Video off 360010 W D5 (active hi)
Video intensity W D1-D4 (0=full on)
EXTRA cpu reset W D0 (lo to reset)
Sound processor reset 360020 W xx
Write sound processor 360030 W D0-D7
****************************************************************************/
#include "driver.h"
#include "machine/atarigen.h"
#include "vidhrdw/generic.h"
#include "sndhrdw/adpcm.h"
extern unsigned char *eprom_playfieldpalram;
extern int eprom_playfieldpalram_size;
int eprom_playfieldram_r (int offset);
int eprom_playfieldpalram_r (int offset);
void eprom_latch_w (int offset, int data);
void eprom_playfieldram_w (int offset, int data);
void eprom_playfieldpalram_w (int offset, int data);
int eprom_interrupt (void);
void eprom_init_machine (void);
int eprom_vh_start (void);
void eprom_vh_stop (void);
void eprom_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
int eprom_update_display_list (int scanline);
/*************************************
*
* Misc. functions
*
*************************************/
static void eprom_soundint (void)
{
cpu_cause_interrupt (0, 6);
}
void eprom_init_machine (void)
{
atarigen_init_machine (eprom_soundint, 0);
}
int eprom_input_r (int offset)
{
int result;
if (offset & 0x10)
{
result = input_port_2_r (offset) + (input_port_1_r (offset) << 8);
if (atarigen_sound_to_cpu_ready) result ^= 0x04;
if (atarigen_cpu_to_sound_ready) result ^= 0x08;
result ^= 0x10;
}
else
result = 0xff + (input_port_0_r (offset) << 8);
return result;
}
int eprom_adc_r (int offset)
{
static int last_offset;
int result = readinputport (3 + ((last_offset / 2) & 3)) | 0xff00;
last_offset = offset;
return result;
}
void eprom_update (int param)
{
/* update the display list */
int yscroll = eprom_update_display_list (param);
/* reset the timer */
if (!param)
{
int next = 8 - (yscroll & 7);
timer_set (cpu_getscanlineperiod () * (double)next, next, eprom_update);
}
else if (param < 240)
timer_set (cpu_getscanlineperiod () * 8.0, param + 8, eprom_update);
}
int eprom_interrupt (void)
{
timer_set (TIME_IN_USEC (Machine->drv->vblank_duration), 0, eprom_update);
return 4;
}
int eprom_extra_interrupt (void)
{
return 4;
}
int eprom_sound_interrupt (void)
{
return interrupt ();
}
void eprom_sound_reset_w (int offset, int data)
{
atarigen_sound_reset ();
}
int eprom_6502_switch_r (int offset)
{
int temp = input_port_7_r (offset);
if (!(input_port_2_r (offset) & 0x02)) temp ^= 0x80;
if (atarigen_cpu_to_sound_ready) temp ^= 0x40;
if (atarigen_sound_to_cpu_ready) temp ^= 0x20;
if (tms5220_ready_r ()) temp ^= 0x10;
return temp;
}
static int speech_val;
void eprom_tms5220_w (int offset, int data)
{
speech_val = data;
}
static int last_ctl;
void eprom_6502_ctl_w (int offset, int data)
{
unsigned char *RAM = Machine->memory_region[Machine->drv->cpu[1].memory_region];
if (((data ^ last_ctl) & 0x02) && (data & 0x02))
tms5220_data_w (0, speech_val);
last_ctl = data;
cpu_setbank (8, &RAM[0x10000 + 0x1000 * ((data >> 6) & 3)]);
}
unsigned char *eprom_sync;
int eprom_sync_r (int offset)
{
return READ_WORD (&eprom_sync[offset]);
}
void eprom_sync_w (int offset, int data)
{
int oldword = READ_WORD (&eprom_sync[offset]);
int newword = COMBINE_WORD (oldword, data);
WRITE_WORD (&eprom_sync[offset], newword);
if ((oldword & 0xff00) != (newword & 0xff00))
cpu_yield ();
}
void eprom_vblank_ack_w (int offset, int data)
{
cpu_clear_pending_interrupts (0);
cpu_clear_pending_interrupts (2);
}
/*************************************
*
* Main CPU memory handlers
*
*************************************/
static struct MemoryReadAddress eprom_readmem[] =
{
{ 0x000000, 0x09ffff, MRA_ROM },
{ 0x0e0000, 0x0e0fff, atarigen_eeprom_r },
{ 0x16cc00, 0x16cc01, eprom_sync_r },
{ 0x160000, 0x16ffff, MRA_BANK1 },
{ 0x260000, 0x26001f, eprom_input_r },
{ 0x260020, 0x26002f, eprom_adc_r },
{ 0x260030, 0x260033, atarigen_sound_r },
{ 0x3e0000, 0x3e0fff, paletteram_word_r },
{ 0x3f0000, 0x3f1fff, eprom_playfieldram_r },
{ 0x3f2000, 0x3f3fff, MRA_BANK3 },
{ 0x3f4000, 0x3f4fff, MRA_BANK4 },
{ 0x3f5000, 0x3f7fff, MRA_BANK5 },
{ 0x3f8000, 0x3f9fff, eprom_playfieldpalram_r },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress eprom_writemem[] =
{
{ 0x000000, 0x09ffff, MWA_ROM },
{ 0x0e0000, 0x0e0fff, atarigen_eeprom_w, &atarigen_eeprom, &atarigen_eeprom_size },
{ 0x16cc00, 0x16cc01, eprom_sync_w, &eprom_sync },
{ 0x160000, 0x16ffff, MWA_BANK1 },
{ 0x1f0000, 0x1fffff, atarigen_eeprom_enable_w },
/* { 0x2e0000, 0x2e0003, watchdog_reset_w },*/
{ 0x2e0000, 0x2e0003, MWA_NOP },
{ 0x360000, 0x360003, eprom_vblank_ack_w },
{ 0x360010, 0x360013, eprom_latch_w },
{ 0x360020, 0x360023, eprom_sound_reset_w },
{ 0x360030, 0x360033, atarigen_sound_w },
{ 0x3e0000, 0x3e0fff, paletteram_IIIIRRRRGGGGBBBB_word_w, &paletteram },
{ 0x3f0000, 0x3f1fff, eprom_playfieldram_w, &atarigen_playfieldram, &atarigen_playfieldram_size },
{ 0x3f2000, 0x3f3fff, MWA_BANK3, &atarigen_spriteram, &atarigen_spriteram_size },
{ 0x3f4000, 0x3f4fff, MWA_BANK4, &atarigen_alpharam, &atarigen_alpharam_size },
{ 0x3f5000, 0x3f7fff, MWA_BANK5 },
{ 0x3f8000, 0x3f9fff, eprom_playfieldpalram_w, &eprom_playfieldpalram, &eprom_playfieldpalram_size },
{ -1 } /* end of table */
};
/*************************************
*
* Sound CPU memory handlers
*
*************************************/
static struct MemoryReadAddress eprom_sound_readmem[] =
{
{ 0x0000, 0x1fff, MRA_RAM },
{ 0x2000, 0x2001, YM2151_status_port_0_r },
{ 0x280a, 0x280a, atarigen_6502_sound_r },
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