📄 dec0.c
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/***************************************************************************
Data East 16 bit games - Bryan McPhail, mish@tendril.force9.net
This file contains drivers for:
* Heavy Barrel (USA set)
* Heavy Barrel (Japanese set)
* Bad Dudes vs Dragonninja (USA set)
* Dragonninja (Japanese version of above)
* Robocop (Japanese pirate rom set)
* Hippodrome (USA set)
* Fighting Fantasy (Japanese version of above)
* Sly Spy (USA set)
* Midnight Resistance (USA set)
* Midnight Resistance (Japanese set)
To do:
Add Robocop (Japanese original & 2nd bootleg set), Secret Agent (Sly Spy bootleg).
Birdie Try runs on this hardware, roms are needed.
Sprite/background priority in boat stage of Sly Spy & forest level of Bad
Dudes, current drivers MAY be correct (Sly Spy is certainly wrong), we
need real boards to check against.
Figure out weapon placement in Heavy Barrel.
Notes:
Missing scroll field in Hippodrome
Hippodrome can crash if you fight 'Serpent' enemy
Weapon placement in Heavy Barrel is still wrong.
No sound in Sly Spy or MidRes, they use a custom Deco processor. It is a
surface mounted 80-pin chip and appears to be HU6820 compatible.
This chip is used for the backgrounds in Hippodrome, the main cpu in Bloody
Wolf/Battle Ranger, and for sound in Caveman Ninja, Captain America, Dark Seal etc.
Thanks to Gouky & Richard Bush for information along the way, especially
Gouky's patch for Bad Dudes & YM3812 information!
Thanks to JC Alexander for fix to Robocop ending!
Cheats:
Hippodrome: Level number held in 0xFF8011
Bad Dudes: level number held in FF821D
Put a bpx at 0x1b94 to halt at level check and choose level or end-seq
Sly Spy: bpx at 5d8 for level check, can go to any level.
(see comments in patch section below).
Mid res: bpx at c02 for level check, can go straight to credits.
Level number held in 100006 (word)
bpx 10a6 - so you can choose level at start of game.
Put PC to 0xa1e in game to trigger continue screen
SEE 0xdede in slyspy - scroll register from start of level 3
***************************************************************************/
#include "driver.h"
#include "vidhrdw/generic.h"
#include "M6502/m6502.h"
/* Video emulation definitions */
int dec0_vh_start(void);
void dec0_vh_stop(void);
void dec0_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
void midres_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
void slyspy_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
void hippodrm_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
void hbarrel_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
void robocop_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
extern unsigned char *dec0_pf1_rowscroll,*dec0_pf2_rowscroll,*dec0_pf3_rowscroll;
extern unsigned char *dec0_pf1_colscroll,*dec0_pf2_colscroll,*dec0_pf3_colscroll;
extern unsigned char *dec0_pf1_data,*dec0_pf2_data,*dec0_pf3_data;
void dec0_pf1_control_0_w(int offset,int data);
void dec0_pf1_control_1_w(int offset,int data);
void dec0_pf1_rowscroll_w(int offset,int data);
void dec0_pf1_colscroll_w(int offset,int data);
void dec0_pf1_data_w(int offset,int data);
int dec0_pf1_data_r(int offset);
void dec0_pf2_control_0_w(int offset,int data);
void dec0_pf2_control_1_w(int offset,int data);
void dec0_pf2_rowscroll_w(int offset,int data);
void dec0_pf2_colscroll_w(int offset,int data);
void dec0_pf2_data_w(int offset,int data);
int dec0_pf2_data_r(int offset);
void dec0_pf3_control_0_w(int offset,int data);
void dec0_pf3_control_1_w(int offset,int data);
void dec0_pf3_rowscroll_w(int offset,int data);
void dec0_pf3_colscroll_w(int offset,int data);
int dec0_pf3_colscroll_r(int offset);
void dec0_pf3_data_w(int offset,int data);
int dec0_pf3_data_r(int offset);
void dec0_priority_w(int offset,int data);
void dec0_paletteram_w_rg(int offset,int data);
void dec0_paletteram_w_b(int offset,int data);
/* System prototypes - from machine/dec0.c */
extern void dec0_custom_memory(void);
extern int dec0_controls_read(int offset);
extern int dec0_rotary_read(int offset);
extern int midres_controls_read(int offset);
extern int slyspy_controls_read(int offset);
extern void dec0_i8751_write(int data);
extern void dec0_i8751_reset(void);
#if 0
extern int hippo_6510_intf_r(int offset);
extern void hippo_6510_intf_w(int offset,int data);
#endif
unsigned char *dec0_ram;
/******************************************************************************/
static void dec0_control_w(int offset,int data)
{
switch (offset)
{
case 0: /* Playfield & Sprite priority */
dec0_priority_w(0,data);
break;
case 2: /* An ack or DMA flag */
break;
case 4: /* 6502 sound cpu */
soundlatch_w(0,data & 0xff);
cpu_cause_interrupt(1,M6502_INT_NMI);
break;
case 6: /* Intel 8751 microcontroller - Bad Dudes & Heavy Barrel only */
dec0_i8751_write(data);
break;
case 8: /* Interrupt ack (VBL - IRQ 6) (or could be DMA flag to graphics chips */
break;
case 0xa: /* ? */
break;
case 0xe: /* Reset Intel 8751? - not sure, all the games write here at startup */
dec0_i8751_reset();
break;
default:
break;
}
}
static void slyspy_control_w(int offset, int data)
{
int sound=data&0xff;
switch (offset) {
case 0:
if (sound>0x2d) ADPCM_trigger(0,sound);
break;
case 2:
/* This is set to 0x80 in the boat level, so could be sprite/playfield
priority - it fits for all cases except boat level where this is
also 0x80 :( */
dec0_priority_w(0,data);
break;
}
}
static void midres_sound_w(int offset, int data)
{
int sound=data&0xff;
if (sound>0x44)
ADPCM_trigger(0,sound);
}
/******************************************************************************/
static struct MemoryReadAddress dec0_readmem[] =
{
{ 0x000000, 0x05ffff, MRA_ROM },
{ 0x244000, 0x245fff, dec0_pf1_data_r },
{ 0x24a000, 0x24a7ff, dec0_pf2_data_r },
{ 0x24c800, 0x24c87f, dec0_pf3_colscroll_r },
{ 0x24d000, 0x24d7ff, dec0_pf3_data_r },
{ 0x300000, 0x30001f, dec0_rotary_read },
{ 0x30c000, 0x30c00b, dec0_controls_read },
{ 0xff8000, 0xffbfff, MRA_BANK1 }, /* Main ram */
{ 0xffc000, 0xffc7ff, MRA_BANK2 }, /* Sprites */
{ -1 } /* end of table */
};
static struct MemoryWriteAddress dec0_writemem[] =
{
{ 0x000000, 0x05ffff, MWA_ROM },
{ 0x240000, 0x240007, dec0_pf1_control_0_w }, /* text layer */
{ 0x240010, 0x240017, dec0_pf1_control_1_w },
{ 0x242000, 0x24207f, dec0_pf1_colscroll_w, &dec0_pf1_colscroll },
{ 0x242400, 0x2427ff, dec0_pf1_rowscroll_w, &dec0_pf1_rowscroll },
{ 0x244000, 0x245fff, dec0_pf1_data_w, &dec0_pf1_data },
{ 0x246000, 0x246007, dec0_pf2_control_0_w }, /* first tile layer */
{ 0x246010, 0x246017, dec0_pf2_control_1_w },
{ 0x248000, 0x24807f, dec0_pf2_colscroll_w, &dec0_pf2_colscroll },
{ 0x248400, 0x2487ff, dec0_pf2_rowscroll_w, &dec0_pf2_rowscroll },
{ 0x24a000, 0x24a7ff, dec0_pf2_data_w, &dec0_pf2_data },
{ 0x24c000, 0x24c007, dec0_pf3_control_0_w }, /* second tile layer */
{ 0x24c010, 0x24c017, dec0_pf3_control_1_w },
{ 0x24c800, 0x24c87f, dec0_pf3_colscroll_w, &dec0_pf3_colscroll },
{ 0x24cc00, 0x24cfff, dec0_pf3_rowscroll_w, &dec0_pf3_rowscroll },
{ 0x24d000, 0x24d7ff, dec0_pf3_data_w, &dec0_pf3_data },
{ 0x30c010, 0x30c01f, dec0_control_w }, /* Priority, sound, etc. */
{ 0x310000, 0x3107ff, dec0_paletteram_w_rg, &paletteram }, /* Red & Green bits */
{ 0x314000, 0x3147ff, dec0_paletteram_w_b, &paletteram_2 }, /* Blue bits */
{ 0xff8000, 0xffbfff, MWA_BANK1, &dec0_ram },
{ 0xffc000, 0xffc7ff, MWA_BANK2, &spriteram },
{ -1 } /* end of table */
};
static struct MemoryReadAddress slyspy_readmem[] =
{
{ 0x000000, 0x03ffff, MRA_ROM },
{ 0x244000, 0x244003, MRA_NOP }, /* ?? watchdog ?? */
{ 0x304000, 0x307fff, MRA_BANK1 }, /* Sly spy main ram */
{ 0x308000, 0x3087ff, MRA_BANK2 }, /* Sprites */
{ 0x314008, 0x31400f, slyspy_controls_read },
{ 0x31c00c, 0x31c00f, MRA_NOP }, /* sound CPU read? */
{ -1 } /* end of table */
};
static struct MemoryWriteAddress slyspy_writemem[] =
{
{ 0x000000, 0x03ffff, MWA_ROM },
/* All 0x23xxxx are moved from 0x24xxxx via patches to avoid conflicts */
{ 0x230000, 0x230007, dec0_pf2_control_0_w },
{ 0x230010, 0x230017, dec0_pf2_control_1_w },
{ 0x232000, 0x23207f, dec0_pf2_colscroll_w, &dec0_pf2_colscroll },
{ 0x232400, 0x2327ff, dec0_pf2_rowscroll_w, &dec0_pf2_rowscroll },
{ 0x238000, 0x238007, dec0_pf1_control_0_w },
{ 0x238010, 0x238017, dec0_pf1_control_1_w },
{ 0x23c000, 0x23c07f, dec0_pf1_colscroll_w, &dec0_pf1_colscroll },
{ 0x23c400, 0x23c7ff, dec0_pf1_rowscroll_w, &dec0_pf1_rowscroll },
{ 0x238000, 0x239fff, dec0_pf1_data_w }, /* Used only by end sequence */
/* PRIORITY WORD - still not found, perhaps mixed in with other playfields */
{ 0x240000, 0x2407ff, dec0_pf2_data_w, &dec0_pf2_data },
{ 0x242000, 0x243fff, dec0_pf1_data_w, &dec0_pf1_data },
{ 0x244000, 0x244003, MWA_NOP }, /* ?? watchdog ?? */
{ 0x246000, 0x2467ff, dec0_pf2_data_w },
{ 0x248000, 0x2487ff, dec0_pf2_data_w },
{ 0x24a000, 0x24a003, MWA_NOP }, /* ?? watchdog ?? */
{ 0x24c000, 0x24c7ff, dec0_pf2_data_w },
{ 0x24e000, 0x24ffff, dec0_pf1_data_w },
{ 0x300000, 0x300007, dec0_pf3_control_0_w },
{ 0x300010, 0x300017, dec0_pf3_control_1_w },
{ 0x300800, 0x30087f, dec0_pf3_colscroll_w, &dec0_pf3_colscroll },
{ 0x301000, 0x3017ff, dec0_pf3_data_w, &dec0_pf3_data },
{ 0x304000, 0x307fff, MWA_BANK1, &dec0_ram }, /* Sly spy main ram */
{ 0x308000, 0x3087ff, MWA_BANK2, &spriteram },
{ 0x310000, 0x3107ff, paletteram_xxxxBBBBGGGGRRRR_word_w, &paletteram },
{ 0x314000, 0x314003, slyspy_control_w },
{ -1 } /* end of table */
};
static struct MemoryReadAddress midres_readmem[] =
{
{ 0x000000, 0x07ffff, MRA_ROM },
{ 0x100000, 0x103fff, MRA_BANK1 },
{ 0x120000, 0x1207ff, MRA_BANK2 },
{ 0x180000, 0x18000f, midres_controls_read },
{ 0x320000, 0x321fff, dec0_pf1_data_r },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress midres_writemem[] =
{
{ 0x000000, 0x07ffff, MWA_ROM },
{ 0x100000, 0x103fff, MWA_BANK1, &dec0_ram },
{ 0x120000, 0x1207ff, MWA_BANK2, &spriteram },
{ 0x140000, 0x1407ff, paletteram_xxxxBBBBGGGGRRRR_word_w, &paletteram },
{ 0x160000, 0x160001, dec0_priority_w },
{ 0x180008, 0x18000f, MWA_NOP }, /* ?? watchdog ?? */
{ 0x1a0000, 0x1a0001, midres_sound_w },
{ 0x200000, 0x200007, dec0_pf2_control_0_w },
{ 0x200010, 0x200017, dec0_pf2_control_1_w },
{ 0x220000, 0x2207ff, dec0_pf2_data_w, &dec0_pf2_data },
{ 0x220800, 0x220fff, dec0_pf2_data_w }, /* mirror address used in end sequence */
{ 0x240000, 0x24007f, dec0_pf2_colscroll_w, &dec0_pf2_colscroll },
{ 0x240400, 0x2407ff, dec0_pf2_rowscroll_w, &dec0_pf2_rowscroll },
{ 0x280000, 0x280007, dec0_pf3_control_0_w },
{ 0x280010, 0x280017, dec0_pf3_control_1_w },
{ 0x2a0000, 0x2a07ff, dec0_pf3_data_w, &dec0_pf3_data },
{ 0x2c0000, 0x2c007f, dec0_pf3_colscroll_w, &dec0_pf3_colscroll },
{ 0x2c0400, 0x2c07ff, dec0_pf3_rowscroll_w, &dec0_pf3_rowscroll },
{ 0x300000, 0x300007, dec0_pf1_control_0_w },
{ 0x300010, 0x300017, dec0_pf1_control_1_w },
{ 0x320000, 0x321fff, dec0_pf1_data_w, &dec0_pf1_data },
{ 0x340000, 0x34007f, dec0_pf1_colscroll_w, &dec0_pf1_colscroll },
{ 0x340400, 0x3407ff, dec0_pf1_rowscroll_w, &dec0_pf1_rowscroll },
{ -1 } /* end of table */
};
#if 0
static struct MemoryReadAddress hippo_sub_readmem[] =
{
{ 0x0000, 0x01ff, MRA_RAM },
{ 0x6000, 0x60ff, hippo_6510_intf_r },
{ 0xc000, 0xdfff, MRA_ROM },
{ 0xe000, 0xffff, MRA_ROM },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress hippo_sub_writemem[] =
{
{ 0x0000, 0x01ff, MWA_RAM },
{ 0x6000, 0x60ff, hippo_6510_intf_w },
{ 0xe000, 0xffff, MWA_ROM },
{ -1 } /* end of table */
};
#endif
/******************************************************************************/
static struct MemoryReadAddress dec0_s_readmem[] =
{
{ 0x0000, 0x05ff, MRA_RAM },
{ 0x3000, 0x3000, soundlatch_r },
{ 0x3800, 0x3800, OKIM6295_status_r },
{ 0x8000, 0xffff, MRA_ROM },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress dec0_s_writemem[] =
{
{ 0x0000, 0x05ff, MWA_RAM },
{ 0x0800, 0x0800, YM2203_control_port_0_w },
{ 0x0801, 0x0801, YM2203_write_port_0_w },
{ 0x1000, 0x1000, YM3812_control_port_0_w },
{ 0x1001, 0x1001, YM3812_write_port_0_w },
{ 0x3800, 0x3800, OKIM6295_data_w },
{ 0x8000, 0xffff, MWA_ROM },
{ -1 } /* end of table */
};
/******************************************************************************/
#define DEC0_PLAYER1_CONTROL \
PORT_START /* Player 1 controls */ \
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY ) \
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY ) \
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY ) \
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