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📄 gsword.c

📁 这个是延伸mame的在wince平台下的游戏模拟器的代码
💻 C
📖 第 1 页 / 共 2 页
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/* Great Swordsman (Taito) 1984

Credits:
- Steve Ellenoff: Original emulation and Mame driver
- Jarek Parchanski: Dip Switch Fixes, Color improvements, ADPCM Interface code

Special thanks to:
- Camilty for precious hardware information and screenshots

Issues:
- Colors are a mess
- communication to/from sound CPU(s) not yet hooked up
- CPU speed may not be accurate



There are 3 Z80s and two AY-3-8910s..

Prelim memory map (last updated 6/15/98)
*****************************************
GS1		z80 Main Code	(8K)	0000-1FFF
Gs2     z80 Game Data   (8K)    2000-3FFF
Gs3     z80 Game Data   (8K)    4000-5FFF
Gs4     z80 Game Data   (8K)    6000-7FFF
Gs5     z80 Game Data   (4K)    8000-8FFF
Gs6     Sprites         (8K)
Gs7     Sprites         (8K)
Gs8		Sprites			(8K)
Gs10	Tiles			(8K)
Gs11	Tiles			(8K)
Gs12    3rd z80 CPU &   (8K)
        ADPCM Samples?
Gs13    ADPCM Samples?  (8K)
Gs14    ADPCM Samples?  (8K)
Gs15    2nd z80 CPU     (8K)    0000-1FFF
Gs16    2nd z80 Data    (8K)    2000-3FFF
*****************************************

**********
*Main Z80*
**********

		9000 - 9fff	Work Ram
        982e - 982e Free play
        98e0 - 98e0 Coin Input
        98e1 - 98e1 Player 1 Controls
        98e2 - 98e2 Player 2 Controls
        9c00 - 9c30 (Hi score - Scores)
        9c78 - 9cd8 (Hi score - Names)
        9e00 - 9e7f Sprites in working ram!
        9e80 - 9eff Sprite X & Y in working ram!

		a000 - afff	Sprite RAM & Video Attributes
        a000 - a37F	???
        a380 - a77F	Sprite Tile #s
        a780 - a7FF	Sprite Y & X positions
        a980 - a980	Background Tile Bank Select
        ab00 - ab00	Background Tile Y-Scroll register
        ab80 - abff	Sprite Attributes(X & Y Flip)

		b000 - b7ff	Screen RAM
		b800 - ffff	not used?!

PORTS:
7e Read and Written - Communication to 2nd z80(or 8741?)
7f Read and Written - Communication to 2nd z80(or 8741?)
*****************************************
Unknown but written to....
9820,9821 = ?
980a = # of Credits?
980b = COIN SLOT 1?
980c = COIN SLOT 2?
980d = ?
981d = ?
980e, 980f ?
982b, 982c, 982d, 982a, 9824, 9825, 9826
98e3, 9e84 = ?

*************
*2nd Z80 CPU*
*************
0000 - 3FFF ROM CODE
4000 - 43FF WORK RAM

PORTS:
40 Read and Written - ?
41 Read and Written - ?
60 Read and Written - ?
61 Read and Written - ?
80 Written - ?
81 Written - ?
a0 Written - ?
e0 Read and Written - ?
******************************************/

#include "driver.h"
#include "vidhrdw/generic.h"

void gsword_vh_convert_color_prom(unsigned char *palette, unsigned short *colortable,const unsigned char *color_prom);
int  gsword_vh_start(void);
void gsword_vh_stop(void);
void gsword_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
void gs_video_attributes_w(int offset, int data);
void gs_flipscreen_w(int offset, int data);
void gs_videoram_w(int offset, int data);


extern int gs_videoram_size;
extern int gs_spritexy_size;


extern unsigned char *gs_videoram;
extern unsigned char *gs_scrolly_ram;
extern unsigned char *gs_spritexy_ram;
extern unsigned char *gs_spritetile_ram;
extern unsigned char *gs_spriteattrib_ram;

/*Cpu 1 Ports*/
static int port7e_c1=0;
static int port7f_c1=0,port_select=0,status=0,data_nr=0;

/*Cpu 2 Ports*/
static int port40_c2=0;
static int port41_c2=0;
static int port60_c2=0;
static int port61_c2=0;
static int port80_c2=0;
static int port81_c2=0;
static int porte0_c2=0;
static int porta0_c2=0;
static int port61_c2_buf[16];
static int port81_c2_buf[16];

int gsword_port_read(int offset)
{
 	switch(offset)
	{
		case 0:
			return(input_port_4_r(0));
		case 1:
			return(input_port_3_r(0));
		case 2:
			return(input_port_1_r(0));
		case 3:
			return(input_port_0_r(0));
		case 5:
			port_select=5;
 		        data_nr=0;
			return(0);	
		case 8:
			port_select=8;
			return(0);	
		case 10:
			port_select=10;
			return(0);	
		default:
			return 0;
	}
}

int gsword_port_c1r(int offset)
{
	int result=0;

	switch(offset)
        {
        	case 0x7e:
			if (status & 1)
			{
				result = gsword_port_read(port7f_c1);
			}
			else
			{
				result = status;
			}
			status &= 0xfe;
	                break;
        	case 0x7f:
			if (status & 2)
	                      result = port7e_c1;
			else
			      result = 1;
			status &= 0xfd;
                break;
        }
	return result;
}

void gsword_port_c1w(int offset, int data)
{

	switch(offset)
        {
        	case 0x7e:
                	if (!(status & 2))
			{
           	     port7e_c1 = data;
			     if (port_select==5)
			     {

					switch(data_nr)
			        {
			        	case 0x0:
				     		if (data & 0x80) /*SOUND COMMANDS*/
						{
						}
						break;
			        	case 0x1:
						break;
			        	case 0x2:
						break;
			        	case 0x3:
						break;
			        	case 0x4:
						break;
				 }
				 data_nr++;
			     }
			}
			status |= 2;  
	                break;
        	case 0x7f:
                	if (!(status & 1)) port7f_c1 = data;
			status |= 1;  
	                break;
        }
}



int gsword_port_c2r(int offset)
{
int result=0;

	switch(offset)
        {
        case 0x40:
                result = port40_c2;
                break;
        case 0x41:
                result = port41_c2;
				port41_c2 = 1;
                break;
        case 0x60:
                result = port61_c2_buf[port60_c2 & 0xF];
                break;
        case 0x61:
                result = port61_c2;
                break;
        case 0x80:
                result = port81_c2_buf[port80_c2 & 0xF];
                break;
        case 0x81:
                result = port81_c2;
                break;
        case 0xa0:
                result = porta0_c2;
                break;
        case 0xe0:
                result = porte0_c2;
				porte0_c2 = 1;
                break;
        }

	return result;
}

void gsword_port_c2w(int offset, int data)
{


	switch(offset)
        {
        case 0x40:
                port40_c2 = data;
                break;
        case 0x41:
                port41_c2 = data;
                break;
        case 0x60:

                port60_c2 = data;
                break;
        case 0x61:


				port61_c2 = data;
				port61_c2_buf[port60_c2 & 0xF] = data;
                break;
        case 0x80:


                port80_c2 = data;
                break;
        case 0x81:


                port81_c2 = data;
				port81_c2_buf[port80_c2 & 0xF] = data;
                break;
        case 0xa0:
                porta0_c2 = data;
                break;
        case 0xe0:
                porte0_c2 = data;
                break;
        }
}

static struct MemoryReadAddress gsword_readmem[] =
{
	{ 0x0000, 0x8fff, MRA_ROM },
	{ 0x9000, 0x9fff, MRA_RAM },
	{ 0xa000, 0xa37f, MRA_RAM },
	{ 0xa380, 0xa3ff, MRA_RAM, &gs_spritetile_ram },
	{ 0xa400, 0xa77f, MRA_RAM },
	{ 0xa780, 0xa7ff, MRA_RAM, &gs_spritexy_ram, &gs_spritexy_size},
	{ 0xa800, 0xaaff, MRA_RAM },
	{ 0xab00, 0xab00, MRA_RAM, &gs_scrolly_ram },
	{ 0xab01, 0xab7f, MRA_RAM },
	{ 0xab80, 0xabff, MRA_RAM, &gs_spriteattrib_ram },
	{ 0xac00, 0xafff, MRA_RAM },
	{ 0xb000, 0xb7ff, MRA_RAM },
	{ -1 }	/* end of table */
};

static struct MemoryWriteAddress gsword_writemem[] =
{
	{ 0x0000, 0x8fff, MWA_ROM },
	{ 0x9000, 0x9834, MWA_RAM },
	{ 0x9835, 0x9835, gs_flipscreen_w },
	{ 0x9836, 0xa97f, MWA_RAM },
	{ 0xa980, 0xa980, gs_video_attributes_w },
	{ 0xa981, 0xafff, MWA_RAM },
	{ 0xb000, 0xb7ff, gs_videoram_w, &gs_videoram, &gs_videoram_size },
	{ -1 }	/* end of table */
};

static struct MemoryReadAddress readmem_cpu2[] =
{
	{ 0x0000, 0x3fff, MRA_ROM },
	{ 0x4000, 0x43ff, MRA_RAM },
	{ -1 }
};

static struct MemoryWriteAddress writemem_cpu2[] =
{
	{ 0x0000, 0x3fff, MWA_ROM },
	{ 0x4000, 0x43ff, MWA_RAM },
	{ -1 }
};

static struct MemoryReadAddress readmem_cpu3[] =
{
	{ 0x0000, 0x5fff, MRA_ROM },
	{ 0x6000, 0x9fff, MRA_NOP },
	{ 0xa001, 0xffff, MRA_NOP },

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