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📄 smashtv.c

📁 这个是延伸mame的在wince平台下的游戏模拟器的代码
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/*************************************************************************

  Driver for Williams/Midway games using the TMS34010 processor.

  Created by Alex Pasadyn and Zsolt Vasvari with some help from Kurt Mahan

  Currently playable:
  ------------------

  	 - Smash Tv
	 - Total Carnage
	 - Mortal Kombat
	 - Narc
	 - Strike Force
	 - Trog (prototype and release versions)
	 - Hi Impact Football


  Not Playable:
  ------------

     - Terminator 2	    (no gun support)
	 - Mortal Kombat II (newer version of DMA chip)
	 - NBA Jam          (newer version of DMA chip)
	 - Super Hi Impact  (plays end immaturely, TMS34010 core problem?)


  Known Bugs:
  ----------

     - High scores don't display in MK and Trog. We have no clue right now
	   as to why.

	 - Strike Force hangs after beating the mother alien. Might be a
	   protecion issue, but it's purely a speculation.

	 - Once in a while the "Milky Way" portion of the background in
	   Strike Force is miscolored

	 - When the Porsche spins in Narc, the wheels are missing for a single
	   frame. This actually might be there on the original, because if the
	   game runs over 60% (as it does now on my PII 266) it's very hard to
	   notice. With 100% framerate, it would be invisible.

	 - Save state is commented out because it only works without sound

	 - Sound has some problems, especially in Smash TV. Since we cannot
	   run these games at 100% with sound on, it's hard to test for
	   accuracy


  To Do:
  -----

     - Check for auto-erase more than once per frame
	   (not sure if this feature is actually used)

	 - Verify screen sizes

	 - Verify unknown DIP switches

	 - Terminator 2 gun

	 - Verify inputs

	 - More cleanups

	 - CVSD chip is not very accurate. Once working properly abstract it
	   out so it can be used by other drivers, such as Sinistar


  Theory:
  ------

     - BANK1 = program ROM
	 - BANK2 = RAM
	 - BANK4 = RAM (palette RAM included here)
	 - BANK5 = sound ROM
	 - BANK6 = sound ROM
	 - BANK8 = graphics ROM

**************************************************************************/
#include "driver.h"
#include "TMS34010/tms34010.h"
#include "machine/6821pia.h"
#include "vidhrdw/generic.h"

/* Variables in vidhrdw/smashtv.c */
extern unsigned char *wms_videoram;
extern           int wms_videoram_size;

/* Variables in machine/smashtv.c */
extern unsigned char *wms_cmos_ram;
extern           int wms_bank2_size;
static           int wms_bank4_size;
extern           int wms_code_rom_size;
extern           int wms_gfx_rom_size;
static           int wms_paletteram_size;

/* Functions in vidhrdw/smashtv.c */
int wms_vh_start(void);
int wms_t_vh_start(void);
void wms_vh_stop (void);
void wms_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
void wms_vram_w(int offset, int data);
int wms_vram_r(int offset);

/* Functions in machine/smashtv.c */
void smashtv_init_machine(void);
void mk_init_machine(void);
void trog_init_machine(void);
void narc_init_machine(void);
void mk2_init_machine(void);
void nbajam_init_machine(void);

void wms_sysreg_w(int offset, int data);
void wms_sysreg2_w(int offset, int data);

void wms_cmos_w(int offset, int data);
int wms_cmos_r(int offset);

void wms_01c00060_w(int offset, int data);
int wms_01c00060_r(int offset);

int wms_dma_r(int offset);
void wms_dma_w(int offset, int data);
void wms_dma2_w(int offset, int data);

int wms_input_r (int offset);

void narc_music_bank_select_w (int offset,int data);
void narc_digitizer_bank_select_w (int offset,int data);
void smashtv_sound_bank_select_w (int offset,int data);
void mk_sound_bank_select_w (int offset,int data);

void narc_driver_init(void);
void smashtv_driver_init(void);
void trog_driver_init(void);
void trog3_driver_init(void);
void trogp_driver_init(void);
void mk_driver_init(void);
void mk2_driver_init(void);
void nbajam_driver_init(void);
void totcarn_driver_init(void);
void totcarnp_driver_init(void);
void hiimpact_driver_init(void);
void shimpact_driver_init(void);
void strkforc_driver_init(void);
void term2_driver_init(void);

/* Functions in sndhrdw/smashtv.c */
void CVSD_clock_w(int offset, int databit);
void CVSD_digit_w(int offset, int databit);
void smashtv_ym2151_int (void);
void narc_ym2151_int (void);
void mk_sound_talkback_w (int offset,int data);
int  narc_DAC_r(int offset);
void narc_slave_DAC_w (int offset,int data);
void narc_slave_cmd_w (int offset,int data);

unsigned int wms_rom_loaded;

/* This just causes the init_machine to copy the images again */
static void wms_decode(void)
{
	wms_rom_loaded = 0;
}

static struct MemoryReadAddress smashtv_readmem[] =
{
	{ TOBYTE(0x00000000), TOBYTE(0x001fffff), wms_vram_r }, /* VRAM */
	{ TOBYTE(0x01000000), TOBYTE(0x010fffff), MRA_BANK2, 0, &wms_bank2_size }, /* RAM */
	{ TOBYTE(0x01400000), TOBYTE(0x0140ffff), wms_cmos_r }, /* CMOS RAM */
/*	{ TOBYTE(0x0181f000), TOBYTE(0x0181ffff), paletteram_word_r }, */
/*	{ TOBYTE(0x01810000), TOBYTE(0x0181ffff), paletteram_word_r }, */
/*	{ TOBYTE(0x01800000), TOBYTE(0x0181ffff), paletteram_word_r }, */
	{ TOBYTE(0x01800000), TOBYTE(0x019fffff), MRA_BANK4, 0, &wms_bank4_size }, /* RAM */
	{ TOBYTE(0x01a80000), TOBYTE(0x01a8001f), wms_dma_r },
	{ TOBYTE(0x01c00000), TOBYTE(0x01c0005f), wms_input_r },
	{ TOBYTE(0x01c00060), TOBYTE(0x01c0007f), wms_01c00060_r },
	{ TOBYTE(0x02000000), TOBYTE(0x05ffffff), MRA_BANK8, 0, &wms_gfx_rom_size }, /* GFX ROMS */
	{ TOBYTE(0xc0000000), TOBYTE(0xc00001ff), TMS34010_io_register_r },
	{ TOBYTE(0xff800000), TOBYTE(0xffffffff), MRA_BANK1, 0, &wms_code_rom_size },
	{ -1 }  /* end of table */
};

static struct MemoryWriteAddress smashtv_writemem[] =
{
	{ TOBYTE(0x00000000), TOBYTE(0x001fffff), wms_vram_w }, /* VRAM */
	{ TOBYTE(0x01000000), TOBYTE(0x010fffff), MWA_BANK2 }, /* RAM */
	{ TOBYTE(0x01400000), TOBYTE(0x0140ffff), wms_cmos_w }, /* CMOS RAM */
/*	{ TOBYTE(0x0181f000), TOBYTE(0x0181ffff), paletteram_xRRRRRGGGGGBBBBB_word_w, 0, &wms_paletteram_size }, */
/*	{ TOBYTE(0x01810000), TOBYTE(0x0181ffff), paletteram_xRRRRRGGGGGBBBBB_word_w, 0, &wms_paletteram_size }, */
/*	{ TOBYTE(0x01800000), TOBYTE(0x0181ffff), paletteram_xRRRRRGGGGGBBBBB_word_w, 0, &wms_paletteram_size }, */
	{ TOBYTE(0x01800000), TOBYTE(0x019fffff), MWA_BANK4 }, /* RAM */
	{ TOBYTE(0x01a00000), TOBYTE(0x01a0009f), wms_dma_w },
	{ TOBYTE(0x01a80000), TOBYTE(0x01a8009f), wms_dma_w },
	{ TOBYTE(0x01c00060), TOBYTE(0x01c0007f), wms_01c00060_w },
	{ TOBYTE(0x01e00000), TOBYTE(0x01e0001f), MWA_NOP }, /* sound */
/*	{ TOBYTE(0x01e00000), TOBYTE(0x01e0001f), smashtv_sound_w }, */
/*	{ TOBYTE(0x01e00000), TOBYTE(0x01e0001f), mk_sound_w },		 */
/*	{ TOBYTE(0x01e00000), TOBYTE(0x01e0001f), narc_sound_w },	 */
	{ TOBYTE(0x01f00000), TOBYTE(0x01f0001f), wms_sysreg_w },
	{ TOBYTE(0xc0000000), TOBYTE(0xc00001ff), TMS34010_io_register_w },
	{ -1 }  /* end of table */
};

static struct MemoryReadAddress mk2_readmem[] =
{
	{ TOBYTE(0x00000000), TOBYTE(0x003fffff), wms_vram_r }, /* VRAM */
	{ TOBYTE(0x01000000), TOBYTE(0x013fffff), MRA_BANK2, 0, &wms_bank2_size }, /* Sratch RAM UJ4/5/6/7 */
	{ TOBYTE(0x01400000), TOBYTE(0x0140ffff), wms_cmos_r },
	{ TOBYTE(0x01600000), TOBYTE(0x016000ff), wms_input_r },
	{ TOBYTE(0x01800000), TOBYTE(0x0181ffff), paletteram_word_r },
	{ TOBYTE(0x01800000), TOBYTE(0x019fffff), MRA_BANK4, 0, &wms_bank4_size }, /* RAM */
	{ TOBYTE(0x01a80000), TOBYTE(0x01a8001f), wms_dma_r },
	{ TOBYTE(0x01b14000), TOBYTE(0x01b23fff), MRA_BANK3}, /* ???? */
	{ TOBYTE(0x01d00000), TOBYTE(0x01d0005f), MRA_NOP }, /* ??? */
	/* checks 1d00000 for 0x8000 */
	{ TOBYTE(0x02000000), TOBYTE(0x05ffffff), MRA_BANK8, 0, &wms_gfx_rom_size }, /* GFX ROMS */
	{ TOBYTE(0xc0000000), TOBYTE(0xc00001ff), TMS34010_io_register_r },
	{ TOBYTE(0xff800000), TOBYTE(0xffffffff), MRA_BANK1, 0, &wms_code_rom_size },
	{ -1 }  /* end of table */
};

static struct MemoryWriteAddress mk2_writemem[] =
{
	{ TOBYTE(0x00000000), TOBYTE(0x003fffff), wms_vram_w }, /* VRAM */
	{ TOBYTE(0x01000000), TOBYTE(0x013fffff), MWA_BANK2 }, /* Scratch RAM */
	{ TOBYTE(0x01400000), TOBYTE(0x0140ffff), wms_cmos_w }, /* ??? */
/*	{ TOBYTE(0x01480000), TOBYTE(0x0148001f), MWA_NOP }, */ /* 0? */
	{ TOBYTE(0x014fffe0), TOBYTE(0x014fffff), MWA_NOP }, /* ???? */
	{ TOBYTE(0x01800000), TOBYTE(0x0181ffff), paletteram_xRRRRRGGGGGBBBBB_word_w, 0, &wms_paletteram_size },
	{ TOBYTE(0x01800000), TOBYTE(0x019fffff), MWA_BANK4 }, /* RAM */
	{ TOBYTE(0x01a80000), TOBYTE(0x01a800ff), wms_dma2_w },
	{ TOBYTE(0x01b14000), TOBYTE(0x01b23fff), MWA_BANK3}, /* ???? */
	{ TOBYTE(0x01c00060), TOBYTE(0x01c0007f), wms_01c00060_w },
/*	{ TOBYTE(0x01d01000), TOBYTE(0x01d010ff), MWA_NOP }, */ /* ???? */
/*	{ TOBYTE(0x01d01020), TOBYTE(0x01d0103f), MWA_NOP }, */ /* sound */
	{ TOBYTE(0x01d81060), TOBYTE(0x01d8107f), MWA_NOP }, /* ???? */
	/* 1d01070, 1d81070 == watchdog?? */
	{ TOBYTE(0x01f00000), TOBYTE(0x01f0001f), wms_sysreg2_w },
	{ TOBYTE(0xc0000000), TOBYTE(0xc00001ff), TMS34010_io_register_w },
	{ -1 }  /* end of table */
};

static struct MemoryWriteAddress narc_music_writemem[] =
{
	{ 0x0000, 0x1fff, MWA_RAM},
	{ 0x2000, 0x2000, YM2151_register_port_0_w },
	{ 0x2001, 0x2001, YM2151_data_port_0_w },
	{ 0x2800, 0x2800, soundlatch3_w }, /* talkback port */
	{ 0x2c00, 0x2c00, narc_slave_cmd_w }, /* COMM (for slave) */
	{ 0x3000, 0x3000, DAC_data_w },
	{ 0x3800, 0x3800, narc_music_bank_select_w },
	{ 0x3c00, 0x3c00, MWA_NOP}, /* SYNC */
	{ 0x4000, 0xffff, MWA_ROM},
	{ -1 }
};
static struct MemoryReadAddress narc_music_readmem[] =
{
	{ 0x0000, 0x1fff, MRA_RAM},
	{ 0x2001, 0x2001, YM2151_status_port_0_r },
	{ 0x3000, 0x3000, narc_DAC_r },
	{ 0x3400, 0x3400, soundlatch_r},
	{ 0x4000, 0xbfff, MRA_BANK5},
	{ 0xc000, 0xffff, MRA_ROM},
	  { -1 }
};
static struct MemoryWriteAddress narc_digitizer_writemem[] =
{
	{ 0x0000, 0x1fff, MWA_RAM},
	{ 0x2000, 0x2000, CVSD_clock_w },
	{ 0x2400, 0x2400, CVSD_digit_w },
	{ 0x3000, 0x3000, narc_slave_DAC_w },
	{ 0x3800, 0x3800, narc_digitizer_bank_select_w },
	{ 0x3c00, 0x3c00, MWA_NOP}, /* SYNC */
	{ 0x4000, 0xffff, MWA_ROM},
	{ -1 }
};
static struct MemoryReadAddress narc_digitizer_readmem[] =
{
	{ 0x0000, 0x1fff, MRA_RAM},
	{ 0x3000, 0x3000, narc_DAC_r },
	{ 0x3400, 0x3400, soundlatch2_r},
	{ 0x4000, 0xbfff, MRA_BANK6},
	{ 0xc000, 0xffff, MRA_ROM},
	  { -1 }
};

static struct MemoryReadAddress smashtv_sound_readmem[] =
{
	{ 0x0000, 0x07ff, MRA_RAM },
	{ 0x2001, 0x2001, YM2151_status_port_0_r },
	{ 0x4000, 0x4003, pia_1_r },
	{ 0x8000, 0xffff, MRA_BANK5},
	  { -1 }
};
static struct MemoryWriteAddress smashtv_sound_writemem[] =
{
	{ 0x0000, 0x07ff, MWA_RAM},
	{ 0x2000, 0x2000, YM2151_register_port_0_w },
	{ 0x2001, 0x2001, YM2151_data_port_0_w },
	{ 0x4000, 0x4003, pia_1_w },
	{ 0x6000, 0x6000, CVSD_digit_w },
	{ 0x6800, 0x6800, CVSD_clock_w },
	{ 0x7800, 0x7800, smashtv_sound_bank_select_w },
	{ 0x8000, 0xffff, MWA_ROM},
	{ -1 }
};

static struct MemoryReadAddress mk_sound_readmem[] =
{
	{ 0x0000, 0x1fff, MRA_RAM },
	{ 0x2401, 0x2401, YM2151_status_port_0_r },
	{ 0x2c00, 0x2c00, OKIM6295_status_r },
	{ 0x3000, 0x3000, soundlatch_r},
	{ 0x4000, 0xbfff, MRA_BANK5},
	{ 0xc000, 0xffff, MRA_BANK6},
	{ -1 }
};

void mk_adpcm_bs_w(int offset, int data);

static struct MemoryWriteAddress mk_sound_writemem[] =
{
	{ 0x0000, 0x1fff, MWA_RAM},
	{ 0x2000, 0x2000, mk_sound_bank_select_w },
	{ 0x2400, 0x2400, YM2151_register_port_0_w },
	{ 0x2401, 0x2401, YM2151_data_port_0_w },
	{ 0x2800, 0x2800, DAC_data_w },
	{ 0x2c00, 0x2c00, OKIM6295_data_w },
	{ 0x3400, 0x3400, mk_adpcm_bs_w }, /* PCM-BS */
	{ 0x3c00, 0x3c00, mk_sound_talkback_w }, /* talkback port? */
	{ 0x4000, 0xffff, MWA_ROM},
	{ -1 }
};

INPUT_PORTS_START( narc_input_ports )

	PORT_START      /* IN0 - player 1 */
	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER1 | IPF_8WAY )
	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_PLAYER1 | IPF_8WAY )
	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_PLAYER1 | IPF_8WAY )
	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_PLAYER1 | IPF_8WAY )
	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON4 | IPF_PLAYER1 )
	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_PLAYER1 )
	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_PLAYER1 )
	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON3 | IPF_PLAYER1 )

	PORT_START      /* IN1 - player 2 */
	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_PLAYER2 | IPF_8WAY )

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