vindictr.c

这个是延伸mame的在wince平台下的游戏模拟器的代码

/***************************************************************************

vindictr Memory Map
----------------

vindictr 68010 MEMORY MAP

Program ROM             000000-05FFFF   R    D15-D0
Program ROM shared      060000-07FFFF   R    D15-D0
Program ROM             080000-09FFFF   R    D15-D0

vindictr                  0E0001-0E0FFF  R/W   D7-D0    (odd bytes only)
Program RAM             160000-16FFFF  R/W   D15-D0
UNLOCK vindictr           1Fxxxx          W

Player 1 Input (left)   260000          R    D11-D8 Active lo
Player 2 Input (right)  260010          R    D11-D8 Active lo
      D8:    start
      D9:    fire
      D10:   spare
      D11:   duck

VBLANK                  260010          R    D0 Active lo
Self-test                               R    D1 Active lo
Input buffer full (@260030)             R    D2 Active lo
Output buffer full (@360030)            R    D3 Active lo
ADEOC, end of conversion                R    D4 Active hi

ADC0, analog port       260020          R    D0-D7
ADC1                    260022          R    D0-D7
ADC2                    260024          R    D0-D7
ADC3                    260026          R    D0-D7

Read sound processor    260030          R    D0-D7

Watch Dog               2E0000          W    xx        (128 msec. timeout)

VBLANK Interrupt ack.   360000          W    xx

Video off               360010          W    D5 (active hi)
Video intensity                         W    D1-D4 (0=full on)
EXTRA cpu reset                         W    D0 (lo to reset)

Sound processor reset   360020          W    xx

Write sound processor   360030          W    D0-D7

Color RAM Alpha         3E0000-3E01FF  R/W   D15-D0
Color RAM Motion Object 3E0200-3E03FF  R/W   D15-D0
Color RAM Playfield     3E0400-3E07FE  R/W   D15-D0
Color RAM STAIN         3E0800-3E0FFE  R/W   D15-D0

Playfield Picture RAM   3F0000-3F1FFF  R/W   D15-D0
Motion Object RAM       3F2000-3F3FFF  R/W   D15-D0
Alphanumerics RAM       3F4000-3F4EFF  R/W   D15-D0
Scroll and MOB config   3F4F00-3F4F70  R/W   D15-D0
SLIP pointers           3F4F80-3F4FFF  R/W   D9-D0
Working RAM             3F5000-3F7FFF  R/W   D15-D0
Playfield palette RAM   3F8000-3F9FFF  R/W   D11-D8

****************************************************************************/



#include "driver.h"
#include "machine/atarigen.h"
#include "vidhrdw/generic.h"
#include "sndhrdw/adpcm.h"


extern unsigned char *vindictr_playfieldpalram;

extern int vindictr_playfieldpalram_size;


int vindictr_playfieldram_r (int offset);
int vindictr_spriteram_r (int offset);
int vindictr_alpharam_r (int offset);

void vindictr_latch_w (int offset, int data);
void vindictr_playfieldram_w (int offset, int data);
void vindictr_spriteram_w (int offset, int data);
void vindictr_alpharam_w (int offset, int data);

int vindictr_interrupt (void);

void vindictr_init_machine (void);

int vindictr_vh_start (void);
void vindictr_vh_stop (void);

void vindictr_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);

int vindictr_update_display_list (int scanline);



/*************************************
 *
 *		Misc. functions
 *
 *************************************/

static void vindictr_soundint (void)
{
	cpu_cause_interrupt (0, 6);
}


void vindictr_init_machine (void)
{
	atarigen_init_machine (vindictr_soundint, 0);
}


static int fake_inputs (int real_port, int fake_port)
{
	int result = readinputport (real_port);
	int fake = readinputport (fake_port);

	if (fake & 0x01)			/* up */
	{
		if (fake & 0x04)		/* up and left */
			result &= ~0x20;
		else if (fake & 0x08)	/* up and right */
			result &= ~0x10;
		else					/* up only */
			result &= ~0x30;
	}
	else if (fake & 0x02)		/* down */
	{
		if (fake & 0x04)		/* down and left */
			result &= ~0x80;
		else if (fake & 0x08)	/* down and right */
			result &= ~0x40;
		else					/* down only */
			result &= ~0xc0;
	}
	else if (fake & 0x04)		/* left only */
		result &= ~0x60;
	else if (fake & 0x08)		/* right only */
		result &= ~0x90;

	return result;
}

int vindictr_input_r (int offset)
{
	int result = 0;

	switch (offset & 0x30)
	{
		case 0x00:
			result = 0xff | (fake_inputs (0, 5) << 8);
			break;

		case 0x10:
			result = input_port_2_r (offset) + (fake_inputs (1, 6) << 8);
			if (atarigen_sound_to_cpu_ready) result ^= 0x04;
			if (atarigen_cpu_to_sound_ready) result ^= 0x08;
			result ^= 0x10;
			break;

		case 0x20:
			result = 0xff | (input_port_3_r (offset) << 8);
			break;
	}

	return result;
}


int vindictr_adc_r (int offset)
{
	static int last_offset;
	int result = readinputport (3 + ((last_offset / 2) & 3)) | 0xff00;
	last_offset = offset;
	return result;
}


void vindictr_update (int param)
{
	int yscroll;

	/* update the display list */
	yscroll = vindictr_update_display_list (param);

	/* reset the timer */
	if (!param)
	{
		int next = 8 - (yscroll & 7);
		timer_set (cpu_getscanlineperiod () * (double)next, next, vindictr_update);
	}
	else if (param < 240)
		timer_set (cpu_getscanlineperiod () * 8.0, param + 8, vindictr_update);
}


int vindictr_interrupt (void)
{
	timer_set (TIME_IN_USEC (Machine->drv->vblank_duration), 0, vindictr_update);
	return 4;
}


int vindictr_sound_interrupt (void)
{
	return interrupt ();
}


void vindictr_sound_reset_w (int offset, int data)
{
	atarigen_sound_reset ();
}


int vindictr_6502_switch_r (int offset)
{
	int temp = input_port_4_r (offset);

	if (!(input_port_2_r (offset) & 0x02)) temp ^= 0x80;
	if (atarigen_cpu_to_sound_ready) temp ^= 0x40;
	if (atarigen_sound_to_cpu_ready) temp ^= 0x20;

	return temp;
}

void vindictr_6502_ctl_w (int offset, int data)
{
	cpu_setbank (8, &Machine->memory_region[2][0x10000 + 0x1000 * ((data >> 6) & 3)]);
}


void vindictr_vblank_ack_w (int offset, int data)
{
	cpu_clear_pending_interrupts (0);
}


static unsigned char *vindictr_ram;

int vindictr_ram_r (int offset)
{
	return READ_WORD (&vindictr_ram[offset]);
}


void vindictr_ram_w (int offset, int data)
{
	COMBINE_WORD_MEM (&vindictr_ram[offset], data);
}


/*************************************
 *
 *		Main CPU memory handlers
 *
 *************************************/

static struct MemoryReadAddress vindictr_readmem[] =
{
	{ 0x000000, 0x09ffff, MRA_ROM },
	{ 0x0e0000, 0x0e0fff, atarigen_eeprom_r },
	{ 0x260000, 0x26002f, vindictr_input_r },
	{ 0x260030, 0x260033, atarigen_sound_r },
	{ 0x3e0000, 0x3e0fff, paletteram_word_r },
	{ 0x3f0000, 0x3f1fff, vindictr_playfieldram_r },
	{ 0x3f2000, 0x3f3fff, vindictr_spriteram_r },
	{ 0x3f4000, 0x3f4fff, vindictr_alpharam_r },
	{ 0x3f5000, 0x3f7fff, vindictr_ram_r },
	{ 0xff8000, 0xff9fff, vindictr_playfieldram_r },
	{ 0xffa000, 0xffbfff, vindictr_spriteram_r },
	{ 0xffc000, 0xffcfff, vindictr_alpharam_r },
	{ 0xffd000, 0xffffff, vindictr_ram_r },
	{ -1 }  /* end of table */
};


static struct MemoryWriteAddress vindictr_writemem[] =
{
	{ 0x000000, 0x09ffff, MWA_ROM },
	{ 0x0e0000, 0x0e0fff, atarigen_eeprom_w, &atarigen_eeprom, &atarigen_eeprom_size },
	{ 0x1f0000, 0x1fffff, atarigen_eeprom_enable_w },
	{ 0x2e0000, 0x2e0003, watchdog_reset_w },
	{ 0x360000, 0x360003, vindictr_vblank_ack_w },
	{ 0x360010, 0x360013, vindictr_latch_w },
	{ 0x360020, 0x360023, vindictr_sound_reset_w },
	{ 0x360030, 0x360033, atarigen_sound_w },
	{ 0x3e0000, 0x3e0fff, paletteram_IIIIRRRRGGGGBBBB_word_w, &paletteram },
	{ 0x3f0000, 0x3f1fff, vindictr_playfieldram_w },
	{ 0x3f2000, 0x3f3fff, vindictr_spriteram_w },
	{ 0x3f4000, 0x3f4fff, vindictr_alpharam_w },
	{ 0x3f5000, 0x3f7fff, vindictr_ram_w },
	{ 0xff8000, 0xff9fff, vindictr_playfieldram_w, &atarigen_playfieldram, &atarigen_playfieldram_size },
	{ 0xffa000, 0xffbfff, vindictr_spriteram_w, &atarigen_spriteram, &atarigen_spriteram_size },
	{ 0xffc000, 0xffcfff, vindictr_alpharam_w, &atarigen_alpharam, &atarigen_alpharam_size },
	{ 0xffd000, 0xffffff, vindictr_ram_w, &vindictr_ram },
	{ -1 }  /* end of table */
};



/*************************************
 *
 *		Sound CPU memory handlers
 *
 *************************************/

static struct MemoryReadAddress vindictr_sound_readmem[] =
{
	{ 0x0000, 0x1fff, MRA_RAM },
	{ 0x2000, 0x2001, YM2151_status_port_0_r },