📄 slapfght.c
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/***************************************************************************
Slap Fight driver by K.Wilkins Jan 1998
Slap Fight - Taito
The three drivers provided are identical, only the 1st CPU EPROM is different
which shows up in the boot message, one if Japanese domestic and the other
is English. The proms which MAY be the original slapfight ones currently
give a hardware error and fail to boot.
slapfigh - Arcade ROMs from Japan http://home.onestop.net/j_rom/
slapboot - Unknown source
slpboota - ROMS Dumped by KW 29/12/97 from unmarked Slap Fight board (bootleg?)
PCB Details from slpboota boardset:
Upper PCB (Sound board)
---------
Z80A CPU
Toshiba TMM2016BP-10 (2KB SRAM)
sf_s05 (Fujitsu MBM2764-25 8KB EPROM) - Sound CPU Code
Yamaha YM2149F (Qty 2 - Pin compatible with AY-3-8190)
Hitachi SRAM - HM6464 (8KB - Qty 4)
sf_s01 (OKI M27256-N 32KB PROM) Sprite Data (16x16 4bpp)
sf_s02 (OKI M27256-N 32KB PROM) Sprite Data
sf_s03 (OKI M27256-N 32KB PROM) Sprite Data
sf_s04 (OKI M27256-N 32KB PROM) Sprite Data
Lower PCB
---------
Z80B CPU
12MHz Xtal
Toshiba TMM2016BP-10 (2KB SRAM - Total Qty 6 = 2+2+1+1)
sf_s10 (Fujitsu MBM2764-25 8KB EPROM) Font/Character Data (8x8 2bpp)
sf_s11 (Fujitsu MBM2764-25 8KB EPROM)
sf_s06 (OKI M27256-N 32KB PROM) Tile Data (8x8 4bpp)
sf_s07 (OKI M27256-N 32KB PROM) Tile Data
sf_s08 (OKI M27256-N 32KB PROM) Tile Data
sf_s09 (OKI M27256-N 32KB PROM) Tile Data
sf_s16 (Fujitsu MBM2764-25 8KB EPROM) Colour Tables (512B used?)
sf_sH (OKI M27256-N 32KB PROM) Level Maps ???
sf_s19 (NEC S27128 16KB EPROM) CPU Code $0000-$3fff
sf_s20 (Mitsubishi M5L27128K 16KB EPROM) CPU Code $4000-$7fff
Main CPU Memory Map
-------------------
$0000-$3fff ROM (SF_S19)
$4000-$7fff ROM (SF_S20)
$8000-$bfff ROM (SF_SH) - This is a 32K ROM - Paged ????? How ????
$c000-$c7ff 2K RAM
$c800-$cfff READ:Unknown H/W WRITE:Unknown H/W (Upper PCB)
$d000-$d7ff Background RAM1
$d800-$dfff Background RAM2
$e000-$e7ff Sprite RAM
$e800-$efff READ:Unknown H/W WRITE:Unknown H/W
$f000-$f7ff READ:SF_S16 WRITE:Character RAM
$f800-$ffff READ:Unknown H/W WRITE:Attribute RAM
$c800-$cfff Appears to be RAM BUT 1st 0x10 bytes are swapped with
the sound CPU and visversa for READ OPERATIONS
Write I/O MAP
-------------
Addr Address based write Data based write
$00 Reset sound CPU
$01 Clear sound CPU reset
$02
$03
$04
$05
$06 Clear/Disable Hardware interrupt
$07 Enable Hardware interrupt
$08 LOW Bank select for SF_SH X axis character scroll reg
$09 HIGH Bank select for SF_SH X axis pixel scroll reg
$0a
$0b
$0c
$0e
$0f
Read I/O Map
------------
$00 Status regsiter - cycle 0xc7, 0x55, 0x00 (Thanks to Dave Spicer for the info)
Known Info
----------
2K Character RAM at write only address $f000-$f7fff looks to be organised
64x32 chars with the screen rotated thru 90 degrees clockwise. There
appears to be some kind of attribute(?) RAM above at $f800-$ffff organised
in the same manner.
From the look of data in the buffer it is arranged thus: 37x32 (HxW) which
would make the overall frame buffer 296x256.
Print function maybe around $09a2 based on info from log file.
$e000 looks like sprite ram, setup routines at $0008.
Sound System CPU Details
------------------------
Memory Map
$0000-$1fff ROM(SF_S5)
$a080 AY-3-8910(PSG1) Register address
$a081 AY-3-8910(PSG1) Read register
$a082 AY-3-8910(PSG1) Write register
$a090 AY-3-8910(PSG2) Register address
$a091 AY-3-8910(PSG2) Read register
$a092 AY-3-8910(PSG2) Write register
$c800-$cfff RAM(2K)
Strangely the RAM hardware registers seem to be overlaid at $c800
$00a6 routine here reads I/O ports and stores in, its not a straight
copy, the data is mangled before storage:
PSG1-E -> $c808
PSG1-F -> $c80b
PSG2-E -> $c809
PSG2-F -> $c80a - DIP Switch Bank 2 (Test mode is here)
-------------------------------GET STAR------------------------------------
following info by Luca Elia (eliavit@unina.it)
Interesting locations
---------------------
c803 credits
c806 used as a watchdog: main cpu reads then writes FF.
If FF was read, jp 0000h. Sound cpu zeroes it.
c807(1p) left 7 c809 DSW1(cpl'd)
c808(2p) down 6 c80a DSW2(cpl'd)
active_H right 5 c80b ip 1(cpl'd)
up 4
0 3
0 2
but2 1
but1 0
c21d(main) 1p lives
Main cpu writes to unmapped ports 0e,0f,05,03 at startup.
Before playing, f1 is written to e802 and 00 to port 03.
If flip screen dsw is on, ff is written to e802 an 00 to port 02, instead.
Interesting routines (main cpu)
-------------------------------
4a3 wait A irq's
432 init the Ath sprite
569 reads a sequence from e803
607 prints the Ath string (FF terminated). String info is stored at
65bc in the form of: attribute, dest. address, string address (5 bytes)
b73 checks lives. If zero, writes 0 to port 04 then jp 0000h.
Before that, sets I to FF as a flag, for the startup ram check
routine, to not alter the credit counter.
1523 put name in hi-scores?
---------------------------------------------------------------------------
***************************************************************************/
#include "driver.h"
#include "vidhrdw/generic.h"
/* #define FASTSLAPBOOT */
/* VIDHRDW */
extern unsigned char *slapfight_videoram;
extern unsigned char *slapfight_colorram;
extern int slapfight_videoram_size;
extern unsigned char *slapfight_scrollx_lo,*slapfight_scrollx_hi,*slapfight_scrolly;
void slapfight_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
void slapfight_vh_convert_color_prom(unsigned char *palette, unsigned short *colortable,const unsigned char *color_prom);
/* MACHINE */
void slapfight_init_machine(void);
extern unsigned char *slapfight_dpram;
extern int slapfight_dpram_size;
void slapfight_dpram_w(int offset, int data);
int slapfight_dpram_r(int offset);
int slapfight_port_00_r(int offset);
void slapfight_port_00_w(int offset, int data);
void slapfight_port_01_w(int offset, int data);
void getstar_port_04_w(int offset, int data);
void slapfight_port_06_w(int offset, int data);
void slapfight_port_07_w(int offset, int data);
void slapfight_port_08_w(int offset, int data);
void slapfight_port_09_w(int offset, int data);
int getstar_e803_r(int offset);
void getstar_sh_intenable_w(int offset, int data);
extern int getstar_sequence_index;
int getstar_interrupt(void);
/* Driver structure definition */
static struct MemoryReadAddress tigerh_readmem[] =
{
{ 0x0000, 0xbfff, MRA_ROM },
{ 0xc000, 0xc7ff, MRA_RAM },
{ 0xc800, 0xc80f, slapfight_dpram_r , &slapfight_dpram },
{ 0xc810, 0xcfff, MRA_RAM },
{ 0xd000, 0xd7ff, MRA_RAM },
{ 0xd800, 0xdfff, MRA_RAM },
{ 0xf000, 0xf7ff, MRA_RAM },
{ 0xf800, 0xffff, MRA_RAM },
{ -1 } /* end of table */
};
static struct MemoryReadAddress readmem[] =
{
{ 0x0000, 0x7fff, MRA_ROM },
{ 0x8000, 0xbfff, MRA_BANK1 },
{ 0xc000, 0xc7ff, MRA_RAM },
{ 0xc800, 0xc80f, slapfight_dpram_r , &slapfight_dpram },
{ 0xc810, 0xcfff, MRA_RAM },
{ 0xd000, 0xd7ff, MRA_RAM },
{ 0xd800, 0xdfff, MRA_RAM },
{ 0xe000, 0xe7ff, MRA_RAM }, /* LE 151098 */
{ 0xe803, 0xe803, getstar_e803_r }, /* LE 151098 */
{ 0xf000, 0xf7ff, MRA_RAM },
{ 0xf800, 0xffff, MRA_RAM },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress writemem[] =
{
{ 0x0000, 0xbfff, MWA_ROM },
{ 0xc000, 0xc7ff, MWA_RAM },
{ 0xc800, 0xc80f, slapfight_dpram_w, &slapfight_dpram, &slapfight_dpram_size },
{ 0xc810, 0xcfff, MWA_RAM },
{ 0xd000, 0xd7ff, videoram_w, &videoram, &videoram_size },
{ 0xd800, 0xdfff, colorram_w, &colorram },
{ 0xe000, 0xe7ff, MWA_RAM, &spriteram, &spriteram_size },
{ 0xe800, 0xe800, MWA_RAM, &slapfight_scrollx_lo },
{ 0xe801, 0xe801, MWA_RAM, &slapfight_scrollx_hi },
{ 0xe802, 0xe802, MWA_RAM, &slapfight_scrolly },
{ 0xf000, 0xf7ff, MWA_RAM, &slapfight_videoram, &slapfight_videoram_size },
{ 0xf800, 0xffff, MWA_RAM, &slapfight_colorram },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress slapbtuk_writemem[] =
{
{ 0x0000, 0xbfff, MWA_ROM },
{ 0xc000, 0xc7ff, MWA_RAM },
{ 0xc800, 0xc80f, slapfight_dpram_w, &slapfight_dpram, &slapfight_dpram_size },
{ 0xc810, 0xcfff, MWA_RAM },
{ 0xd000, 0xd7ff, videoram_w, &videoram, &videoram_size },
{ 0xd800, 0xdfff, colorram_w, &colorram },
{ 0xe000, 0xe7ff, MWA_RAM, &spriteram, &spriteram_size },
{ 0xe800, 0xe800, MWA_RAM, &slapfight_scrollx_hi },
{ 0xe802, 0xe802, MWA_RAM, &slapfight_scrolly },
{ 0xe803, 0xe803, MWA_RAM, &slapfight_scrollx_lo },
{ 0xf000, 0xf7ff, MWA_RAM, &slapfight_videoram, &slapfight_videoram_size },
{ 0xf800, 0xffff, MWA_RAM, &slapfight_colorram },
{ -1 } /* end of table */
};
static struct IOReadPort readport[] =
{
{ 0x00, 0x00, slapfight_port_00_r }, /* status register */
{ -1 } /* end of table */
};
static struct IOWritePort tigerh_writeport[] =
{
{ 0x00, 0x00, slapfight_port_00_w },
{ 0x01, 0x01, slapfight_port_01_w },
{ 0x06, 0x06, slapfight_port_06_w },
{ 0x07, 0x07, slapfight_port_07_w },
{ -1 } /* end of table */
};
static struct IOWritePort writeport[] =
{
{ 0x00, 0x00, slapfight_port_00_w },
{ 0x01, 0x01, slapfight_port_01_w },
{ 0x06, 0x06, slapfight_port_06_w },
{ 0x07, 0x07, slapfight_port_07_w },
{ 0x08, 0x08, slapfight_port_08_w }, /* select bank 0 */
{ 0x09, 0x09, slapfight_port_09_w }, /* select bank 1 */
{ -1 } /* end of table */
};
static struct MemoryReadAddress sound_readmem[] =
{
{ 0x0000, 0x1fff, MRA_ROM },
{ 0xa081, 0xa081, AY8910_read_port_0_r },
{ 0xa091, 0xa091, AY8910_read_port_1_r },
{ 0xc800, 0xc80f, MRA_RAM, &slapfight_dpram },
{ 0xc810, 0xcfff, MRA_RAM },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress sound_writemem[] =
{
{ 0x0000, 0x1fff, MWA_ROM },
{ 0xa080, 0xa080, AY8910_control_port_0_w },
{ 0xa082, 0xa082, AY8910_write_port_0_w },
{ 0xa090, 0xa090, AY8910_control_port_1_w },
{ 0xa092, 0xa092, AY8910_write_port_1_w },
{ 0xa0e0, 0xa0e0, getstar_sh_intenable_w }, /* LE 151098 (maybe a0f0 also)*/
{ 0xc800, 0xc80f, MWA_RAM, &slapfight_dpram },
{ 0xc810, 0xcfff, MWA_RAM },
{ -1 } /* end of table */
};
INPUT_PORTS_START( tigerh_input_ports )
PORT_START /* IN0 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_COCKTAIL )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_COCKTAIL )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_COCKTAIL )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_COCKTAIL )
PORT_START /* IN1 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_START /* DSW1 */
PORT_DIPNAME( 0x80, 0x80, "Player Speed", IP_KEY_NONE )
PORT_DIPSETTING( 0x80, "Normal" )
PORT_DIPSETTING( 0x00, "Fast" )
PORT_BITX( 0x40, 0x40, IPT_DIPSWITCH_NAME | IPF_TOGGLE, "Dipswitch Test", OSD_KEY_F2, IP_JOY_NONE, 0 )
PORT_DIPSETTING( 0x40, "Off" )
PORT_DIPSETTING( 0x00, "On" )
PORT_DIPNAME( 0x20, 0x20, "Flip Screen", IP_KEY_NONE )
PORT_DIPSETTING( 0x20, "Off" )
PORT_DIPSETTING( 0x00, "On" )
PORT_DIPNAME( 0x10, 0x00, "Cabinet", IP_KEY_NONE )
PORT_DIPSETTING( 0x00, "Upright" )
PORT_DIPSETTING( 0x10, "Cocktail" )
PORT_DIPNAME( 0x08, 0x08, "Demo Sounds", IP_KEY_NONE )
PORT_DIPSETTING( 0x00, "Off" )
PORT_DIPSETTING( 0x08, "On" )
PORT_DIPNAME( 0x07, 0x07, "Coinage", IP_KEY_NONE )
PORT_DIPSETTING( 0x01, "3 Coins/1 Credit" )
PORT_DIPSETTING( 0x02, "3 Coins/1 Credit" )
PORT_DIPSETTING( 0x04, "2 Coins/1 Credit" )
PORT_DIPSETTING( 0x07, "1 Coin/1 Credit" )
PORT_DIPSETTING( 0x03, "2 Coins/3 Credits" )
PORT_DIPSETTING( 0x06, "1 Coin/2 Credits" )
PORT_DIPSETTING( 0x05, "1 Coin/3 Credits" )
PORT_DIPSETTING( 0x00, "Free Play" )
PORT_START /* DSW2 */
PORT_DIPNAME( 0x80, 0x80, "Unknown", IP_KEY_NONE )
PORT_DIPSETTING( 0x00, "Off" )
PORT_DIPSETTING( 0x80, "On" )
PORT_DIPNAME( 0x40, 0x40, "Unknown", IP_KEY_NONE )
PORT_DIPSETTING( 0x00, "Off" )
PORT_DIPSETTING( 0x40, "On" )
PORT_DIPNAME( 0x20, 0x20, "Unknown", IP_KEY_NONE )
PORT_DIPSETTING( 0x00, "Off" )
PORT_DIPSETTING( 0x20, "On" )
PORT_DIPNAME( 0x10, 0x10, "Bonus Life", IP_KEY_NONE )
PORT_DIPSETTING( 0x10, "20000 80000" )
PORT_DIPSETTING( 0x00, "50000 120000" )
PORT_DIPNAME( 0x0c, 0x0c, "Difficulty", IP_KEY_NONE )
PORT_DIPSETTING( 0x0c, "Easy" )
PORT_DIPSETTING( 0x08, "Medium" )
PORT_DIPSETTING( 0x04, "Hard" )
PORT_DIPSETTING( 0x00, "Hardest" )
PORT_DIPNAME( 0x03, 0x03, "Lives", IP_KEY_NONE )
PORT_DIPSETTING( 0x01, "1" )
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x03, "3" )
PORT_DIPSETTING( 0x02, "5" )
INPUT_PORTS_END
INPUT_PORTS_START( slapfigh_input_ports )
PORT_START /* IN0 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_8WAY | IPF_COCKTAIL )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_8WAY | IPF_COCKTAIL )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_8WAY | IPF_COCKTAIL )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_8WAY | IPF_COCKTAIL )
PORT_START /* IN1 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON2 )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON2 | IPF_COCKTAIL )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_START /* DSW1 */
PORT_DIPNAME( 0x80, 0x00, "Cabinet", IP_KEY_NONE )
PORT_DIPSETTING( 0x00, "Upright" )
PORT_DIPSETTING( 0x80, "Cocktail" )
PORT_DIPNAME( 0x40, 0x40, "Flip Screen", IP_KEY_NONE )
PORT_DIPSETTING( 0x40, "Off" )
PORT_DIPSETTING( 0x00, "On" )
PORT_BITX( 0x20, 0x20, IPT_DIPSWITCH_NAME | IPF_TOGGLE, "Screen Test", OSD_KEY_F1, IP_JOY_NONE, 0 )
PORT_DIPSETTING( 0x20, "Off" )
PORT_DIPSETTING( 0x00, "On" )
PORT_DIPNAME( 0x10, 0x10, "Demo Sounds", IP_KEY_NONE )
PORT_DIPSETTING( 0x00, "Off" )
PORT_DIPSETTING( 0x10, "On" )
PORT_DIPNAME( 0x0c, 0x0c, "Coin A", IP_KEY_NONE )
PORT_DIPSETTING( 0x08, "2 Coins/1 Credit" )
PORT_DIPSETTING( 0x0c, "1 Coin/1 Credit" )
PORT_DIPSETTING( 0x00, "2 Coins/3 Credits" )
PORT_DIPSETTING( 0x04, "1 Coin/2 Credits" )
PORT_DIPNAME( 0x03, 0x03, "Coin B", IP_KEY_NONE )
PORT_DIPSETTING( 0x02, "2 Coins/1 Credit" )
PORT_DIPSETTING( 0x03, "1 Coin/1 Credit" )
PORT_DIPSETTING( 0x00, "2 Coins/3 Credits" )
PORT_DIPSETTING( 0x01, "1 Coin/2 Credits" )
PORT_START /* DSW2 */
PORT_DIPNAME( 0xc0, 0xc0, "Difficulty", IP_KEY_NONE )
PORT_DIPSETTING( 0x40, "Easy" )
PORT_DIPSETTING( 0xc0, "Medium" )
PORT_DIPSETTING( 0x80, "Hard" )
PORT_DIPSETTING( 0x00, "Hardest" )
PORT_DIPNAME( 0x30, 0x30, "Bonus Life", IP_KEY_NONE )
PORT_DIPSETTING( 0x30, "30000 100000" )
PORT_DIPSETTING( 0x10, "50000 200000" )
PORT_DIPSETTING( 0x20, "50000" )
PORT_DIPSETTING( 0x00, "100000" )
PORT_DIPNAME( 0x0c, 0x0c, "Lives", IP_KEY_NONE )
PORT_DIPSETTING( 0x08, "1" )
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x0c, "3" )
PORT_DIPSETTING( 0x04, "5" )
PORT_BITX( 0x02, 0x02, IPT_DIPSWITCH_NAME | IPF_TOGGLE, "Dipswitch Test", OSD_KEY_F2, IP_JOY_NONE, 0 )
PORT_DIPSETTING( 0x02, "Off" )
PORT_DIPSETTING( 0x00, "On" )
PORT_DIPNAME( 0x01, 0x01, "Unknown", IP_KEY_NONE )
PORT_DIPSETTING( 0x01, "Off" )
PORT_DIPSETTING( 0x00, "On" )
INPUT_PORTS_END
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