📄 digdug.c
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/***************************************************************************
-----------+---+-----------------+-------------------------
hex |r/w| D D D D D D D D |
location | | 7 6 5 4 3 2 1 0 | function
-----------+---+-----------------+-------------------------
0000-3FFF | R | D D D D D D D D | CPU 1 rom (16k)
0000-1FFF | R | D D D D D D D D | CPU 2 rom (8k)
0000-0FFF | R | D D D D D D D D | CPU 3 rom (4k)
-----------+---+-----------------+-------------------------
6800-680F | W | - - - - D D D D | Audio control
6810-681F | W | - - - - D D D D | Audio control
-----------+---+-----------------+-------------------------
6820 | W | - - - - - - - D | 0 = Reset IRQ1(latched)
6821 | W | - - - - - - - D | 0 = Reset IRQ2(latched)
6822 | W | - - - - - - - D | 0 = Reset NMI3(latched)
6823 | W | - - - - - - - D | 0 = Reset #2,#3 CPU
6825 | W | - - - - - - - D | custom 53 mode1
6826 | W | - - - - - - - D | custom 53 mode2
6827 | W | - - - - - - - D | custom 53 mode3
-----------+---+-----------------+-------------------------
6830 | W | | watchdog reset
-----------+---+-----------------+-------------------------
7000 |R/W| D D D D D D D D | custom 06 Data
7100 |R/W| D D D D D D D D | custom 06 Command
-----------+---+-----------------+-------------------------
8000-87FF |R/W| D D D D D D D D | 2k playfeild RAM
-----------+---+-----------------+-------------------------
8B80-8BFF |R/W| D D D D D D D D | 1k sprite RAM (PIC,COL)
9380-93FF |R/W| D D D D D D D D | 1k sprite RAM (VPOS,HPOS)
9B80-9BFF |R/W| D D D D D D D D | 1k sprite RAM (FLIP)
-----------+---+-----------------+-------------------------
A000 | W | - - - - - - - D | playfield select
A001 | W | - - - - - - - D | playfield select
A002 | W | - - - - - - - D | Alpha color select
A003 | W | - - - - - - - D | playfield enable
A004 | W | - - - - - - - D | playfield color select
A005 | W | - - - - - - - D | playfield color select
A007 | W | - - - - - - - D | flip video
-----------+---+-----------------+-------------------------
B800-B83F | W | D D D D D D D D | write EAROM addr, data
B800 | R | D D D D D D D D | read EAROM data
B840 | W | D D D D | write EAROM control
-----------+---+-----------------+-------------------------
Dig Dug memory map (preliminary)
CPU #1:
0000-3fff ROM
CPU #2:
0000-1fff ROM
CPU #3:
0000-0fff ROM
ALL CPUS:
8000-83ff Video RAM
8400-87ff Color RAM
8b80-8bff sprite code/color
9380-93ff sprite position
9b80-9bff sprite control
8800-9fff RAM
read:
6800-6807 dip switches (only bits 0 and 1 are used - bit 0 is DSW1, bit 1 is DSW2)
dsw1:
bit 6-7 lives
bit 3-5 bonus
bit 0-2 coins per play
dsw2: (bootleg version, the original version is slightly different)
bit 7 cocktail/upright (1 = upright)
bit 6 ?
bit 5 RACK TEST
bit 4 pause (0 = paused, 1 = not paused)
bit 3 ?
bit 2 ?
bit 0-1 difficulty
7000- custom IO chip return values
7100 custom IO chip status ($10 = command executed)
write:
6805 sound voice 1 waveform (nibble)
6811-6813 sound voice 1 frequency (nibble)
6815 sound voice 1 volume (nibble)
680a sound voice 2 waveform (nibble)
6816-6818 sound voice 2 frequency (nibble)
681a sound voice 2 volume (nibble)
680f sound voice 3 waveform (nibble)
681b-681d sound voice 3 frequency (nibble)
681f sound voice 3 volume (nibble)
6820 cpu #1 irq acknowledge/enable
6821 cpu #2 irq acknowledge/enable
6822 cpu #3 nmi acknowledge/enable
6823 if 0, halt CPU #2 and #3
6830 Watchdog reset?
7000- custom IO chip parameters
7100 custom IO chip command (see machine/galaga.c for more details)
a000-a002 starfield scroll direction/speed (only bit 0 is significant)
a003-a005 starfield blink?
a007 flip screen
Interrupts:
CPU #1 IRQ mode 1
NMI is triggered by the custom IO chip to signal the CPU to read/write
parameters
CPU #2 IRQ mode 1
CPU #3 NMI (@120Hz)
***************************************************************************/
#include "driver.h"
#include "vidhrdw/generic.h"
extern unsigned char *digdug_sharedram;
int digdug_reset_r(int offset);
int digdug_hiscore_print_r(int offset);
int digdug_sharedram_r(int offset);
void digdug_sharedram_w(int offset,int data);
void digdug_interrupt_enable_1_w(int offset,int data);
void digdug_interrupt_enable_2_w(int offset,int data);
void digdug_interrupt_enable_3_w(int offset,int data);
void digdug_halt_w(int offset,int data);
int digdug_customio_r(int offset);
void digdug_customio_w(int offset,int data);
int digdug_customio_data_r(int offset);
void digdug_customio_data_w(int offset,int data);
int digdug_interrupt_1(void);
int digdug_interrupt_2(void);
int digdug_interrupt_3(void);
void digdig_init_machine(void);
void digdug_flipscreen_w(int offset,int data);
extern unsigned char *digdug_vlatches;
void digdug_cpu_reset_w(int offset, int data);
void digdug_vh_latch_w(int offset, int data);
int digdug_vh_start(void);
void digdug_vh_stop(void);
void digdug_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
void digdug_vh_convert_color_prom(unsigned char *palette, unsigned short *colortable,const unsigned char *color_prom);
void pengo_sound_w(int offset,int data);
extern unsigned char *pengo_soundregs;
extern unsigned char digdug_hiscoreloaded;
static struct MemoryReadAddress readmem_cpu1[] =
{
{ 0x0000, 0x0000, digdug_reset_r },
{ 0x0001, 0x3fff, MRA_ROM },
{ 0x7000, 0x700f, digdug_customio_data_r },
{ 0x7100, 0x7100, digdug_customio_r },
{ 0x8000, 0x9fff, digdug_sharedram_r, &digdug_sharedram },
{ -1 } /* end of table */
};
static struct MemoryReadAddress readmem_cpu2[] =
{
{ 0x0000, 0x1fff, MRA_ROM },
{ 0x8000, 0x9fff, digdug_sharedram_r },
{ -1 } /* end of table */
};
static struct MemoryReadAddress readmem_cpu3[] =
{
{ 0x0000, 0x0fff, MRA_ROM },
{ 0x8000, 0x9fff, digdug_sharedram_r },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress writemem_cpu1[] =
{
{ 0x0000, 0x3fff, MWA_ROM },
{ 0x6820, 0x6820, digdug_interrupt_enable_1_w },
{ 0x6821, 0x6821, digdug_interrupt_enable_2_w },
{ 0x6822, 0x6822, digdug_interrupt_enable_3_w },
{ 0x6823, 0x6823, digdug_halt_w },
{ 0xa007, 0xa007, digdug_flipscreen_w },
{ 0x6825, 0x6827, MWA_NOP },
{ 0x6830, 0x6830, watchdog_reset_w },
{ 0x7000, 0x700f, digdug_customio_data_w },
{ 0x7100, 0x7100, digdug_customio_w },
{ 0x8000, 0x9fff, digdug_sharedram_w },
{ 0x8000, 0x83ff, MWA_RAM, &videoram, &videoram_size }, /* dirtybuffer[] handling is not needed because */
{ 0x8400, 0x87ff, MWA_RAM }, /* characters are redrawn every frame */
{ 0x8b80, 0x8bff, MWA_RAM, &spriteram, &spriteram_size }, /* these three are here just to initialize */
{ 0x9380, 0x93ff, MWA_RAM, &spriteram_2 }, /* the pointers. The actual writes are */
{ 0x9b80, 0x9bff, MWA_RAM, &spriteram_3 }, /* handled by digdug_sharedram_w() */
{ 0xa000, 0xa00f, digdug_vh_latch_w, &digdug_vlatches },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress writemem_cpu2[] =
{
{ 0x0000, 0x1fff, MWA_ROM },
{ 0x6821, 0x6821, digdug_interrupt_enable_2_w },
{ 0x6830, 0x6830, watchdog_reset_w },
{ 0x8000, 0x9fff, digdug_sharedram_w },
{ 0xa000, 0xa00f, digdug_vh_latch_w },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress writemem_cpu3[] =
{
{ 0x0000, 0x0fff, MWA_ROM },
{ 0x6800, 0x681f, pengo_sound_w, &pengo_soundregs },
{ 0x6822, 0x6822, digdug_interrupt_enable_3_w },
{ 0x8000, 0x9fff, digdug_sharedram_w },
{ -1 } /* end of table */
};
/* input from the outside world */
INPUT_PORTS_START( digdug_input_ports )
PORT_START /* DSW0 */
PORT_DIPNAME( 0x07, 0x01, "Coin B", IP_KEY_NONE )
PORT_DIPSETTING( 0x07, "3 Coins/1 Credit" )
PORT_DIPSETTING( 0x03, "2 Coins/1 Credit" )
PORT_DIPSETTING( 0x01, "1 Coin/1 Credit" )
PORT_DIPSETTING( 0x05, "2 Coins/3 Credits" )
PORT_DIPSETTING( 0x06, "1 Coin/2 Credits" )
PORT_DIPSETTING( 0x02, "1 Coin/3 Credits" )
PORT_DIPSETTING( 0x04, "1 Coin/6 Credits" )
PORT_DIPSETTING( 0x00, "1 Coin/7 Credits" )
/* TODO: bonus scores are different for 5 lives */
PORT_DIPNAME( 0x38, 0x18, "Bonus Life", IP_KEY_NONE )
PORT_DIPSETTING( 0x20, "10k 40k 40k" )
PORT_DIPSETTING( 0x10, "10k 50k 50k" )
PORT_DIPSETTING( 0x30, "20k 60k 60k" )
PORT_DIPSETTING( 0x08, "20k 70k 70k" )
PORT_DIPSETTING( 0x28, "10k 40k" )
PORT_DIPSETTING( 0x18, "20k 60k" )
PORT_DIPSETTING( 0x38, "10k" )
PORT_DIPSETTING( 0x00, "None" )
PORT_DIPNAME( 0xc0, 0x80, "Lives", IP_KEY_NONE )
PORT_DIPSETTING( 0x00, "1" )
PORT_DIPSETTING( 0x40, "2" )
PORT_DIPSETTING( 0x80, "3" )
PORT_DIPSETTING( 0xc0, "5" )
PORT_START /* DSW1 */
PORT_DIPNAME( 0xc0, 0x00, "Coin A", IP_KEY_NONE )
PORT_DIPSETTING( 0x40, "2 Coins/1 Credit" )
PORT_DIPSETTING( 0x00, "1 Coin/1 Credit" )
PORT_DIPSETTING( 0xc0, "2 Coins/3 Credits" )
PORT_DIPSETTING( 0x80, "1 Coin/2 Credits" )
PORT_DIPNAME( 0x20, 0x20, "Freeze", IP_KEY_NONE )
PORT_DIPSETTING( 0x20, "Off" )
PORT_DIPSETTING( 0x00, "On" )
PORT_DIPNAME( 0x10, 0x10, "Demo Sounds", IP_KEY_NONE )
PORT_DIPSETTING( 0x10, "Off" )
PORT_DIPSETTING( 0x00, "On" )
PORT_DIPNAME( 0x08, 0x00, "Allow Continue", IP_KEY_NONE )
PORT_DIPSETTING( 0x08, "No" )
PORT_DIPSETTING( 0x00, "Yes" )
PORT_DIPNAME( 0x04, 0x04, "Cabinet", IP_KEY_NONE )
PORT_DIPSETTING( 0x04, "Upright" )
PORT_DIPSETTING( 0x00, "Cocktail" )
PORT_DIPNAME( 0x03, 0x00, "Difficulty", IP_KEY_NONE )
PORT_DIPSETTING( 0x00, "Easy" )
PORT_DIPSETTING( 0x02, "Medium" )
PORT_DIPSETTING( 0x01, "Hard" )
PORT_DIPSETTING( 0x03, "Hardest" )
PORT_START /* FAKE */
/* The player inputs are not memory mapped, they are handled by an I/O chip. */
/* These fake input ports are read by digdug_customio_data_r() */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY )
PORT_BITX(0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_IMPULSE,
IP_NAME_DEFAULT, IP_KEY_DEFAULT, IP_JOY_DEFAULT, 1 )
PORT_BITX(0x20, IP_ACTIVE_LOW, IPT_BUTTON1, 0, IP_KEY_PREVIOUS, IP_JOY_PREVIOUS, 0 )
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START /* FAKE */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP | IPF_4WAY | IPF_COCKTAIL )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT | IPF_4WAY | IPF_COCKTAIL )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN | IPF_4WAY | IPF_COCKTAIL )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT | IPF_4WAY | IPF_COCKTAIL )
PORT_BITX(0x10, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_IMPULSE | IPF_COCKTAIL,
IP_NAME_DEFAULT, IP_KEY_DEFAULT, IP_JOY_DEFAULT, 1 )
PORT_BITX(0x20, IP_ACTIVE_LOW, IPT_BUTTON1 | IPF_COCKTAIL, 0, IP_KEY_PREVIOUS, IP_JOY_PREVIOUS, 0 )
PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
PORT_START /* FAKE */
PORT_BITX(0x01, IP_ACTIVE_LOW, IPT_COIN1 | IPF_IMPULSE,
IP_NAME_DEFAULT, IP_KEY_DEFAULT, IP_JOY_DEFAULT, 1 )
PORT_BITX(0x02, IP_ACTIVE_LOW, IPT_COIN2 | IPF_IMPULSE,
IP_NAME_DEFAULT, IP_KEY_DEFAULT, IP_JOY_DEFAULT, 1 )
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