📄 xain.c
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/***************************************************************************
Xain'd Sleena (TECHNOS), Solar Warrior (TAITO).
By Carlos A. Lozano & Rob Rosenbrock & Phil Stroffolino
- MC68B09EP (2)
- 6809EP (1)
- 68705 (only in Solar Warrior)
- ym2203 (2)
Remaining Issues:
- Fix the random loops. (yet???)
- Get better music.
- Don't understood the timers.
- Implement the sprite-plane2 priorities.
- 68705 in Solar Warrior. (partial missing sprites)
- Optimize. (For example, pallete updates)
- CPU speed may be wrong
***************************************************************************/
#include "driver.h"
#include "vidhrdw/generic.h"
#include "m6809/m6809.h"
unsigned char *xain_sharedram;
static int xain_timer = 0xff;
unsigned char waitIRQA;
unsigned char waitIRQB;
unsigned char waitIRQsound;
void xain_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
int xain_vh_start(void);
void xain_vh_stop(void);
void xain_scrollxP2_w(int offset,int data);
void xain_scrollyP2_w(int offset,int data);
void xain_scrollxP3_w(int offset,int data);
void xain_scrollyP3_w(int offset,int data);
void xain_videoram2_w(int offset,int data);
extern unsigned char *xain_videoram;
extern int xain_videoram_size;
extern unsigned char *xain_videoram2;
extern int xain_videoram2_size;
void xain_init_machine(void)
{
}
int xain_sharedram_r(int offset)
{
return xain_sharedram[offset];
}
void xain_sharedram_w(int offset, int data)
{
xain_sharedram[offset] = data;
}
void xainCPUA_bankswitch_w(int offset,int data)
{
unsigned char *RAM = Machine->memory_region[Machine->drv->cpu[0].memory_region];
if (data&0x08) {cpu_setbank(1,&RAM[0x10000]);}
else {cpu_setbank(1,&RAM[0x4000]);}
}
void xainCPUB_bankswitch_w(int offset,int data)
{
unsigned char *RAM = Machine->memory_region[Machine->drv->cpu[1].memory_region];
if (data&0x1) {cpu_setbank(2,&RAM[0x10000]);}
else {cpu_setbank(2,&RAM[0x4000]);}
}
int xain_timer_r(int offset)
{
return (xain_timer);
}
int solarwar_slapstic_r(int offset)
{
return (0x4d);
}
void xainB_forcedIRQ_w(int offset,int data)
{
waitIRQB = 1;
cpu_spin();
}
void xainA_forcedIRQ_w(int offset,int data)
{
waitIRQA = 1;
cpu_spin();
}
void xainA_writesoundcommand_w(int offset, int data)
{
waitIRQsound = 1;
soundlatch_w(offset,data);
}
static struct MemoryReadAddress readmem[] =
{
{ 0x0000, 0x1fff, MRA_RAM, &xain_sharedram},
{ 0x2000, 0x39ff, MRA_RAM },
{ 0x3a00, 0x3a00, input_port_0_r },
{ 0x3a01, 0x3a01, input_port_1_r },
{ 0x3a02, 0x3a02, input_port_2_r },
{ 0x3a03, 0x3a03, input_port_3_r },
{ 0x3a04, 0x3a04, solarwar_slapstic_r},
{ 0x3a05, 0x3a05, xain_timer_r}, /* how?? */
{ 0x3a06, 0x3fff, MRA_RAM },
{ 0x4000, 0x7fff, MRA_BANK1 },
{ 0x8000, 0xffff, MRA_ROM },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress writemem[] =
{
{ 0x0000, 0x1fff, MWA_RAM, &xain_sharedram},
{ 0x2000, 0x27ff, MWA_RAM, &xain_videoram, &xain_videoram_size },
{ 0x2800, 0x2fff, xain_videoram2_w, &xain_videoram2, &xain_videoram2_size },
{ 0x3000, 0x37ff, videoram_w, &videoram, &videoram_size },
{ 0x3800, 0x397f, MWA_RAM, &spriteram, &spriteram_size },
{ 0x3980, 0x39ff, MWA_RAM },
{ 0x3a00, 0x3a01, xain_scrollxP2_w},
{ 0x3a02, 0x3a03, xain_scrollyP2_w},
{ 0x3a04, 0x3a05, xain_scrollxP3_w},
{ 0x3a06, 0x3a07, xain_scrollyP3_w},
{ 0x3a08, 0x3a08, xainA_writesoundcommand_w},
{ 0x3a09, 0x3a0b, MWA_RAM },
{ 0x3a0c, 0x3a0c, xainB_forcedIRQ_w},
{ 0x3a0d, 0x3a0e, MWA_RAM },
{ 0x3a0f, 0x3a0f, xainCPUA_bankswitch_w},
{ 0x3a10, 0x3bff, MWA_RAM },
{ 0x3c00, 0x3dff, paletteram_xxxxBBBBGGGGRRRR_split1_w, &paletteram },
{ 0x3e00, 0x3fff, paletteram_xxxxBBBBGGGGRRRR_split2_w, &paletteram_2 },
{ 0x4000, 0xffff, MWA_ROM },
{ -1 } /* end of table */
};
static struct MemoryReadAddress readmemB[] =
{
{ 0x0000, 0x1fff, xain_sharedram_r },
{ 0x2000, 0x3fff, MRA_RAM },
{ 0x4000, 0x7fff, MRA_BANK2 },
{ 0x8000, 0xffff, MRA_ROM },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress writememB[] =
{
{ 0x0000, 0x1fff, xain_sharedram_w },
{ 0x2000, 0x27ff, xainA_forcedIRQ_w},
{ 0x2800, 0x2fff, MWA_RAM },
{ 0x3000, 0x37ff, xainCPUB_bankswitch_w},
{ 0x3800, 0x3fff, MWA_RAM },
{ 0x4000, 0xffff, MWA_ROM },
{ -1 } /* end of table */
};
static struct MemoryReadAddress readmem_sound[] =
{
{ 0x0000, 0x07ff, MRA_RAM },
{ 0x1000, 0x1000, soundlatch_r },
{ 0x8000, 0xffff, MRA_ROM },
{ -1 } /* end of table */
};
static struct MemoryWriteAddress writemem_sound[] =
{
{ 0x0000, 0x07ff, MWA_RAM },
{ 0x2800, 0x2800, YM2203_control_port_0_w },
{ 0x2801, 0x2801, YM2203_write_port_0_w },
{ 0x3000, 0x3000, YM2203_control_port_1_w },
{ 0x3001, 0x3001, YM2203_write_port_1_w },
{ 0x4000, 0xffff, MWA_ROM },
{ -1 } /* end of table */
};
static int xainA_interrupt(void)
{
xain_timer ^= 0x38;
if (waitIRQA)
{ waitIRQA = 0;
return (M6809_INT_IRQ);}
return (M6809_INT_FIRQ | M6809_INT_NMI);
}
static int xainB_interrupt(void)
{
if (waitIRQB)
{ waitIRQB = 0;
return (M6809_INT_IRQ);}
return ignore_interrupt();
}
static int xain_sound_interrupt(void)
{
if (waitIRQsound)
{ waitIRQsound = 0;
return (M6809_INT_IRQ);}
return (M6809_INT_FIRQ);
}
INPUT_PORTS_START( input_ports )
PORT_START /* IN0 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_START1 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START2 )
PORT_START /* IN1 */
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON1 )
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 )
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_START /* DSW0 */
PORT_DIPNAME( 0x03, 0x03, "Coin B", IP_KEY_NONE )
PORT_DIPSETTING( 0x00, "2 Coins/1 Credit" )
PORT_DIPSETTING( 0x03, "1 Coin/1 Credit" )
PORT_DIPSETTING( 0x02, "1 Coin/2 Credits" )
PORT_DIPSETTING( 0x01, "1 Coin/3 Credits" )
PORT_DIPNAME( 0x0c, 0x0c, "Coin A", IP_KEY_NONE )
PORT_DIPSETTING( 0x00, "2 Coins/1 Credit" )
PORT_DIPSETTING( 0x0c, "1 Coin/1 Credit" )
PORT_DIPSETTING( 0x08, "1 Coin/2 Credits" )
PORT_DIPSETTING( 0x04, "1 Coin/3 Credits" )
PORT_DIPNAME( 0x10, 0x10, "Demo Sounds", IP_KEY_NONE )
PORT_DIPSETTING( 0x00, "Off" )
PORT_DIPSETTING( 0x10, "On" )
PORT_DIPNAME( 0x20, 0x20, "Allow Continue", IP_KEY_NONE )
PORT_DIPSETTING( 0x00, "No" )
PORT_DIPSETTING( 0x20, "Yes" )
PORT_DIPNAME( 0x40, 0x40, "Screen Type", IP_KEY_NONE )
PORT_DIPSETTING( 0x00, "On" )
PORT_DIPSETTING( 0x40, "Off" )
PORT_DIPNAME( 0x80, 0x80, "Flip Screen", IP_KEY_NONE )
PORT_DIPSETTING( 0x80, "Off" )
PORT_DIPSETTING( 0x00, "On" )
PORT_START /* DSW1 */
PORT_DIPNAME( 0x03, 0x03, "Difficulty", IP_KEY_NONE )
PORT_DIPSETTING( 0x03, "Easy" )
PORT_DIPSETTING( 0x02, "Normal" )
PORT_DIPSETTING( 0x01, "Hard" )
PORT_DIPSETTING( 0x00, "Hardest" )
PORT_DIPNAME( 0x0c, 0x0c, "Game Time", IP_KEY_NONE )
PORT_DIPSETTING( 0x0c, "Slow" )
PORT_DIPSETTING( 0x08, "Normal" )
PORT_DIPSETTING( 0x04, "Fast" )
PORT_DIPSETTING( 0x00, "Very Fast" )
PORT_DIPNAME( 0x30, 0x30, "Bonus Life", IP_KEY_NONE )
PORT_DIPSETTING( 0x30, "20000 70000 70000" )
PORT_DIPSETTING( 0x20, "30000 80000 80000" )
PORT_DIPSETTING( 0x10, "20000 80000" )
PORT_DIPSETTING( 0x00, "30000 80000" )
PORT_DIPNAME( 0xC0, 0xC0, "Lives", IP_KEY_NONE )
PORT_DIPSETTING( 0xC0, "2")
PORT_DIPSETTING( 0x80, "3")
PORT_DIPSETTING( 0x40, "5")
PORT_BITX( 0, 0x00, IPT_DIPSWITCH_SETTING | IPF_CHEAT, "Infinite", IP_KEY_NONE, IP_JOY_NONE, 0 )
INPUT_PORTS_END
static struct GfxLayout charlayout =
{
8,8,
1024,
4,
{ 0, 2, 4, 6 },
{ 1, 0, 65, 64, 129, 128, 193, 192 },
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