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📄 opcode4.c

📁 这个是延伸mame的在wince平台下的游戏模拟器的代码
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void op_4128(void) /* CHK */
{
        ULONG srcreg = (opcode & 7);
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       CPTR srca = regs.a[srcreg] + (LONG)(WORD)nextiword();
        LONG src = get_long(srca);
{       LONG dst = regs.d[dstreg].D;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}
void op_4130(void) /* CHK */
{
        ULONG srcreg = (opcode & 7);
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       CPTR srca = get_disp_ea(regs.a[srcreg]);
{       LONG src = get_long(srca);
{       LONG dst = regs.d[dstreg].D;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}}
void op_4138(void) /* CHK */
{
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       CPTR srca = (LONG)(WORD)nextiword();
        LONG src = get_long(srca);
{       LONG dst = regs.d[dstreg].D;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}
void op_4139(void) /* CHK */
{
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       CPTR srca = nextilong();
        LONG src = get_long(srca);
{       LONG dst = regs.d[dstreg].D;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}
void op_413a(void) /* CHK */
{
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       CPTR srca = m68k_getpc();
        srca += (LONG)(WORD)nextiword();
{       LONG src = get_long(srca);
{       LONG dst = regs.d[dstreg].D;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}}
void op_413b(void) /* CHK */
{
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       CPTR srca = get_disp_ea(m68k_getpc());
{       LONG src = get_long(srca);
{       LONG dst = regs.d[dstreg].D;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}}
void op_413c(void) /* CHK */
{
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       LONG src = nextilong();
{       LONG dst = regs.d[dstreg].D;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}
void op_4180(void) /* CHK */
{
        ULONG srcreg = (opcode & 7);
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       WORD src = regs.d[srcreg].W.l;
{       WORD dst = regs.d[dstreg].W.l;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}
void op_4190(void) /* CHK */
{
        ULONG srcreg = (opcode & 7);
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       CPTR srca = regs.a[srcreg];
        WORD src = get_word(srca);
{       WORD dst = regs.d[dstreg].W.l;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}
void op_4198(void) /* CHK */
{
        ULONG srcreg = (opcode & 7);
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       CPTR srca = regs.a[srcreg];
        WORD src = get_word(srca);
{       regs.a[srcreg] += 2;
{       WORD dst = regs.d[dstreg].W.l;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}}
void op_41a0(void) /* CHK */
{
        ULONG srcreg = (opcode & 7);
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       regs.a[srcreg] -= 2;
{       CPTR srca = regs.a[srcreg];
        WORD src = get_word(srca);
{       WORD dst = regs.d[dstreg].W.l;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}}
void op_41a8(void) /* CHK */
{
        ULONG srcreg = (opcode & 7);
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       CPTR srca = regs.a[srcreg] + (LONG)(WORD)nextiword();
        WORD src = get_word(srca);
{       WORD dst = regs.d[dstreg].W.l;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}
void op_41b0(void) /* CHK */
{
        ULONG srcreg = (opcode & 7);
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       CPTR srca = get_disp_ea(regs.a[srcreg]);
{       WORD src = get_word(srca);
{       WORD dst = regs.d[dstreg].W.l;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}}
void op_41b8(void) /* CHK */
{
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       CPTR srca = (LONG)(WORD)nextiword();
        WORD src = get_word(srca);
{       WORD dst = regs.d[dstreg].W.l;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}
void op_41b9(void) /* CHK */
{
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       CPTR srca = nextilong();
        WORD src = get_word(srca);
{       WORD dst = regs.d[dstreg].W.l;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}
void op_41ba(void) /* CHK */
{
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       CPTR srca = m68k_getpc();
        srca += (LONG)(WORD)nextiword();
{       WORD src = get_word(srca);
{       WORD dst = regs.d[dstreg].W.l;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}}
void op_41bb(void) /* CHK */
{
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       CPTR srca = get_disp_ea(m68k_getpc());
{       WORD src = get_word(srca);
{       WORD dst = regs.d[dstreg].W.l;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}}
void op_41bc(void) /* CHK */
{
        ULONG dstreg = (opcode >> 9) & 7;
{       CPTR oldpc = m68k_getpc();
{       WORD src = nextiword();
{       WORD dst = regs.d[dstreg].W.l;
        if ((LONG)dst < 0) { NFLG=1; Exception(6,oldpc-2); }
        else if (dst > src) { NFLG=0; Exception(6,oldpc-2); }
}}}}
void op_41d0(void) /* LEA */
{
        ULONG srcreg = (opcode & 7);
        ULONG dstreg = (opcode >> 9) & 7;
{{      CPTR srca = regs.a[srcreg];
{       regs.a[dstreg] = (srca);
}}}}
void op_41e8(void) /* LEA */
{
        ULONG srcreg = (opcode & 7);
        ULONG dstreg = (opcode >> 9) & 7;
{{      CPTR srca = regs.a[srcreg] + (LONG)(WORD)nextiword();
{       regs.a[dstreg] = (srca);
}}}}
void op_41f0(void) /* LEA */
{
        ULONG srcreg = (opcode & 7);
        ULONG dstreg = (opcode >> 9) & 7;
{{      CPTR srca = get_disp_ea(regs.a[srcreg]);
{       regs.a[dstreg] = (srca);
}}}}
void op_41f8(void) /* LEA */
{
        ULONG dstreg = (opcode >> 9) & 7;
{{      CPTR srca = (LONG)(WORD)nextiword();
{       regs.a[dstreg] = (srca);
}}}}
void op_41f9(void) /* LEA */
{
        ULONG dstreg = (opcode >> 9) & 7;
{{      CPTR srca = nextilong();
{       regs.a[dstreg] = (srca);
}}}}
void op_41fa(void) /* LEA */
{
        ULONG dstreg = (opcode >> 9) & 7;
{{      CPTR srca = m68k_getpc();
        srca += (LONG)(WORD)nextiword();
{       regs.a[dstreg] = (srca);
}}}}
void op_41fb(void) /* LEA */
{
        ULONG dstreg = (opcode >> 9) & 7;
{{      CPTR srca = get_disp_ea(m68k_getpc());
{       regs.a[dstreg] = (srca);
}}}}
void op_4200(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
        regs.d[srcreg].B.l = 0;
{{      CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4210(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg];
        put_byte(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4218(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg];
{       regs.a[srcreg] += areg_byteinc[srcreg];
        put_byte(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}}
void op_4220(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      regs.a[srcreg] -= areg_byteinc[srcreg];
{       CPTR srca = regs.a[srcreg];
        put_byte(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}}
void op_4228(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg] + (LONG)(WORD)nextiword();
        put_byte(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4230(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = get_disp_ea(regs.a[srcreg]);
        put_byte(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4238(void) /* CLR */
{
{{      CPTR srca = (LONG)(WORD)nextiword();
        put_byte(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4239(void) /* CLR */
{
{{      CPTR srca = nextilong();
        put_byte(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4240(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
        regs.d[srcreg].W.l = 0;
{{      CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4250(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg];
        put_word(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4258(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg];
{       regs.a[srcreg] += 2;
        put_word(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}}
void op_4260(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      regs.a[srcreg] -= 2;
{       CPTR srca = regs.a[srcreg];
        put_word(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}}
void op_4268(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg] + (LONG)(WORD)nextiword();
        put_word(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4270(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = get_disp_ea(regs.a[srcreg]);
        put_word(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4278(void) /* CLR */
{
{{      CPTR srca = (LONG)(WORD)nextiword();
        put_word(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4279(void) /* CLR */
{
{{      CPTR srca = nextilong();
        put_word(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4280(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
        regs.d[srcreg].D = (0);
{{      CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4290(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg];
        put_long(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4298(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg];
{       regs.a[srcreg] += 4;
        put_long(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}}
void op_42a0(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      regs.a[srcreg] -= 4;
{       CPTR srca = regs.a[srcreg];
        put_long(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}}
void op_42a8(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = regs.a[srcreg] + (LONG)(WORD)nextiword();
        put_long(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_42b0(void) /* CLR */
{
        ULONG srcreg = (opcode & 7);
{{      CPTR srca = get_disp_ea(regs.a[srcreg]);
        put_long(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_42b8(void) /* CLR */
{
{{      CPTR srca = (LONG)(WORD)nextiword();
        put_long(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_42b9(void) /* CLR */
{
{{      CPTR srca = nextilong();
        put_long(srca,0);
        CLEARFLGS;
        ZFLG = ZTRUE ;
}}}
void op_4400(void) /* NEG */
{
        ULONG srcreg = (opcode & 7);
{{      BYTE src = regs.d[srcreg].B.l;
{{ULONG dst = ((BYTE)(0)) - ((BYTE)(src));
        regs.d[srcreg].B.l = dst;
        ZFLG = ((BYTE)(dst)) == 0;
{       int flgs = ((BYTE)(src)) < 0;
        int flgn = ((BYTE)(dst)) < 0;
        VFLG = (flgs && flgn);
        CFLG = regs.x = ((UBYTE)(src)) > ((UBYTE)(0));
        NFLG = flgn != 0;
}}}}}}
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