f2810.h

初学者要的DSP2810的初始化汇编程序

;---------------------PLL, Clocking, Watchdog, and Low-Power Mode registers---------------------/

HISPCP             .set  701Ah      ;High-Speed Peripheral Clock Prescaler register for HSPCLK clock
LOSPCP             .set  701Bh      ;Low-Speed Peripheral Clock Prescaler register for LSPCLK clock
PCLKCR             .set  701Ch      ;Peripheral Clock Control register
LPMCR0             .set  701Eh      ;Low Power Mode Control register 0
LPMCR1             .set  701Fh      ;Low Power Mode Control register 1
PLLCR              .set  7021h      ;PLL Control register
SCSR               .set  7022h      ;System Control & Status register
WDCNTR             .set  7023h      ;Watchdog Counter register
WDKEY              .set  7025h      ;Watchdog Reset Key register
WDCR               .set  7029h      ;Watchdog Control register

;-------------------Flash/OTP Configuration registers---------------------/

FOPT               .set  0A80h      ;Flash Option register
FPWR               .set  0A82h      ;Flash Power Modes register
FSTATUS            .set  0A83h      ;Status register
FSTDBYWAIT         .set  0A84h      ;Flash Sleep To Standby Wait register
FACTIVEWAIT        .set  0A85h      ;Flash Standby To Active Wait register
FBANKWAIT          .set  0A86h      ;Flash Read Access Wait State register
FOTPWAIT           .set  0A87h      ;OTP Read Access Wait State register

;----------------------PIE Configuration registers----------------------/

PIECTRL            .set  0CE0h     ;PIE, Control register
PIEACK             .set  0CE1h     ;PIE, Acknowledge register
PIEIER1            .set  0CE2h     ;PIE, INT1 Group Enable register
PIEIFR1            .set  0CE3h     ;PIE, INT1 Group Flag register
PIEIER2            .set  0CE4h     ;PIE, INT2 Group Enable register
PIEIFR2            .set  0CE5h     ;PIE, INT2 Group Flag register
PIEIER3            .set  0CE6h     ;PIE, INT3 Group Enable register
PIEIFR3            .set  0CE7h     ;PIE, INT3 Group Flag register
PIEIER4            .set  0CE8h     ;PIE, INT4 Group Enable register
PIEIFR4            .set  0CE9h     ;PIE, INT4 Group Flag register
PIEIER5            .set  0CEAh     ;PIE, INT5 Group Enable register
PIEIFR5            .set  0CEBh     ;PIE, INT5 Group Flag register
PIEIER6            .set  0CECh     ;PIE, INT6 Group Enable register
PIEIFR6            .set  0CEDh     ;PIE, INT6 Group Flag register
PIEIER7            .set  0CEEh     ;PIE, INT7 Group Enable register
PIEIFR7            .set  0CEFh     ;PIE, INT7 Group Flag register
PIEIER8            .set  0CF0h     ;PIE, INT8 Group Enable register
PIEIFR8            .set  0CF1h     ;PIE, INT8 Group Flag register
PIEIER9            .set  0CF2h     ;PIE, INT9 Group Enable register
PIEIFR9            .set  0CF3h     ;PIE, INT9 Group Flag register
PIEIER10           .set  0CF4h     ;PIE, INT10 Group Enable register
PIEIFR10           .set  0CF5h     ;PIE, INT10 Group Flag register
PIEIER11           .set  0CF6h     ;PIE, INT11 Group Enable register
PIEIFR11           .set  0CF7h     ;PIE, INT11 Group Flag register
PIEIER12           .set  0CF8h     ;PIE, INT12 Group Enable register
PIEIFR12           .set  0CF9h     ;PIE, INT12 Group Flag register

;------------------External Interrupts registers-------------------/

XINT1CR            .set   7070h     ;XINT1 control register
XINT2CR            .set   7071h     ;XINT2 control register
XNMICR             .set   7077h     ;XNMI control register
XINT1CTR           .set   7078h     ;XINT1 counter register
XINT2CTR           .set   7079h     ;XINT2 counter register
XNMICTR            .set   707Fh     ;XNMI counter register

;----------------------------------ADC registers---------------------------------------/  

ADCTRL1            .set  7100h     ;ADC Control register 1
ADCTRL2            .set  7101h     ;ADC Control register 2
ADCMAXCONV         .set  7102h     ;ADC Maximum Conversion Channels register
ADCCHSELSEQ1       .set  7103h     ;ADC Channel Select Sequencing Control register 1
ADCCHSELSEQ2       .set  7104h     ;ADC Channel Select Sequencing Control register 2
ADCCHSELSEQ3       .set  7105h     ;ADC Channel Select Sequencing Control register 3
ADCCHSELSEQ4       .set  7106h     ;ADC Channel Select Sequencing Control register 4
ADCASEQSR          .set  7107h     ;ADC Auto-Sequence Status register
ADCRESULT0         .set  7108h     ;ADC Conversion Result Buffer register 0
ADCRESULT1         .set  7109h     ;ADC Conversion Result Buffer register 1
ADCRESULT2         .set  710Ah     ;ADC Conversion Result Buffer register 2
ADCRESULT3         .set  710Bh     ;ADC Conversion Result Buffer register 3
ADCRESULT4         .set  710Ch     ;ADC Conversion Result Buffer register 4
ADCRESULT5         .set  710Dh     ;ADC Conversion Result Buffer register 5
ADCRESULT6         .set  710Eh     ;ADC Conversion Result Buffer register 6
ADCRESULT7         .set  710Fh     ;ADC Conversion Result Buffer register 7
ADCRESULT8         .set  7110h     ;ADC Conversion Result Buffer register 8
ADCRESULT9         .set  7111h     ;ADC Conversion Result Buffer register 9
ADCRESULT10        .set  7112h     ;ADC Conversion Result Buffer register 10
ADCRESULT11        .set  7113h     ;ADC Conversion Result Buffer register 11
ADCRESULT12        .set  7114h     ;ADC Conversion Result Buffer register 12
ADCRESULT13        .set  7115h     ;ADC Conversion Result Buffer register 13
ADCRESULT14        .set  7116h     ;ADC Conversion Result Buffer register 14
ADCRESULT15        .set  7117h     ;ADC Conversion Result Buffer register 15
ADCTRL3            .set  7118h     ;ADC Control register 3
ADCST              .set  7119h     ;ADC Status register

;-----------------------XINTF Configuration and Control register-----------------/

XTIMING0           .set  0B20h     ;XINTF Timing register, Zone 0
XTIMING1           .set  0B22h     ;XINTF Timing register, Zone 1
XTIMING2           .set  0B24h     ;XINTF Timing register, Zone 2
XTIMING6           .set  0B2Ch     ;XINTF Timing register, Zone 6
XTIMING7           .set  0B2Eh     ;XINTF Timing register, Zone 7
XINTCNF2           .set  0B34h     ;XINTF Configuration register
XBANK              .set  0B38h     ;XINTF Bank Control register
XREVISION          .set  0B3Ah     ;XINTF Revision register

;--------------------------------MUX  register------------------------------------/ 

GPAMUX             .set    70C0H       ;GPIO A Mux Control register
GPADIR             .set    70C1H       ;GPIO A Direction Control register
GPAQUAL            .set    70C2H       ;GPIO A Input Qualification Control register
GPBMUX             .set    70C4H       ;GPIO B Mux Control register 
GPBDIR             .set    70C5H       ;GPIO B Direction Control register
GPBQUAL            .set    70C6H       ;GPIO B Input Qualification Control register
GPDMUX             .set    70CCH       ;GPIO D Mux Control register
GPDDIR             .set    70CDH       ;GPIO D Direction Control register
GPDQUAL            .set    70CEH       ;GPIO D Input Qualification Control register
GPEMUX             .set    70D0H       ;GPIO E Mux Control register
GPEDIR             .set    70D1H       ;GPIO E Direction Control register
GPEQUAL            .set    70D2H       ;GPIO E Input Qualification Control register
GPFMUX             .set    70D4H       ;GPIO F Mux Control register
GPFDIR             .set    70D5H       ;GPIO F Direction Control register
GPGMUX             .set    70D8H       ;GPIO G Mux Control register 
GPGDIR             .set    70D9H       ;GPIO G Direction Control register

;---------------------------GPIO Data registers---------------------------/

GPADAT             .set    70E0h     ;GPIO A Data register
GPASET             .set    70E1h     ;GPIO A Set register
GPACLEAR           .set    70E2h     ;GPIO A Clear register
GPATOGGLE          .set    70E3h     ;GPIO A Toggle register
GPBDAT             .set    70E4h     ;GPIO B Data register
GPBSET             .set    70E5h     ;GPIO B Set register
GPBCLEAR           .set    70E6h     ;GPIO B Clear register
GPBTOGGLE          .set    70E7h     ;GPIO B Toggle register
GPDDAT             .set    70ECh     ;GPIO D Data register
GPDSET             .set    70EDh     ;GPIO D Set register
GPDCLEAR           .set    70EEh     ;GPIO D Clear register
GPDTOGGLE          .set    70EFh     ;GPIO D Toggle register
GPEDAT             .set    70F0h     ;GPIO E Data register
GPESET             .set    70F1h     ;GPIO E Set register
GPECLEAR           .set    70F2h     ;GPIO E Clear register
GPETOGGLE          .set    70F3h     ;GPIO E Toggle register
GPFDAT             .set    70F4h     ;GPIO F Data register
GPFSET             .set    70F5h     ;GPIO F Set register
GPFCLEAR           .set    70F6h     ;GPIO F Clear register
GPFTOGGLE          .set    70F7h     ;GPIO F Toggle register
GPGDAT             .set    70F8h     ;GPIO G Data register
GPGSET             .set    70F9h     ;GPIO G Set register