commonchip.cfg

flash programming STI 5.5.1.4 DCU3

true= 1
false=0

##############################################################
##
## General procedures for accessing unaligned and big endian registers
##
##############################################################

proc LSB value=$1 {
  ## Return the least significant byte of the operand
  $$ = (value & 0xFF)
}

proc ReadUnalignedRegister addr=$1 bytes=$2 value=0 i=0 {
  ## Read a value which is not aligned but is little endian
  ## Read at decrementing addresses to get bytes in little endian order
  for (i=bytes-1;i>=0;i--) {
    value = (value << 8) | (display -r (addr+i) -q -c)
  }
  $$ = value
}

proc WriteUnalignedRegister addr=$1 bytes=$2 value=$3 i=0 {
  ## Write a value which is not aligned but is little endian
  for (i=0;i<bytes;i++) {
    modify (addr+i) (LSB(value)) -q -c
    value = (value >> 8)
  }
}

proc UnalignedRegister op=$1 name=$2 addr=$3 bytes=$4 {
  ## For accessing unaligned little endian registers using -p option of register command
  $$ = (ReadUnalignedRegister(addr, bytes))
  if (op == 0) {
    write (name) = -x ($$)
  }
}

proc Unaligned2Register {
  ## For accessing unaligned little endian 2 byte registers using -p option of register command
  $$ = UnalignedRegister ($1, $2, $3, 2)
}

proc Unaligned4Register {
  ## For accessing unaligned little endian 4 byte registers using -p option of register command
  $$ = UnalignedRegister ($1, $2, $3, 4)
}

proc ReadBigEndianRegister addr=$1 bytes=$2 value=0 i=0 {
  ## Read a value which is big endian, and may not be aligned
  for (i=0;i<bytes;i++) {
    value = (value << 8) | (display -r (addr+i) -q -c)
  }
  $$ = value
}

proc WriteBigEndianRegister addr=$1 bytes=$2 value=$3 i=0 {
  ## Write a value which is big endian and may not be aligned
  for (i=bytes-1;i>=0;i--) {
    modify (addr+i) (LSB(value)) -q -c
    value = (value >> 8)
  }
}

proc BigEndianRegister op=$1 name=$2 addr=$3 bytes=$4 {
  ## For accessing big endian registers using -p option of register command
  $$ = (ReadBigEndianRegister(addr, bytes))
  if (op == 0) {
    write (name) = -x ($$)
  }
}

proc BigEndian2Register {
  ## For accessing big endian 2 byte registers using -p option of register command
  $$ = BigEndianRegister ($1, $2, $3, 2)
}

proc BigEndian3Register {
  ## For accessing big endian 3 byte registers using -p option of register command
  $$ = BigEndianRegister ($1, $2, $3, 3)
}

proc BigEndian4Register {
  ## For accessing big endian 4 byte registers using -p option of register command
  $$ = BigEndianRegister ($1, $2, $3, 4)
}

proc ReadSerialRegister addr=$1 bytes=$2 value=0 i=0 {
  ## Read a serial register where MSB is read first
  for (i=0;i<bytes;i++) {
    value = (value << 8) | (display -r (addr) -q -c)
  }
  $$ = value
}

proc WriteSerialRegister addr=$1 bytes=$2 value=$3 mask=0xFF i=0 {
  ## Write a serial register which is MSB first
  mask = mask << (bytes-1)
  for (i=0;i<bytes;i--) {
    modify (addr) (value & mask) -q -c
    mask = (mask >> 8)
  }
}

proc SerialRegister op=$1 name=$2 addr=$3 bytes=$4 i=0 {
  ## For accessing serial big endian registers using -p option of register command
  $$ = ReadSerialRegister (addr, bytes)
  if (op == 0) {
    write (name) = -x ($$)
  }
}

proc Serial2Register {
  ## For accessing serial big endian 2 byte registers using -p option of register command
  $$ = SerialRegister ($1, $2, $3, 2)
}

proc Serial3Register {
  ## For accessing serial big endian 3 byte registers using -p option of register command
  $$ = SerialRegister ($1, $2, $3, 3)
}

proc Serial4Register {
  ## For accessing serial big endian 4 byte registers using -p option of register command
  $$ = SerialRegister ($1, $2, $3, 4)
}

proc SplitRegister op=$1 name=$2 addr=$3 {
  ## For accessing the 2-byte registers that have MSB at addr+2
  $$ = ((display -r (addr) -q -c) | ((display -r (addr+2) -q -c) << 8))
  if (op == 0) {
    write (name) -x ($$)
  }
}

proc TestRegisterProcs val {
  poke 0m0 0x01234567
  poke 0m4 0x89abcdef
  register u2 0m1 -p Unaligned2Register -group testreggroup
  val = display -r u2 -q
  if (val != 0x2345) {
    write error expected 0x2345 got -x (val)
  } 
  register u4 0m1 -p Unaligned4Register -group testreggroup
  val = display -r u4 -q
  if (val != 0xef012345) {
    write error expected 0xef012345 got -x (val)
  } 
  register be2 0m2 -p BigEndian2Register -group testreggroup
  val = display -r be2 -q
  if (val != 0x2301) {
    write error expected 0x2301 got -x (val)
  }
  register be3 0m1 -p BigEndian3Register -group testreggroup
  val = display -r be3 -q
  if (val != 0x452301) {
    write error expected 0x452301 got -x (val)
  }
  register be4 0m0 -p BigEndian4Register -group testreggroup
  val = display -r be4 -q
  if (val != 0x67452301) {
    write error expected 0x67452301 got -x (val)
  }
  register s2 0m1 -p Serial2Register -group testreggroup
  val = display -r s2 -q
  if (val != 0x4545) {
    write error expected 0x4545 got -x (val)
  }
  register s3 0m1 -p Serial3Register -group testreggroup
  val = display -r s3 -q
  if (val != 0x454545) {
    write error expected 0x454545 got -x (val)
  }
  register s4 0m1 -p Serial4Register -group testreggroup
  val = display -r s4 -q
  if (val != 0x45454545) {
    write error expected 0x45454545 got -x (val)
  }
  register split 0m0 -p SplitRegister -group testreggroup
  val = display -r split -q
  if (val != 0x2367) {
    write error expected 0x2367 got -x (val)
  }
  display -r testreggroup
}

#################################################################
##
## Define register blocks of common hardware peripheral modules
##
#################################################################

proc AsynchronousSerialControllerRegisters addr=$1 num=$2 fifo=$3 smartcard=$4 chiptype=$5 {
  if (clsymbol ST_reg_debug) { write "AsynchronousSerialControllerRegisters @ " -x (addr) " num=" (num) " fifo=" (fifo) " smartcard=" (smartcard)} 
  register ("ASC"+(mkstr(num))+"BaudRate")  (addr)      -group ("ASC"+(mkstr(num)))
  ## don't touch Tx,Rx buffer
  register ("ASC"+(mkstr(num))+"Control")   (addr+0x0c) -group ("ASC"+(mkstr(num)))
  register ("ASC"+(mkstr(num))+"IntEnable") (addr+0x10) -group ("ASC"+(mkstr(num)))
  register ("ASC"+(mkstr(num))+"Status")    (addr+0x14) -group ("ASC"+(mkstr(num))) -readonly
  if (smartcard == true) {
    register ("ASC"+(mkstr(num))+"GuardTime") (addr+0x18) -group ("ASC"+(mkstr(num)))
  }
  if (fifo == true) {
    register ("ASC"+(mkstr(num))+"Timeout")   (addr+0x1c) -group ("ASC"+(mkstr(num)))
    register ("ASC"+(mkstr(num))+"TxReset")   (addr+0x20) -group ("ASC"+(mkstr(num))) -writeonly
    register ("ASC"+(mkstr(num))+"RxReset")   (addr+0x24) -group ("ASC"+(mkstr(num))) -writeonly
  }
  if (chiptype=="5518") {
    register ("ASC"+(mkstr(num))+"Retries")   (addr+0x28) -group ("ASC"+(mkstr(num))) -char
  } 
}

proc AudioMPEGRegisters addr=$1 chiptype=$2 {
  if (clsymbol ST_reg_debug) { write "AudioMPEGRegisters @ " -x (addr) " for chiptype " (chiptype) }
  register AUD_ANC  (addr+0x06) -group AudioMPEG        -p Unaligned4Register -readonly
  register AUD_ESC1 (addr+0x0a) -group AudioMPEG        -p Unaligned4Register -readonly
  register AUD_ESC2 (addr+0x0e) -group AudioMPEG -char  -readonly
  register AUD_ESCX (addr+0x0f) -group AudioMPEG -char  -readonly
  register AUD_LRP  (addr+0x11) -group AudioMPEG -char
  register AUD_FFL  (addr+0x14) -group AudioMPEG -short
  register AUD_P18  (addr+0x16) -group AudioMPEG -char
  register AUD_CDI  (addr+0x18) -group AudioMPEG -char  -writeonly
  register AUD_FOR  (addr+0x19) -group AudioMPEG -char
  register AUD_ITR  (addr+0x1a) -group AudioMPEG -short -readonly
  register AUD_ITM  (addr+0x1c) -group AudioMPEG -short
  register AUD_LCA  (addr+0x1e) -group AudioMPEG -char
  register AUD_EXT  (addr+0x1f) -group AudioMPEG -char
  register AUD_RCA  (addr+0x20) -group AudioMPEG -char
  register AUD_SID  (addr+0x22) -group AudioMPEG -char
  register AUD_SYN  (addr+0x23) -group AudioMPEG -char
  register AUD_IDE  (addr+0x24) -group AudioMPEG -char
  register AUD_SCM  (addr+0x25) -group AudioMPEG -char
  register AUD_SYS  (addr+0x26) -group AudioMPEG -char  -readonly
  register AUD_SYE  (addr+0x27) -group AudioMPEG -char
  register AUD_LCK  (addr+0x28) -group AudioMPEG -char
  register AUD_CRC  (addr+0x2a) -group AudioMPEG -char
  register AUD_SEM  (addr+0x2c) -group AudioMPEG -char
  register AUD_PLY  (addr+0x2e) -group AudioMPEG -char
  register AUD_MUT  (addr+0x30) -group AudioMPEG -char
  register AUD_SKP  (addr+0x32) -group AudioMPEG -char
  register AUD_ISS  (addr+0x36) -group AudioMPEG -char
  register AUD_ORD  (addr+0x38) -group AudioMPEG -char
  register AUD_RES  (addr+0x40) -group AudioMPEG -char
  register AUD_RST  (addr+0x42) -group AudioMPEG -char
  register AUD_SFR  (addr+0x44) -group AudioMPEG -char  -readonly
  register AUD_DEM  (addr+0x46) -group AudioMPEG -char  -readonly
  register AUD_IFT  (addr+0x52) -group AudioMPEG -char
  register AUD_SCP  (addr+0x53) -group AudioMPEG -char
  register AUD_ITS  (addr+0x5b) -group AudioMPEG -char
  register AUD_IMS  (addr+0x5c) -group AudioMPEG -char
  register AUD_HDR  (addr+0x5e) -group AudioMPEG        -p Unaligned4Register -readonly
  register AUD_PTS1 (addr+0x62) -group AudioMPEG        -p Unaligned4Register -readonly
  register AUD_PTS2 (addr+0x66) -group AudioMPEG -char  -readonly