📄 st20c1simaddr.cfg
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if (!(clsymbol C1SIMADDR)) {
C1SIMADDR=1
## addresses of onchip C1 simulator devices
Devices.index=0
Devices.EMIindex=Devices.index++
Devices[Devices.EMIindex].symname = "EMIAddr"
Devices[Devices.EMIindex].addr = 0x20002000
Devices.DCU2index=Devices.index++
Devices[Devices.DCU2index].symname = "DCU2Addr"
if ( (clsymbol "DCU_base") == 0 ) {
DCU_base = 0x3000
}
Devices[Devices.DCU2index].addr = (DCU_base)
Devices.INTCTRLindex=Devices.index++
Devices[Devices.INTCTRLindex].symname = "InterruptControllerAddr"
Devices[Devices.INTCTRLindex].addr = 0x20000000
Devices.INTCTRLLEVELSindex=Devices.index++
Devices[Devices.INTCTRLLEVELSindex].symname = "InterruptControllerLevels"
Devices[Devices.INTCTRLLEVELSindex].addr = 8
}
proc c1simmemory {
memory INTERNAL 0x80000000 (4*K) RAM
memory SYSTEM 0x80000000 (0x80) RESERVED
memory EXTERNAL 0x40000000 (256*K) RAM
memory ROM1 0x70000000 (512*K) ROM
memory DCU (DCU_base) 0x1000 DEVICE ## can be word accessed via DCU
memory INT_CONTROLLER 0x20000000 0x1000 PERIPHERAL ## cannot be accessed via DCU
memory EMI 0x20002000 0x1000 PERIPHERAL ## cannot be accessed via DCU
}
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