dcu3.cfg

flash programming STI 5.5.1.4 DCU3

include dcu3_config.cfg

if ( (clsymbol "DCU_base") == 0 ) { 
  DCU_base=0x3000   ## default location of DCU
}

## Use peek instead of traphandler to access DCU memory. 
##
proc dcu3_register_peek 
  _ST_local_op=$1 
  _ST_local_name=$2 
  _ST_local_addr=$3 {

  $$ = peek -q (_ST_local_addr)
  if ( _ST_local_op == 0 ) {
    write (_ST_local_name) = -x ($$)
  }  
}

proc dcu3_register_general {

  register -p dcu3_register_peek Capability      (DCU_base)      -group DCU3 -readonly
  register -p dcu3_register_peek Control         (DCU_base+0x4)  -group DCU3
  register -p dcu3_register_peek Signalling      (DCU_base+0x8)  -group DCU3
  register -p dcu3_register_peek Status          (DCU_base+0xc)  -group DCU3 -readonly
  register -p dcu3_register_peek TriggerInStatus (DCU_base+0x10) -group DCU3 -readonly
  register -p dcu3_register_peek CompareStatus   (DCU_base+0x14) -group DCU3 -readonly 
  register -p dcu3_register_peek Sequencing      (DCU_base+0x40) -group DCU3 -readonly
}

##{{{    dcu3_register_capability
proc dcu3_register_TriggerIn 
  _ST_local_nblocks=$1 
  _ST_local_i=0 _ST_local_reg_name="" {

  for (_ST_local_i=0; _ST_local_i < _ST_local_nblocks; _ST_local_i++) {
    _ST_local_reg_name = "TriggerIn"
    if ( _ST_local_nblocks > 1 ) {
      _ST_local_reg_name += (mkstr (_ST_local_i))
    }
  
    register -p dcu3_register_peek (_ST_local_reg_name + "Properties") \
                              (DCU_base + 0x80 + (4*_ST_local_i)) -group DCU3
  }
}

proc dcu3_register_JumpTrace  
  _ST_local_nblocks=$1 {

  if ( _ST_local_nblocks > 0 ) {
    register -p dcu3_register_peek JumptraceProperties    (DCU_base+0x100) -group DCU3
    register -p dcu3_register_peek JumptraceFromIptr      (DCU_base+0x104) -group DCU3 -readonly
    register -p dcu3_register_peek JumptraceToIptr        (DCU_base+0x108) -group DCU3 -readonly
    register -p dcu3_register_peek JumptraceLastIptr      (DCU_base+0x10c) -group DCU3 -readonly
    register -p dcu3_register_peek JumptraceLastCapture0  (DCU_base+0x110) -group DCU3 -readonly
    register -p dcu3_register_peek JumptraceBytes         (DCU_base+0x114) -group DCU3 -readonly
    register -p dcu3_register_peek JumptraceStartAddress  (DCU_base+0x118) -group DCU3
    register -p dcu3_register_peek JumptraceEndAddress    (DCU_base+0x11c) -group DCU3
    register -p dcu3_register_peek JumptraceAddress       (DCU_base+0x120) -group DCU3
  }
}

proc dcu3_register_Compare 
  _ST_local_nblocks=$1 
  _ST_local_i=0 _ST_local_reg_name="" {

  for (_ST_local_i=0; _ST_local_i < _ST_local_nblocks; _ST_local_i++) {
    _ST_local_reg_name = "Compare"
    if ( _ST_local_nblocks > 1 ) {
      _ST_local_reg_name += (mkstr (_ST_local_i))
    }
    register -p dcu3_register_peek (_ST_local_reg_name+"Properties") (DCU_base + 0x200 + (0x10*_ST_local_i)) -group DCU3
    register -p dcu3_register_peek (_ST_local_reg_name+"Value1")     (DCU_base + 0x204 + (0x10*_ST_local_i)) -group DCU3
    register -p dcu3_register_peek (_ST_local_reg_name+"Value2")     (DCU_base + 0x208 + (0x10*_ST_local_i)) -group DCU3
  }
}

proc dcu3_register_Capture 
  _ST_local_nblocks=$1 
  _ST_local_i=0 _ST_local_reg_name="" {

  for (_ST_local_i=0; _ST_local_i < _ST_local_nblocks; _ST_local_i++) {
    _ST_local_reg_name = "Capture"
    if ( _ST_local_nblocks > 1 ) {
      _ST_local_reg_name += (mkstr (_ST_local_i))
    }
    register -p dcu3_register_peek (_ST_local_reg_name+"Properties") (DCU_base + 0x400 + (8*_ST_local_i)) -group DCU3
    register -p dcu3_register_peek (_ST_local_reg_name+"Value")      (DCU_base + 0x404 + (8*_ST_local_i)) -group DCU3 -readonly
  }
}

proc dcu3_register_Wrange 
  _ST_local_nblocks=$1 
  _ST_local_i=0 _ST_local_reg_name="" {

  for (_ST_local_i=0; _ST_local_i < _ST_local_nblocks; _ST_local_i++) {
    _ST_local_reg_name = "Wrange"
    if ( _ST_local_nblocks > 1 ) {
      _ST_local_reg_name += (mkstr (_ST_local_i))
    }
    register -p dcu3_register_peek (_ST_local_reg_name+"EnableInRange")   (DCU_base + 0x600 + (0x10*_ST_local_i)) -group DCU3
    register -p dcu3_register_peek (_ST_local_reg_name+"EnableOutRange")  (DCU_base + 0x604 + (0x10*_ST_local_i)) -group DCU3
    register -p dcu3_register_peek (_ST_local_reg_name+"Lower")           (DCU_base + 0x608 + (0x10*_ST_local_i)) -group DCU3
    register -p dcu3_register_peek (_ST_local_reg_name+"Upper")           (DCU_base + 0x60c + (0x10*_ST_local_i)) -group DCU3
  }
}

proc dcu3_register_capability 
  _ST_local_i=0 _ST_local_reg_fn="" _ST_local_nblocks=0 _ST_local_reg_val=0x0 {

  _ST_local_reg_val = display -r Capability -q

  for (_ST_local_i=0; _ST_local_i <= DCU3_capability_Wrange_tag; _ST_local_i++) {
    _ST_local_nblocks = dcu3_capability_decode (_ST_local_i) (_ST_local_reg_val)
    _ST_local_reg_fn = "dcu3_register_"+DCU3_capability_config[(_ST_local_i)].name
    eval (_ST_local_reg_fn, _ST_local_nblocks)
  }
}
##}}}

##{{{    dcu3_register_sequence
proc dcu3_register_sequence_block 
  _ST_local_name=$1 
  _ST_local_nblocks=$2 
  _ST_local_seq_num=$3 
  _ST_local_i=0 {

  for (_ST_local_i=0; _ST_local_i < _ST_local_nblocks; _ST_local_i++) {
    _ST_local_reg_name = "Sequence"+(_ST_local_name)
    if ( _ST_local_nblocks > 1 ) {
      _ST_local_reg_name += (mkstr (_ST_local_i))
    }

    register -p dcu3_register_peek (_ST_local_reg_name+"Enable")   (DCU_base + 0x500 + (8*_ST_local_seq_num)) -group DCU3
    register -p dcu3_register_peek (_ST_local_reg_name+"Disable")  (DCU_base + 0x504 + (8*_ST_local_seq_num)) -group DCU3
    
    _ST_local_seq_num++
  }
}

proc dcu3_register_sequence 
  _ST_local_i=0 _ST_local_reg_fn="" _ST_local_nblocks=0 _ST_local_seq_num=0 _ST_local_reg_val=0x0 {

  _ST_local_reg_val = display -r Sequencing -q

  dcu3_register_sequence_block "Step" (1) (_ST_local_seq_num++)

  for (_ST_local_i=0; _ST_local_i <= DCU3_config_Capture_tag; _ST_local_i++) {
    _ST_local_nblocks = dcu3_sequence_decode (_ST_local_i) (_ST_local_reg_val)
    dcu3_register_sequence_block \
                        (DCU3_sequence_config[(_ST_local_i)].name) (_ST_local_nblocks) (_ST_local_seq_num)
    _ST_local_seq_num += _ST_local_nblocks
  }
}
##}}}
  
proc dcu3_registers {

  dcu3_register_general
  dcu3_register_capability
  dcu3_register_sequence
}

proc dcu3_type {

  DCUType[spaceid] = "DCU3"
  DCUBase[spaceid] = (DCU_base)
}

proc dcu3_handlers {

  if ( CPUType[spaceid] == "st20c1" ) {
    TrapHandler[spaceid] = "dcu3c1trap.bin"
    InformHandler[spaceid] = "informdcu3c1.bin"
  } else {
    TrapHandler[spaceid] = "dcu3c2trap.bin"
    InformHandler[spaceid] = "informdcu3c2.bin"
  }

  ##write "dcu3_handlers(): TrapHandler=" (TrapHandler[spaceid]) "InformHandler=" (InformHandler[spaceid])
}

proc dcu3_model 
  _ST_local_capability=$1 
  _ST_local_sequencing=$2 
  _ST_local_debug=$3 
  _ST_local_UserParameter = "" {

  ##write "dcu3_model(): DCUbase=" -x (DCU_base) " capability=" -x (_ST_local_capability) " sequencing=" -x (_ST_local_sequencing) " debug=" -x (_ST_local_debug)

  _ST_local_UserParameter = ( mkstr( DCU_base ) ) + " " + \
                ( mkstr( _ST_local_capability ) ) + " " + \
                ( mkstr( _ST_local_sequencing ) ) + " " + \
                ( mkstr( _ST_local_debug ) ) + " " + \
                "SOCKET"  

  simdll -file libdcu3.so -init dcu3Init -ilevel 0 -tag DCU3_1 \
       -sig dcu3Signal -poll_all -close dcu3Close -alu \
       -siglevel 7 \
       -parm ( _ST_local_UserParameter )

  ## Whole of st20 address space vissible to dcu3 for watchpoint analysis.
  simmem 0x80000000 ( 4 * ( M * K )) -mem dcu3Watch -tag DCU3_1

  ## DCU3 Register file access.
  ## The register file occupies the first 2K of the DCU3 address space.
  simmem ( DCU_base ) ( 2 * K ) -mem dcu3Register -tag DCU3_1

  ## DCU3 Host memory access.
  ## Hosted memory occupies the top 2K of the DCU3 address space.
  simmem ( DCU_base + ( 2 * K ) ) ( 2 * K ) -mem dcu3HostedMemory -tag DCU3_1
}  

## Init st20sim if variable _ST_target_st20sim_dcu3 or 
## _ST_target_st20sim is defined.
##
proc dcu3_sim {

  if ( (clsymbol "DCU3_capability") == 0 ) { 
    DCU3_capability = 0x200110e1 
  }
  if ( (clsymbol "DCU3_sequencing") == 0 ) { 
    DCU3_sequencing = 0x00e110e1
  }
  if ( (clsymbol "DCU3_debug") == 0 ) {
    DCU3_debug = 0
  } 

  if ( (clsymbol simdll) == 3 && (clsymbol _ST_target_st20sim_dcu3) == 1 ) {
    ## st20sim is parsing file (as only st20sim has "simdll" statement) and
    ## a variable is defined to indicate use st20sim DCU3 model.
    ##
    dcu3_model (DCU3_capability) (DCU3_sequencing) (DCU3_debug)
  } else if ( (clsymbol connect) == 3 && (clsymbol _ST_target_st20sim) == 1 ) {
    ## st20run is parsing file (as only st20run has "connect" statement) and
    ## a variable is set to indicate target is st20sim without DCU3 model.
    ## Setup DCU3 sequence and capability so register display gives
    ## a sensible list of DCU3 blocks. 
    ##
    poke (DCU_base) (DCU3_capability)  
    poke (DCU_base+0x40) (DCU3_sequencing)
  }
}  


proc dcu3_setup {

  if ( (clsymbol "CPUType[0]") == 0 ) {
    write "CPUType[0] must be defined before call to dcu3_setup(), use dcu3c2() or dcu3c1()"
  } else {
    dcu3_type
    dcu3_handlers
    dcu3_sim  
    dcu3_registers
  }
}


proc dcu3_c2 {

  if ( (clsymbol "spaceid") == 0 ) {
    ## Only st20run defines spaceid. Allow for other tools to use this
    ## procedure by supplying default value.
    ##
    spaceid=0
  }

  if( (clsymbol CPUType[spaceid]) == 0 ) {
    CPUType[spaceid] = "st20c2"
  }
  
  dcu3_setup
}

proc dcu3_c1 {

  if ( (clsymbol "spaceid") == 0 ) {
    ## Only st20run defines spaceid. Allow for other tools to use this
    ## procedure by supplying default value.
    ##
    spaceid=0
  }

  if ( (clsymbol CPUType[spaceid]) == 0 ) {
    CPUType[spaceid] = "st20c1"
  } 

  dcu3_setup
}