stv3500regs.cfg

flash programming STI 5.5.1.4 DCU3

## STV3500 registers that st20run can display.
## Notice that a series of cmdlang variables, such as VTG_BASE, is created
## that may be utilised by a cfg file after parsing a "chip STV3500" statement.
##

proc STV3500_regs {

VTG_BASE = (0x13000000)
 register CO_CTRL                   (VTG_BASE + 0x0) -group VTG
 register CO_SAFE                   (VTG_BASE + 0x4) -group VTG
 register CO_LINE_LENGTH            (VTG_BASE + 0x8) -group VTG
 register CO_FIELD_LENGTH_0         (VTG_BASE + 0xc) -group VTG
 register CO_FIELD_LENGTH_1         (VTG_BASE + 0x10) -group VTG
 register CO_FIELD_LENGTH_2         (VTG_BASE + 0x14) -group VTG
 register CO_FIELD_LENGTH_3         (VTG_BASE + 0x18) -group VTG
 register CO_H_LIMIT                (VTG_BASE + 0x1c) -group VTG
 register CO_V_LIMIT                (VTG_BASE + 0x20) -group VTG
 register CO_LINE_NB                (VTG_BASE + 0x30) -group VTG -readonly
 register CO_STATUS                 (VTG_BASE + 0x38) -group VTG -readonly
 register OUT_CTRL_100PIX           (VTG_BASE + 0x40) -group VTG
 register OUT_LINE_LGTH_PIX         (VTG_BASE + 0x44) -group VTG
 register OUT_CTRL_100DPL           (VTG_BASE + 0x48) -group VTG
 register OUT_CTRL_HPAD             (VTG_BASE + 0x4c) -group VTG
 register OUT_CTRL_VPAD             (VTG_BASE + 0x50) -group VTG
 register OUT_CTRL_IT_V100          (VTG_BASE + 0x54) -group VTG
 register OUT_IT_STATUS             (VTG_BASE + 0x60) -group VTG
 register OUT_IT_CTRL               (VTG_BASE + 0x64) -group VTG
 register SERVICE                   (VTG_BASE + 0x80) -group VTG
 register  SERVICE_DLL0              (VTG_BASE + 0x90) -group VTG
 register  SERVICE_DLL1              (VTG_BASE + 0x94) -group VTG
 register  SERVICE_DLL2              (VTG_BASE + 0x98) -group VTG
 register  SERVICE_DLL3              (VTG_BASE + 0x9C) -group VTG -readonly

GAM_CUR_BASE = (0x12000000)
 register GAM_CUR_CTL               (GAM_CUR_BASE + 0x0) -group GAMMA
 register GAM_CUR_VPO               (GAM_CUR_BASE + 0xc) -group GAMMA
 register GAM_CUR_PML               (GAM_CUR_BASE + 0x14) -group GAMMA
 register GAM_CUR_PMP               (GAM_CUR_BASE + 0x18) -group GAMMA
 register GAM_CUR_SIZE              (GAM_CUR_BASE + 0x1c) -group GAMMA
 register GAM_CUR_CML               (GAM_CUR_BASE + 0x20) -group GAMMA
 register GAM_CUR_AWS               (GAM_CUR_BASE + 0x28) -group GAMMA
 register GAM_CUR_AWE               (GAM_CUR_BASE + 0x2c) -group GAMMA
 register GAM_CUR_PKZ               (GAM_CUR_BASE + 0xfc) -group GAMMA
GAM_VID_BASE = (0x12000400)
 register GAM_VID_CTL               (GAM_VID_BASE + 0x0) -group GAMMA
 register GAM_VID_ALP               (GAM_VID_BASE + 0x4) -group GAMMA
 register GAM_VID_VPO               (GAM_VID_BASE + 0xc) -group GAMMA
 register GAM_VID_VPS               (GAM_VID_BASE + 0x10) -group GAMMA
 register GAM_VID_KEY1              (GAM_VID_BASE + 0x28) -group GAMMA
 register GAM_VID_KEY2              (GAM_VID_BASE + 0x2c) -group GAMMA
GAM_MIX_BASE = (0x12000800)
 register GAM_MIX_CTL               (GAM_MIX_BASE + 0x0) -group GAMMA
 register GAM_MIX_BKC               (GAM_MIX_BASE + 0x4) -group GAMMA
 register GAM_MIX_BCO               (GAM_MIX_BASE + 0xc) -group GAMMA
 register GAM_MIX_BCS               (GAM_MIX_BASE + 0x10) -group GAMMA
 register GAM_MIX_AVO               (GAM_MIX_BASE + 0x28) -group GAMMA
 register GAM_MIX_AVS               (GAM_MIX_BASE + 0x2c) -group GAMMA
D2BM_BASE = (0x10800000)
 register D2BM_CONTROL              (D2BM_BASE + 0x0) -group D2BM
 register D2BM_STATUS               (D2BM_BASE + 0x4) -group D2BM
 register PROCESS_TYPE              (D2BM_BASE + 0x8) -group D2BM
 register DMA_SRC_ADDRESS           (D2BM_BASE + 0xc) -group D2BM
 register DMA_DEST_ADDRESS          (D2BM_BASE + 0x10) -group D2BM
 register BLOCK_WIDTH               (D2BM_BASE + 0x14) -group D2BM
 register BLOCK_HEIGHT              (D2BM_BASE + 0x18) -group D2BM
 register BLOCK_SKIP                (D2BM_BASE + 0x1c) -group D2BM
 register CELLS_TO_BE_TRANSFERED    (D2BM_BASE + 0x20) -group D2BM
 register FILLING                   (D2BM_BASE + 0x24) -group D2BM
DPLT2L_BASE = (0x11001400)
 register STBIN_CONF_L              (DPLT2L_BASE + 0x0) -group DISPLAY
 register STBIN_STR_ADD_ODD_L       (DPLT2L_BASE + 0x4) -group DISPLAY
 register STBIN_STP_ADD_ODD_L       (DPLT2L_BASE + 0x8) -group DISPLAY
 register STBIN_IT_MSK_L            (DPLT2L_BASE + 0xc) -group DISPLAY
 register STBIN_STATUS_L            (DPLT2L_BASE + 0x10) -group DISPLAY  -readonly
 register STBIN_IT_L                (DPLT2L_BASE + 0x14) -group DISPLAY
 register STBIN_RESL                (DPLT2L_BASE + 0x18) -group DISPLAY
 register STBIN_WDL                 (DPLT2L_BASE + 0x1c) -group DISPLAY
 register STBIN_STR_ADD_EVEN_L      (DPLT2L_BASE + 0x20) -group DISPLAY
 register STBIN_STP_ADD_EVEN_L      (DPLT2L_BASE + 0x24) -group DISPLAY
 register STBIN_PITCH_L             (DPLT2L_BASE + 0x28) -group DISPLAY
 register STBIN_CLUSTER_L           (DPLT2L_BASE + 0x2c) -group DISPLAY
DPLT2C_BASE = (0x11001800)
 register STBIN_CONF_C              (DPLT2C_BASE + 0x0) -group DISPLAY
 register STBIN_STR_ADD_ODD_C       (DPLT2C_BASE + 0x4) -group DISPLAY
 register STBIN_STP_ADD_ODD_C       (DPLT2C_BASE + 0x8) -group DISPLAY
 register STBIN_IT_MSK_C            (DPLT2C_BASE + 0xc) -group DISPLAY
 register STBIN_STATUS_C            (DPLT2C_BASE + 0x10) -group DISPLAY  -readonly
 register STBIN_IT_C                (DPLT2C_BASE + 0x14) -group DISPLAY
 register STBIN_RESC                (DPLT2C_BASE + 0x18) -group DISPLAY
 register STBIN_WDC                 (DPLT2C_BASE + 0x1c) -group DISPLAY
 register STBIN_STR_ADD_EVEN_C      (DPLT2C_BASE + 0x20) -group DISPLAY
 register STBIN_STP_ADD_EVEN_C      (DPLT2C_BASE + 0x24) -group DISPLAY
 register STBIN_PITCH_C             (DPLT2C_BASE + 0x28) -group DISPLAY
 register STBIN_CLUSTER_C           (DPLT2C_BASE + 0x2c) -group DISPLAY
DPLPAN_BASE = (0x11000D00)
 register PAN_CHR_RATE              (DPLPAN_BASE + 0x0) -group DISPLAY
 register PAN_LUMA_RATE             (DPLPAN_BASE + 0x4) -group DISPLAY
 register PAN_LUMA_OUTPUT_LENGTH          (DPLPAN_BASE + 0x8) -group DISPLAY
 register PAN_CHROMA_OUPUT_LENGTH         (DPLPAN_BASE + 0xc) -group DISPLAY
 register PAN_START_POS                   (DPLPAN_BASE + 0x10) -group DISPLAY
 register PAN_INPUT_LINE_LENGTH           (DPLPAN_BASE + 0x14) -group DISPLAY
 register PAN_BYP                   (DPLPAN_BASE + 0x18) -group DISPLAY
DPLUPC_BASE = (0x11000E00)
 register UPC_BYP                   (DPLUPC_BASE + 0x0) -group DISPLAY
DPLSYNC_BASE = (0x11000CC0)
 register SYNCDEC_CTRL              (DPLSYNC_BASE + 0x0) -group DISPLAY
DPLRST_BASE = (0x11000CC4)
 register DPL_RST                   (DPLRST_BASE + 0x0) -group DISPLAY
DPLLBF_BASE = (0x11000E04)
 register LBF_BYP                   (DPLLBF_BASE + 0x0) -group DISPLAY
DPLPXF_BASE = (0x11000E08)
 register PXF_IT_MSK                (DPLPXF_BASE + 0x0) -group DISPLAY
 register PXF_STATUS                (DPLPXF_BASE + 0x4) -group DISPLAY  -readonly
 register PXF_IT                    (DPLPXF_BASE + 0x8) -group DISPLAY
 register PXF_IT_EN                 (DPLPXF_BASE + 0xc) -group DISPLAY
DPLHFC_BASE = (0x11000000)
 register HFC_INPUT_LUMA_LINE_LENGTH   (DPLHFC_BASE + 0x600) -group DISPLAY
 register HFC_INPUT_CHROMA_LINE_LENGTH (DPLHFC_BASE + 0x604) -group DISPLAY
 register HFC_PDELTA1               (DPLHFC_BASE + 0x608) -group DISPLAY
 register HFC_PDELTA2               (DPLHFC_BASE + 0x60c) -group DISPLAY
 register HFC_PDELTA4               (DPLHFC_BASE + 0x610) -group DISPLAY
 register HFC_PDELTA5               (DPLHFC_BASE + 0x614) -group DISPLAY
 register HFC_HZONE1                (DPLHFC_BASE + 0x618) -group DISPLAY
 register HFC_HZONE2                (DPLHFC_BASE + 0x61c) -group DISPLAY
 register HFC_HZONE3                (DPLHFC_BASE + 0x620) -group DISPLAY
 register HFC_HZONE4                (DPLHFC_BASE + 0x624) -group DISPLAY
 register HFC_HZONE5                (DPLHFC_BASE + 0x628) -group DISPLAY
 register HFC_PSTEP                 (DPLHFC_BASE + 0x62c) -group DISPLAY
 register HFC_PSTEP_INIT            (DPLHFC_BASE + 0x630) -group DISPLAY
 register HFC_BYP_THRU              (DPLHFC_BASE + 0x634) -group DISPLAY
DPLVFC_BASE = (0x11000800)
 register VFC_LDELTA1               (DPLVFC_BASE + 0x200) -group DISPLAY
 register VFC_LDELTA2               (DPLVFC_BASE + 0x204) -group DISPLAY
 register VFC_LDELTA4               (DPLVFC_BASE + 0x208) -group DISPLAY
 register VFC_LDELTA5               (DPLVFC_BASE + 0x20c) -group DISPLAY
 register VFC_VZONE1                (DPLVFC_BASE + 0x210) -group DISPLAY
 register VFC_VZONE2                (DPLVFC_BASE + 0x214) -group DISPLAY
 register VFC_VZONE3                (DPLVFC_BASE + 0x218) -group DISPLAY
 register VFC_VZONE4                (DPLVFC_BASE + 0x21c) -group DISPLAY
 register VFC_VZONE5                (DPLVFC_BASE + 0x220) -group DISPLAY
 register VFC_LSTEP                 (DPLVFC_BASE + 0x224) -group DISPLAY
 register VFC_LSTEP_INIT            (DPLVFC_BASE + 0x228) -group DISPLAY
 register VFC_VIN_LINE_NUM          (DPLVFC_BASE + 0x22c) -group DISPLAY
 register VFC_IN_IMG_TYPE           (DPLVFC_BASE + 0x238) -group DISPLAY
 register VFC_BYP_THRU              (DPLVFC_BASE + 0x23c) -group DISPLAY
 register VFC_O_LINE_LENGTH         (DPLVFC_BASE + 0x240) -group DISPLAY
DPLPSI_BASE = (0x11001000)
 register YSI_CONF                  (DPLPSI_BASE + 0x0) -group DISPLAY -writeonly 
 register YSI_SIZE                  (DPLPSI_BASE + 0x4) -group DISPLAY -writeonly 
 register CTI_CONF                  (DPLPSI_BASE + 0x8) -group DISPLAY -writeonly 
 register CTI_SIZE                  (DPLPSI_BASE + 0xc) -group DISPLAY -writeonly 
OSD_BASE = (0x11800000)
 register FSA                       (OSD_BASE + 0x0) -group OSD
 register OSD_CONFIG                (OSD_BASE + 0x4) -group OSD
OSDT2T_BASE = (0x11800008)
 register OSD_TOP_CONFIG2           (OSDT2T_BASE + 0x0) -group OSD
 register OSD_TOP_BWL               (OSDT2T_BASE + 0x4) -group OSD
 register OSD_TOP_IT_MSK            (OSDT2T_BASE + 0x8) -group OSD
 register OSD_TOP_FLAG              (OSDT2T_BASE + 0xc) -group OSD
 register OSD_TOP_IT                (OSDT2T_BASE + 0x10) -group OSD
 register OSD_TOP_DEBUG             (OSDT2T_BASE + 0x14) -group OSD
OSDT2B_BASE = (0x11800108)
 register OSD_BOT_CONFIG2           (OSDT2B_BASE + 0x0) -group OSD
 register OSD_BOT_BWL               (OSDT2B_BASE + 0x4) -group OSD
 register OSD_BOT_IT_MSK            (OSDT2B_BASE + 0x8) -group OSD
 register OSD_BOT_FLAG              (OSDT2B_BASE + 0xc) -group OSD
 register OSD_BOT_IT                (OSDT2B_BASE + 0x10) -group OSD
 register OSD_BOT_DEBUG             (OSDT2B_BASE + 0x14) -group OSD
SDPP_BASE = (0x12800000)
 register SDPP_CTRL                      (SDPP_BASE + 0x0) -group SDPP
 register HSOUT_OFFS                (SDPP_BASE + 0x4) -group SDPP
 register VSOUT_VOFFS_TOP           (SDPP_BASE + 0x8) -group SDPP
 register VSOUT_HOFFS_TOP           (SDPP_BASE + 0xc) -group SDPP
 register VSOUT_VOFFS_BOT           (SDPP_BASE + 0x10) -group SDPP
 register VSOUT_HOFFS_BOT           (SDPP_BASE + 0x14) -group SDPP
 register VIDEO_VSTART_TOP          (SDPP_BASE + 0x18) -group SDPP
 register VIDEO_VSTOP_TOP           (SDPP_BASE + 0x1c) -group SDPP
 register VIDEO_VSTART_BOT          (SDPP_BASE + 0x20) -group SDPP
 register VIDEO_VSTOP_BOT           (SDPP_BASE + 0x24) -group SDPP
 register VIDEO_HSTART              (SDPP_BASE + 0x28) -group SDPP
 register VIDEO_HSTOP               (SDPP_BASE + 0x2c) -group SDPP
 register ANC_LEN                   (SDPP_BASE + 0x30) -group SDPP
 register Y_LOW_LIMIT               (SDPP_BASE + 0x34) -group SDPP
 register Y_UP_LIMIT                (SDPP_BASE + 0x38) -group SDPP
 register C_LOW_LIMIT               (SDPP_BASE + 0x3c) -group SDPP
 register C_UP_LIMIT                (SDPP_BASE + 0x40) -group SDPP
 register PRG_LINE_NR               (SDPP_BASE + 0x44) -group SDPP
 register LINE_NR                   (SDPP_BASE + 0x48) -group SDPP -readonly
 register LINE_PER_FIELD            (SDPP_BASE + 0x4c) -group SDPP -readonly
 register PIX_PER_LINE              (SDPP_BASE + 0x50) -group SDPP -readonly
 register SDPP_IT_STATUS                 (SDPP_BASE + 0x54) -group SDPP 
 register SDPP_IT_CTRL                   (SDPP_BASE + 0x58) -group SDPP
 register SDPP_STATUS                    (SDPP_BASE + 0x5c) -group SDPP -readonly
 register ANC_DATA_FILTER           (SDPP_BASE + 0x60) -group SDPP
 register IT_V50_VOFFS              (SDPP_BASE + 0x64) -group SDPP
 register VS_RST_VBI_VOFFS          (SDPP_BASE + 0x68) -group SDPP
 register VS_RST_NVBI_VOFFS         (SDPP_BASE + 0x6c) -group SDPP
 register VIDEO_LINE_NUMBER         (SDPP_BASE + 0x70) -group SDPP -readonly
IFP_BASE = (0x12800800)
 register IFP_CTRL                      (IFP_BASE + 0x0) -group IFP
 register SIGMAN_EXT                (IFP_BASE + 0x4) -group IFP
 register T_MOV_CFD                 (IFP_BASE + 0x8) -group IFP