board.cfg

flash programming STI 5.5.1.4 DCU3

  memory  EMIREGISTERS  0x20200000          (4*K)               DEVICE
  memory  EMI0_SDRAM    (EMI0_ADDR)         (EMI0_SIZE)         RAM
  memory  HSDP          (HSDP_ADDR)         (HSDP_SIZE)         DEVICE
  memory  FPGA          (FPGA_ADDR)         (FPGA_SIZE)         RESERVED
  memory  PORT_EXP      (PORT_EXP_ADDR)     (PORT_EXP_SIZE)     DEVICE
## ****** have to lie to the linker about the existance of the boot area in FLASH *****
##  memory  CONFIG        (CONFIG_ADDR)       (CONFIG_SIZE)       ROM
  memory FLASH_HDR		(FLASH_NORMAL_ADDR) (FLASH_HDR_SIZE)	 RESERVED
  memory  FLASH         (FLASH_NORMAL_ADDR+FLASH_HDR_SIZE) (FLASH_NORMAL_SIZE) ROM
  memory FLASH_HDR_MIRROR		(FLASH_MIRROR_ADDR) (FLASH_HDR_SIZE)	 RESERVED
  memory  FLASH_MIRROR  (FLASH_MIRROR_ADDR+FLASH_HDR_SIZE) (FLASH_NORMAL_SIZE) RESERVED
## ****** have to lie to the linker about the existance of the boot area in FLASH *****
##  memory  BOOT          (CONFIG_ADDR)       (CONFIG_SIZE)       ROM          
  memory  AV_SDRAM      (AV_SDRAM_ADDR)     (AV_SDRAM_SIZE)     RAM

##write size of memory segment FLASH = -d (sizeof FLASH)
##write addr of memory segment FLASH = -x (addressof FLASH)

  ###########################
  ## linker-generated symbols
  
  define cfg_port_expander_addr (PORT_EXP_ADDR)
  define cfg_hsdp_base_addr     (addressof -q HSDP)
  
  ###########################
  ## these exports are required for st20c2llmem:
  define cfg_emisdram_addr   (addressof -q EMI0_SDRAM)
  define cfg_avsdram_addr    (addressof -q AV_SDRAM)
  define emisdram_size       (sizeof EMI0_SDRAM)
  define avsdram_size        (sizeof AV_SDRAM)
  define emisdram_data_width ("EMISDRAM_BUS_WIDTH")
  define avsdram_data_width  ("AVSDRAM_BUS_WIDTH")

  define cfg_flash_a_addr    (addressof -q FLASH)
  define cfg_flash_b_addr    (addressof -q FLASH_MIRROR)
  
  define cfg_flash_size      (FLASH_BANK_SIZE)
  define cfg_flash_space     (FLASH_BANK_SPACE)

  define cfg_emi0_top        ((addressof -q EMI0_SDRAM) + EMI0_SIZE - 1)
  define cfg_emi4_top        (FLASH_BANK1_ADDR + FLASH_BANK_SPACE - 1)
  define cfg_emi5_top        (FLASH_BANK0_ADDR + FLASH_BANK_SPACE - 1)
  
} ##end proc Board() ##

################################################################################
## Board_For_Boot()
## Define the physical memory map of the board. Medium level cfg procedure.
## For use EXCLUSIVELY by hostboot / romboot
##    called by   Board_MemoryMap_boot() 

proc Board_For_Boot {

  chip STi5514

  #################
  ## memory regions
  
  memory  EMI0_SDRAM    (EMI0_ADDR)                        (EMI0_SIZE)            RESERVED
  memory  HSDP          (HSDP_ADDR)                        (HSDP_SIZE)            DEVICE
  memory  FPGA          (FPGA_ADDR)         					  (FPGA_SIZE)            RESERVED
  memory  PORT_EXP      (PORT_EXP_ADDR)                    (PORT_EXP_SIZE)        DEVICE
## ****** have to lie to the linker about the existance of ALL of the FLASH *****
##  memory  CONFIG        (CONFIG_ADDR)       (CONFIG_SIZE)       RESERVED

  memory  FLASH         (FLASH_NORMAL_ADDR)                (FLASH_NORMAL_SIZE)    RESERVED
write FLASH addr = -x (FLASH_NORMAL_ADDR) size = -d (FLASH_NORMAL_SIZE)
write :.FLASH TOP addr is -x (FLASH_NORMAL_ADDR+FLASH_NORMAL_SIZE)

  memory  FLASH_MIRROR  (FLASH_MIRROR_ADDR)                (FLASH_NORMAL_SIZE)    RESERVED
  memory  BOOT          (CONFIG_ADDR)                      (CONFIG_SIZE)          ROM          
write BOOT addr = -x (CONFIG_ADDR) size = -d (CONFIG_SIZE)

   if ( EXTENDED_CONFIG_SIZE ){
    memory  EXTENDED_BOOT (CONFIG_ADDR-EXTENDED_CONFIG_SIZE) (EXTENDED_CONFIG_SIZE) ROM          
    write EXT_BOOT addr = -x (CONFIG_ADDR-EXTENDED_CONFIG_SIZE)	size = -d (EXTENDED_CONFIG_SIZE)
   }
  memory  AV_SDRAM      (AV_SDRAM_ADDR)                    (AV_SDRAM_SIZE)        RESERVED

  define cfg_emi0_top        ((addressof -q EMI0_SDRAM) + EMI0_SIZE - 1)
  define cfg_emi4_top        (FLASH_BANK1_ADDR + FLASH_BANK_SPACE - 1)
  define cfg_emi5_top        (FLASH_BANK0_ADDR + FLASH_BANK_SPACE - 1)

}  ##end proc Board_For_Boot ##

################################################################################
## Board_For_FieldTrialFlash()
## Define the physical memory map of the board. Medium level cfg procedure.
## For use EXCLUSIVELY by the field trial flash loader/programmer
##    called by   Board_MemoryMap_boot() 

proc Board_For_FieldTrialFlash {

  chip STi5514

##  write Flash non romboot size = -d (FLASH_NORMAL_SIZE)
##  write Flash RESERVED size    = -d (RESERVED_FLASH_SIZE)
##  write Flash CONFIG addr      = -x (CONFIG_ADDR)
##  write Flash CONFIG size      = -d (CONFIG_SIZE)

  #################
  ## memory regions
  
  memory  EMI0_SDRAM    (EMI0_ADDR)         (EMI0_SIZE)                           RAM
  memory  HSDP          (HSDP_ADDR)         (HSDP_SIZE)                           DEVICE
  memory  FPGA          (FPGA_ADDR)         (FPGA_SIZE)         						 RESERVED
  memory  PORT_EXP      (PORT_EXP_ADDR)     (PORT_EXP_SIZE)                       DEVICE
## ****** have to lie to the linker about the existance of the boot area in FLASH *****
##  memory  CONFIG        (CONFIG_ADDR)       (CONFIG_SIZE)       ROM

  memory FLASH_HDR		(FLASH_NORMAL_ADDR) (FLASH_HDR_SIZE)	 RESERVED
  memory  FLASH         (FLASH_NORMAL_ADDR+FLASH_HDR_SIZE) (FLASH_NORMAL_SIZE) RESERVED
  memory FLASH_HDR_MIRROR		(FLASH_MIRROR_ADDR) (FLASH_HDR_SIZE)	 RESERVED
  memory  FLASH_MIRROR  (FLASH_MIRROR_ADDR+FLASH_HDR_SIZE) (FLASH_NORMAL_SIZE) RESERVED

  memory  EXTENDED_BOOT (CONFIG_ADDR-EXTENDED_CONFIG_SIZE) (EXTENDED_CONFIG_SIZE) ROM          
  write EXT_BOOT addr = -x (CONFIG_ADDR-EXTENDED_CONFIG_SIZE) size = -d (EXTENDED_CONFIG_SIZE)

  memory  CONFIG        (CONFIG_ADDR)       (CONFIG_SIZE)                         RESERVED
  memory  AV_SDRAM      (AV_SDRAM_ADDR)     (AV_SDRAM_SIZE)                       RAM

  ###########################
  ## linker-generated symbols
  
  define cfg_port_expander_addr (PORT_EXP_ADDR)
  define cfg_hsdp_base_addr     (addressof -q HSDP)
  
  ###########################
  ## these exports are required for st20c2llmem:
  define cfg_emisdram_addr   (addressof -q EMI0_SDRAM)
  define cfg_avsdram_addr    (addressof -q AV_SDRAM)
  define emisdram_size       (sizeof EMI0_SDRAM)
  define avsdram_size        (sizeof AV_SDRAM)
  define emisdram_data_width ("EMISDRAM_BUS_WIDTH")
  define avsdram_data_width  ("AVSDRAM_BUS_WIDTH")

  define cfg_flash_a_addr    (addressof -q FLASH)
  define cfg_flash_b_addr    (addressof -q FLASH_MIRROR)
  
  define cfg_flash_size      (FLASH_BANK_SIZE)
  define cfg_flash_space     (FLASH_BANK_SPACE)

  define cfg_emi0_top        ((addressof -q EMI0_SDRAM) + EMI0_SIZE - 1)
  define cfg_emi4_top        (FLASH_BANK1_ADDR + FLASH_BANK_SPACE - 1)
  define cfg_emi5_top        (FLASH_BANK0_ADDR + FLASH_BANK_SPACE - 1)
}  ##end proc Board_For_FieldTrialFlash ##

###############################################################################
############## HIGHER LEVEL PROCEDURES ########################################
###############################################################################

##################################
## Board_MemoryMap()
## Applies extensions to physical memory map of the board. calls level cfg procedure.
##    called by   c2ramdebug() 
##     and        c2flashmaindebug() 
##
## RT150702 added the 'configsize' parameter
##
proc Board_MemoryMap configsize=$1 basicloader=$2 {

  #################################
  ## call procedure to get the physical locations and sizes of all the parts
  MemoryMap_Defines

  ###########################################################
  ## part of flash to contain small program to configure chip
  CONFIG_SIZE = ((configsize)*K)
  write <board.cfg@442> in proc Board_MemoryMap CONFIG_SIZE = -d (CONFIG_SIZE)

  ## start at top of EMI, then drop down to the next flash below
  CONFIG_ADDR        = (FLASH_BANK0_ADDR+FLASH_BANK_SIZE) - CONFIG_SIZE
  ## RT091002 config area in the other bank
  CONFIG_MIRROR_ADDR = (FLASH_BANK1_ADDR+FLASH_BANK_SIZE) - CONFIG_SIZE

  ##################################
  ## broadcaster configuration area
  RESERVED_FLASH_SIZE = 0

  ## NON-ROM-BOOT size  ie size not including ROMBOOT / LOADER
## Removed RT020902 FLASH_NORMAL_SIZE = (FLASH_BANK_SIZE - CONFIG_SIZE)
## RT020902 flash size calculation:
## 4 Mbyte - config size - 36 (OTV flash header size) - 256k (reserved top margin)
## RT180902 if basicloader == TRUE, then configure flash size for basic loader
  if (basicloader) {
    write Configuring flash size for basic loader present
    FLASH_NORMAL_SIZE = (FLASH_BANK_SIZE-CONFIG_SIZE-FLASH_HDR_SIZE-FLASH_TOP_MARGIN)
  } else {
    write Configuring flash size for basic loader absent
    FLASH_NORMAL_SIZE = (FLASH_BANK_SIZE-CONFIG_SIZE-FLASH_HDR_SIZE)  
  }  
  
  BOOT_ADDRESS      = FLASH_BANK0_ADDR+FLASH_NORMAL_SIZE+FLASH_HDR_SIZE-2  
  
  Board
  
  memory  CONFIG        (CONFIG_ADDR)         (CONFIG_SIZE)       RESERVED
  ## RT091002 config area in the other bank
  memory  CONFIG_MIRROR (CONFIG_MIRROR_ADDR)  (CONFIG_SIZE)       RESERVED
  
}  ## end proc Board_MemoryMap() ##

##################################
## Board_MemoryMapTestharness()
## Applies extensions to physical memory map of the board. calls level cfg procedure.
## only for TestHarness, since it can access ALL of FLASH
##    called by   TestharnPlace() 

proc Board_MemoryMapTestharness {

  #################################
  ## call procedure to get the physical locations and sizes of all the parts
  MemoryMap_Defines

  ## ALL OF THE FLASH !!!
  ## RT180902 need to subtract FLASH_HDR_SIZE here, as it is added in again later
  FLASH_NORMAL_SIZE = (FLASH_BANK_SIZE-FLASH_HDR_SIZE)
  
  BOOT_ADDRESS      = FLASH_BANK0_ADDR+FLASH_NORMAL_SIZE+FLASH_HDR_SIZE-2

  Board
  
}  ## end proc Board_MemoryMapTestharness() ##

################################
## Board_MemoryMap_WithLoader()
## Applies extensions to physical memory map of the board. calls level cfg procedure.
##    called by   c2flashmain() 
##     and        () 

proc Board_MemoryMap_WithLoader {

  #################################
  ## call procedure to get the physical locations and sizes of all the parts
  MemoryMap_Defines

  ##################################
  ## part of flash to contain loader  + ROMBOOT (3 K)
  ## RT210502 increased memory size to 256k
  ##################################    
  CONFIG_SIZE = (256*K)
  CONFIG_ADDR = 0m0 - (CONFIG_SIZE)

  ##################################
  ## broadcaster configuration area
  RESERVED_FLASH_SIZE = 384

## NON-ROM-BOOT size  ie size not including ROMBOOT / LOADER
## Removed RT020902 FLASH_NORMAL_SIZE = (FLASH_BANK_SIZE - CONFIG_SIZE)
## RT020902 flash size calculation:
## 4 Mbyte - 256k (loader size) - 36 (OTV flash header size) - 256k (reserved top margin) 
##
  FLASH_NORMAL_SIZE = (FLASH_BANK_SIZE-CONFIG_SIZE-FLASH_HDR_SIZE-FLASH_TOP_MARGIN)
  
  BOOT_ADDRESS      = FLASH_BANK0_ADDR+FLASH_NORMAL_SIZE+FLASH_HDR_SIZE-2  

  ########################################################################
  ## RT210502
  ## these defines mark the start and end of the two write-protected areas
  ########################################################################
  define cfg_loader_bank0_start (FLASH_BANK0_ADDR+FLASH_NORMAL_SIZE)
  define cfg_loader_bank0_end   (FLASH_BANK1_ADDR+FLASH_BANK_SIZE  )
  define cfg_loader_bank1_start (FLASH_BANK0_ADDR+FLASH_NORMAL_SIZE)
  define cfg_loader_bank1_end   (FLASH_BANK1_ADDR+FLASH_NORMAL_SIZE)
    
  Board
  memory  CONFIG        (CONFIG_ADDR)       (CONFIG_SIZE)       RESERVED
  
}  ## end proc Board_MemoryMap_WithLoader() ##

##################################
## Board_MemoryMap_boot()
## Applies extensions to physical memory map of the board. calls level cfg procedure.
##    called by   c2hostboot() 

proc Board_MemoryMap_boot {

  #################################
  ## call procedure to get the physical locations and sizes of all the parts