📄 pins.h
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//*****************************************************************************
#define PIN_PHASEB_HIGH_PIN GPIO_PIN_2
//*****************************************************************************
//
//! The PWM channel on which the phase B high side resides.
//
//*****************************************************************************
#define PWM_PHASEB_HIGH (1 << 2)
//*****************************************************************************
//
//! The GPIO port on which the Ethernet status zero LED resides.
//
//*****************************************************************************
#define PIN_LEDSTATUS0_PORT GPIO_PORTF_BASE
//*****************************************************************************
//
//! The GPIO pin on which the Ethernet status zero LED resides.
//
//*****************************************************************************
#define PIN_LEDSTATUS0_PIN GPIO_PIN_3
//*****************************************************************************
//
//! The GPIO port on which the Ethernet status one LED resides.
//
//*****************************************************************************
#define PIN_LEDSTATUS1_PORT GPIO_PORTF_BASE
//*****************************************************************************
//
//! The GPIO pin on which the Ethernet status one LED resides.
//
//*****************************************************************************
#define PIN_LEDSTATUS1_PIN GPIO_PIN_2
//*****************************************************************************
//
//! The GPIO port on which the phase C low side pin resides.
//
//*****************************************************************************
#define PIN_PHASEC_LOW_PORT GPIO_PORTE_BASE
//*****************************************************************************
//
//! The GPIO pin on which the phase C low side pin resides.
//
//*****************************************************************************
#define PIN_PHASEC_LOW_PIN GPIO_PIN_1
//*****************************************************************************
//
//! The PWM channel on which the phase C low side resides.
//
//*****************************************************************************
#define PWM_PHASEC_LOW (1 << 5)
//*****************************************************************************
//
//! The GPIO port on which the phase C high side pin resides.
//
//*****************************************************************************
#define PIN_PHASEC_HIGH_PORT GPIO_PORTE_BASE
//*****************************************************************************
//
//! The GPIO pin on which the phase C high side pin resides.
//
//*****************************************************************************
#define PIN_PHASEC_HIGH_PIN GPIO_PIN_0
//*****************************************************************************
//
//! The PWM channel on which the phase C high side resides.
//
//*****************************************************************************
#define PWM_PHASEC_HIGH (1 << 4)
//*****************************************************************************
//
//! The GPIO port on which the CAN0 Rx pin resides.
//
//*****************************************************************************
#define PIN_CAN0RX_PORT GPIO_PORTD_BASE
//*****************************************************************************
//
//! The GPIO pin on which the CAN0 Rx pin resides.
//
//*****************************************************************************
#define PIN_CAN0RX_PIN GPIO_PIN_0
//*****************************************************************************
//
//! The GPIO port on which the CAN0 Tx pin resides.
//
//*****************************************************************************
#define PIN_CAN0TX_PORT GPIO_PORTD_BASE
//*****************************************************************************
//
//! The GPIO pin on which the CAN0 Tx pin resides.
//
//*****************************************************************************
#define PIN_CAN0TX_PIN GPIO_PIN_1
//*****************************************************************************
//
//! The GPIO port on which the CFG0 pin resides.
//
//*****************************************************************************
#define PIN_CFG0_PORT GPIO_PORTA_BASE
//*****************************************************************************
//
//! The GPIO pin on which the CFG0 pin resides.
//
//*****************************************************************************
#define PIN_CFG0_PIN GPIO_PIN_2
//*****************************************************************************
//
//! The GPIO port on which the CFG1 pin resides.
//
//*****************************************************************************
#define PIN_CFG1_PORT GPIO_PORTA_BASE
//*****************************************************************************
//
//! The GPIO pin on which the CFG1 pin resides.
//
//*****************************************************************************
#define PIN_CFG1_PIN GPIO_PIN_3
//*****************************************************************************
//
//! The GPIO port on which the CFG2 pin resides.
//
//*****************************************************************************
#define PIN_CFG2_PORT GPIO_PORTA_BASE
//*****************************************************************************
//
//! The GPIO pin on which the CFG2 pin resides.
//
//*****************************************************************************
#define PIN_CFG2_PIN GPIO_PIN_4
//*****************************************************************************
//
//! The GPIO port on which the HALL A pin resides.
//
//*****************************************************************************
#define PIN_HALLA_PORT GPIO_PORTB_BASE
//*****************************************************************************
//
//! The GPIO pin on which the HALL A pin resides.
//
//*****************************************************************************
#define PIN_HALLA_PIN GPIO_PIN_4
//*****************************************************************************
//
//! The GPIO port on which the HALL B pin resides.
//
//*****************************************************************************
#define PIN_HALLB_PORT GPIO_PORTB_BASE
//*****************************************************************************
//
//! The GPIO pin on which the HALL B pin resides.
//
//*****************************************************************************
#define PIN_HALLB_PIN GPIO_PIN_5
//*****************************************************************************
//
//! The GPIO port on which the HALL C pin resides.
//
//*****************************************************************************
#define PIN_HALLC_PORT GPIO_PORTB_BASE
//*****************************************************************************
//
//! The GPIO pin on which the HALL C pin resides.
//
//*****************************************************************************
#define PIN_HALLC_PIN GPIO_PIN_6
//*****************************************************************************
//
//! The ADC channel on which the DC bus voltage sense resides.
//
//*****************************************************************************
#define PIN_VSENSE ADC_CTL_CH0
//*****************************************************************************
//
//! The ADC channel on which the DC Back EMF (Phase A) voltage sense resides.
//
//*****************************************************************************
#define PIN_VBEMFA ADC_CTL_CH1
//*****************************************************************************
//
//! The ADC channel on which the DC Back EMF (Phase B) voltage sense resides.
//
//*****************************************************************************
#define PIN_VBEMFB ADC_CTL_CH2
//*****************************************************************************
//
//! The ADC channel on which the DC Back EMF (Phase C) voltage sense resides.
//
//*****************************************************************************
#define PIN_VBEMFC ADC_CTL_CH3
//*****************************************************************************
//
//! The ADC channel on which the phase A current sense resides.
//
//*****************************************************************************
#define PIN_IPHASEA ADC_CTL_CH4
//*****************************************************************************
//
//! The ADC channel on which the phase B current sense resides.
//
//*****************************************************************************
#define PIN_IPHASEB ADC_CTL_CH5
//*****************************************************************************
//
//! The ADC channel on which the phase C current sense resides.
//
//*****************************************************************************
#define PIN_IPHASEC ADC_CTL_CH6
//*****************************************************************************
//
//! The ADC channel on which the Analog Input voltage sense resides.
//
//*****************************************************************************
#define PIN_VANALOG ADC_CTL_CH7
//*****************************************************************************
//
// Close the Doxygen group.
//! @}
//
//*****************************************************************************
#endif // __PINS_H__
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