cpu.c

基于Freescale Codewarrior6.2环境下的针对qe8 单片机的LM75A温度传感器的驱动程序,可以直接使用

/** ###################################################################
**     THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
**     Filename  : Cpu.C
**     Project   : LM75A
**     Processor : MC9S08QE8CFM
**     Beantype  : MC9S08QE8_32
**     Version   : Bean 01.001, Driver 01.31, CPU db: 3.00.026
**     Datasheet : MC9S08QE8RM Rev. 1 3/2007
**     Compiler  : CodeWarrior HCS08 C Compiler
**     Date/Time : 2009-1-13, 15:25
**     Abstract  :
**         This bean "MC9S08QE8_32" contains initialization of the
**         CPU and provides basic methods and events for CPU core
**         settings.
**     Settings  :
**
**     Contents  :
**         EnableInt  - void Cpu_EnableInt(void);
**         DisableInt - void Cpu_DisableInt(void);
**         Delay100US - void Cpu_Delay100US(word us100);
**
**     (c) Copyright UNIS, spol. s r.o. 1997-2008
**     UNIS, spol. s r.o.
**     Jundrovska 33
**     624 00 Brno
**     Czech Republic
**     http      : www.processorexpert.com
**     mail      : [e-mail]
** ###################################################################*/

/* MODULE Cpu. */

#pragma MESSAGE DISABLE C4002 /* WARNING C4002: Result not used is ignored */

#include "I2C1.h"
#include "PE_Types.h"
#include "PE_Error.h"
#include "PE_Const.h"
#include "IO_Map.h"
#include "Events.h"
#include "Cpu.h"


/* Global variables */
volatile byte CCR_reg;                 /* Current CCR register */


/*
** ===================================================================
**     Method      :  Cpu_Interrupt (bean MC9S08QE8_32)
**
**     Description :
**         The method services unhandled interrupt vectors.
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
ISR(Cpu_Interrupt)
{
}



/*
** ===================================================================
**     Method      :  Cpu_DisableInt (bean MC9S08QE8_32)
**
**     Description :
**         Disables maskable interrupts
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_DisableInt(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_EnableInt (bean MC9S08QE8_32)
**
**     Description :
**         Enables maskable interrupts
**     Parameters  : None
**     Returns     : Nothing
** ===================================================================
*/
/*
void Cpu_EnableInt(void)

**      This method is implemented as macro in the header module. **
*/

/*
** ===================================================================
**     Method      :  Cpu_Delay100US (bean MC9S08QE8_32)
**
**     Description :
**         This method realizes software delay. The length of delay
**         is at least 100 microsecond multiply input parameter
**         [us100]. As the delay implementation is not based on real
**         clock, the delay time may be increased by interrupt
**         service routines processed during the delay. The method
**         is independent on selected speed mode.
**     Parameters  :
**         NAME            - DESCRIPTION
**         us100           - Number of 100 us delay repetitions.
**     Returns     : Nothing
** ===================================================================
*/
#pragma NO_ENTRY
#pragma NO_EXIT
#pragma MESSAGE DISABLE C5703
void Cpu_Delay100US(word us100)
{
  /* Total irremovable overhead: 16 cycles */
  /* ldhx: 5 cycles overhead (load parameter into register) */
  /* jsr:  5 cycles overhead (jump to subroutine) */
  /* rts:  6 cycles overhead (return from subroutine) */

  /* aproximate irremovable overhead for each 100us cycle (counted) : 8 cycles */
  /* aix:  2 cycles overhead  */
  /* cphx: 3 cycles overhead  */
  /* bne:  3 cycles overhead  */
  asm {
loop:
    /* 100 us delay block begin */
    /*
     * Delay
     *   - requested                  : 100 us @ 4.194304MHz,
     *   - possible                   : 419 c, 99897.38 ns, delta -102.61 ns
     *   - without removable overhead : 411 c, 97990.04 ns
     */
    pshh                               /* (2 c: 476.84 ns) backup H */
    pshx                               /* (2 c: 476.84 ns) backup X */
    ldhx #$0031                        /* (3 c: 715.26 ns) number of iterations */
label0:
    aix #-1                            /* (2 c: 476.84 ns) decrement H:X */
    cphx #0                            /* (3 c: 715.26 ns) compare it to zero */
    bne label0                         /* (3 c: 715.26 ns) repeat 49x */
    pulx                               /* (3 c: 715.26 ns) restore X */
    pulh                               /* (3 c: 715.26 ns) restore H */
    nop                                /* (1 c: 238.42 ns) wait for 1 c */
    nop                                /* (1 c: 238.42 ns) wait for 1 c */
    nop                                /* (1 c: 238.42 ns) wait for 1 c */
    nop                                /* (1 c: 238.42 ns) wait for 1 c */
    nop                                /* (1 c: 238.42 ns) wait for 1 c */
    nop                                /* (1 c: 238.42 ns) wait for 1 c */
    /* 100 us delay block end */
    aix #-1                            /* us100 parameter is passed via H:X registers */
    cphx #0
    bne loop                           /* next loop */
    rts                                /* return from subroutine */
  }
}

/*
** ===================================================================
**     Method      :  _EntryPoint (bean MC9S08QE8_32)
**
**     Description :
**         Initializes the whole system like timing and so on. At the end 
**         of this function, the C startup is invoked to initialize stack,
**         memory areas and so on.
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
extern void _Startup(void);            /* Forward declaration of external startup function declared in file Start12.c */

#pragma NO_FRAME
#pragma NO_EXIT
void _EntryPoint(void)
{
  /* ### MC9S08QE8_32 "Cpu" init code ... */
  /*  PE initialization code after reset */
  /* Common initialization of the write once registers */
  /* SOPT1: COPE=0,COPT=1,STOPE=0,??=0,??=0,??=0,BKGDPE=1,RSTPE=0 */
  setReg8(SOPT1, 0x42);                 
  /* SOPT2: COPCLKS=0,??=0,TPM2CH2PS=0,TPM1CH2PS=0,??=0,ACIC2=0,IICPS=0,ACIC1=0 */
  setReg8(SOPT2, 0x00);                 
  /* SPMSC1: LVDF=0,LVDACK=0,LVDIE=0,LVDRE=1,LVDSE=1,LVDE=1,??=0,BGBE=0 */
  setReg8(SPMSC1, 0x1C);                
  /* SPMSC2: LPR=0,LPRS=0,LPWUI=0,??=0,PPDF=0,PPDACK=0,PPDE=1,PPDC=0 */
  setReg8(SPMSC2, 0x02);                
  /* SPMSC3: LVWIE=0 */
  clrReg8Bits(SPMSC3, 0x08);            
  /*  System clock initialization */
  /* ICSC1: CLKS=0,RDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */
  setReg8(ICSC1, 0x06);                /* Initialization of the ICS control register 1 */ 
  /* ICSC2: BDIV=1,RANGE=0,HGO=0,LP=0,EREFS=0,ERCLKEN=0,EREFSTEN=0 */
  setReg8(ICSC2, 0x40);                /* Initialization of the ICS control register 2 */ 
  while(!ICSSC_IREFST) {               /* Wait until the source of reference clock is internal clock */
  }
  /* ICSSC: DRST_DRS=0,DMX32=0 */
  clrReg8Bits(ICSSC, 0xE0);            /* Initialization of the ICS status and control */ 
  while((ICSSC & 0xC0) != 0x00) {      /* Wait until the FLL switches to Low range DCO mode */
  }
  /*** End of PE initialization code after reset ***/

  __asm   jmp _Startup ;               /* Jump to C startup code */

}

/*
** ===================================================================
**     Method      :  PE_low_level_init (bean MC9S08QE8_32)
**
**     Description :
**         Initializes beans and provides common register initialization. 
**         The method is called automatically as a part of the 
**         application initialization code.
**         This method is internal. It is used by Processor Expert only.
** ===================================================================
*/
void PE_low_level_init(void)
{
  /* Common initialization of the CPU registers */
  /* PTADD: PTADD3=0,PTADD2=0 */
  clrReg8Bits(PTADD, 0x0C);             
  /* PTASE: PTASE7=0,PTASE6=0,PTASE4=0,PTASE3=0,PTASE2=0,PTASE1=0,PTASE0=0 */
  clrReg8Bits(PTASE, 0xDF);             
  /* PTBSE: PTBSE7=0,PTBSE6=0,PTBSE5=0,PTBSE4=0,PTBSE3=0,PTBSE2=0,PTBSE1=0,PTBSE0=0 */
  setReg8(PTBSE, 0x00);                 
  /* PTCSE: PTCSE7=0,PTCSE6=0,PTCSE5=0,PTCSE4=0,PTCSE3=0,PTCSE2=0,PTCSE1=0,PTCSE0=0 */
  setReg8(PTCSE, 0x00);                 
  /* PTDSE: PTDSE3=0,PTDSE2=0,PTDSE1=0,PTDSE0=0 */
  clrReg8Bits(PTDSE, 0x0F);             
  /* PTADS: PTADS7=1,PTADS6=1,PTADS5=0,PTADS4=1,PTADS3=1,PTADS2=1,PTADS1=1,PTADS0=1 */
  setReg8(PTADS, 0xDF);                 
  /* PTBDS: PTBDS7=1,PTBDS6=1,PTBDS5=1,PTBDS4=1,PTBDS3=1,PTBDS2=1,PTBDS1=1,PTBDS0=1 */
  setReg8(PTBDS, 0xFF);                 
  /* PTCDS: PTCDS7=1,PTCDS6=1,PTCDS5=1,PTCDS4=1,PTCDS3=1,PTCDS2=1,PTCDS1=1,PTCDS0=1 */
  setReg8(PTCDS, 0xFF);                 
  /* PTDDS: ??=0,??=0,??=0,??=0,PTDDS3=1,PTDDS2=1,PTDDS1=1,PTDDS0=1 */
  setReg8(PTDDS, 0x0F);                 
  /* SCGC1: TPM2=1,TPM1=1,ADC=1,IIC=1,SCI=1 */
  setReg8Bits(SCGC1, 0x75);             
  /* SCGC2: DBG=1,FLS=1,IRQ=1,KBI=1,ACMP=1,RTC=1,SPI=1 */
  setReg8Bits(SCGC2, 0xFD);             
  /* ### Shared modules init code ... */
  /* ### InternalI2C "I2C1" init code ... */
  I2C1_Init();
  __EI();                              /* Enable interrupts */
}

/* Initialization of the CPU registers in FLASH */

/* NVPROT: FPS7=1,FPS6=1,FPS5=1,FPS4=1,FPS3=1,FPS2=1,FPS1=1,FPDIS=1 */
const unsigned char NVPROT_INIT @0x0000FFBD = 0xFF;

/* NVOPT: KEYEN=0,FNORED=1,??=1,??=1,??=1,??=1,SEC01=1,SEC00=0 */
const unsigned char NVOPT_INIT @0x0000FFBF = 0x7E;

/* END Cpu. */

/*
** ###################################################################
**
**     This file was created by UNIS Processor Expert 3.03 [04.07]
**     for the Freescale HCS08 series of microcontrollers.
**
** ###################################################################
*/