📄 sysctl.c
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//! condition.
//!
//! The \b ulPeripheral argument must be only one of the following values:
//! \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_WDOG,
//! \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1, \b SYSCTL_PERIPH_SSI,
//! \b SYSCTL_PERIPH_QEI, \b SYSCTL_PERIPH_I2C, \b SYSCTL_PERIPH_TIMER0,
//! \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2, \b SYSCTL_PERIPH_COMP0,
//! \b SYSCTL_PERIPH_COMP1, \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_GPIOA,
//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD,
//! \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF, \b SYSCTL_PERIPH_GPIOG,
//! \b SYSCTL_PERIPH_GPIOH, \b SYSCTL_PERIPH_CAN0, \b SYSCTL_PERIPH_CAN1,
//! \b SYSCTL_PERIPH_CAN2, or \b SYSCTL_PERIPH_ETH.
//!
//! \return None.
//
//*****************************************************************************
void
SysCtlPeripheralReset(unsigned long ulPeripheral)
{
volatile unsigned long ulDelay;
//
// Check the arguments.
//
ASSERT((ulPeripheral == SYSCTL_PERIPH_PWM) ||
(ulPeripheral == SYSCTL_PERIPH_ADC) ||
(ulPeripheral == SYSCTL_PERIPH_WDOG) ||
(ulPeripheral == SYSCTL_PERIPH_UART0) ||
(ulPeripheral == SYSCTL_PERIPH_UART1) ||
(ulPeripheral == SYSCTL_PERIPH_SSI) ||
(ulPeripheral == SYSCTL_PERIPH_QEI) ||
(ulPeripheral == SYSCTL_PERIPH_I2C) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER0) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER1) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER2) ||
(ulPeripheral == SYSCTL_PERIPH_COMP0) ||
(ulPeripheral == SYSCTL_PERIPH_COMP1) ||
(ulPeripheral == SYSCTL_PERIPH_COMP2) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOA) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOB) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOC) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOD) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOE) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOF) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOG) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOH) ||
(ulPeripheral == SYSCTL_PERIPH_CAN0) ||
(ulPeripheral == SYSCTL_PERIPH_CAN1) ||
(ulPeripheral == SYSCTL_PERIPH_CAN2) ||
(ulPeripheral == SYSCTL_PERIPH_ETH));
//
// Put the peripheral into the reset state.
//
HWREG(g_pulSRCRRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) |=
SYSCTL_PERIPH_MASK(ulPeripheral);
//
// Delay for a little bit.
//
for(ulDelay = 0; ulDelay < 16; ulDelay++)
{
}
//
// Take the peripheral out of the reset state.
//
HWREG(g_pulSRCRRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) &=
~SYSCTL_PERIPH_MASK(ulPeripheral);
}
//*****************************************************************************
//
//! Enables a peripheral.
//!
//! \param ulPeripheral is the peripheral to enable.
//!
//! Peripherals are enabled with this function. At power-up, all peripherals
//! are disabled; they must be enabled in order to operate or respond to
//! register reads/writes.
//!
//! The \b ulPeripheral argument must be only one of the following values:
//! \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_WDOG,
//! \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1, \b SYSCTL_PERIPH_SSI,
//! \b SYSCTL_PERIPH_QEI, \b SYSCTL_PERIPH_I2C, \b SYSCTL_PERIPH_TIMER0,
//! \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2, \b SYSCTL_PERIPH_COMP0,
//! \b SYSCTL_PERIPH_COMP1, \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_GPIOA,
//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD,
//! \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF, \b SYSCTL_PERIPH_GPIOG,
//! \b SYSCTL_PERIPH_GPIOH, \b SYSCTL_PERIPH_CAN0, \b SYSCTL_PERIPH_CAN1,
//! \b SYSCTL_PERIPH_CAN2, or \b SYSCTL_PERIPH_ETH.
//!
//! \return None.
//
//*****************************************************************************
void
SysCtlPeripheralEnable(unsigned long ulPeripheral)
{
//
// Check the arguments.
//
ASSERT((ulPeripheral == SYSCTL_PERIPH_PWM) ||
(ulPeripheral == SYSCTL_PERIPH_ADC) ||
(ulPeripheral == SYSCTL_PERIPH_WDOG) ||
(ulPeripheral == SYSCTL_PERIPH_UART0) ||
(ulPeripheral == SYSCTL_PERIPH_UART1) ||
(ulPeripheral == SYSCTL_PERIPH_SSI) ||
(ulPeripheral == SYSCTL_PERIPH_QEI) ||
(ulPeripheral == SYSCTL_PERIPH_I2C) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER0) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER1) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER2) ||
(ulPeripheral == SYSCTL_PERIPH_COMP0) ||
(ulPeripheral == SYSCTL_PERIPH_COMP1) ||
(ulPeripheral == SYSCTL_PERIPH_COMP2) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOA) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOB) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOC) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOD) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOE) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOF) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOG) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOH) ||
(ulPeripheral == SYSCTL_PERIPH_CAN0) ||
(ulPeripheral == SYSCTL_PERIPH_CAN1) ||
(ulPeripheral == SYSCTL_PERIPH_CAN2) ||
(ulPeripheral == SYSCTL_PERIPH_ETH));
//
// Enable this peripheral.
//
HWREG(g_pulRCGCRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) |=
SYSCTL_PERIPH_MASK(ulPeripheral);
}
//*****************************************************************************
//
//! Disables a peripheral.
//!
//! \param ulPeripheral is the peripheral to disable.
//!
//! Peripherals are disabled with this function. Once disabled, they will not
//! operate or respond to register reads/writes.
//!
//! The \b ulPeripheral argument must be only one of the following values:
//! \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_WDOG,
//! \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1, \b SYSCTL_PERIPH_SSI,
//! \b SYSCTL_PERIPH_QEI, \b SYSCTL_PERIPH_I2C, \b SYSCTL_PERIPH_TIMER0,
//! \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2, \b SYSCTL_PERIPH_COMP0,
//! \b SYSCTL_PERIPH_COMP1, \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_GPIOA,
//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD,
//! \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF, \b SYSCTL_PERIPH_GPIOG,
//! \b SYSCTL_PERIPH_GPIOH, \b SYSCTL_PERIPH_CAN0, \b SYSCTL_PERIPH_CAN1,
//! \b SYSCTL_PERIPH_CAN2, or \b SYSCTL_PERIPH_ETH.
//!
//! \return None.
//
//*****************************************************************************
void
SysCtlPeripheralDisable(unsigned long ulPeripheral)
{
//
// Check the arguments.
//
ASSERT((ulPeripheral == SYSCTL_PERIPH_PWM) ||
(ulPeripheral == SYSCTL_PERIPH_ADC) ||
(ulPeripheral == SYSCTL_PERIPH_WDOG) ||
(ulPeripheral == SYSCTL_PERIPH_UART0) ||
(ulPeripheral == SYSCTL_PERIPH_UART1) ||
(ulPeripheral == SYSCTL_PERIPH_SSI) ||
(ulPeripheral == SYSCTL_PERIPH_QEI) ||
(ulPeripheral == SYSCTL_PERIPH_I2C) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER0) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER1) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER2) ||
(ulPeripheral == SYSCTL_PERIPH_COMP0) ||
(ulPeripheral == SYSCTL_PERIPH_COMP1) ||
(ulPeripheral == SYSCTL_PERIPH_COMP2) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOA) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOB) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOC) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOD) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOE) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOF) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOG) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOH) ||
(ulPeripheral == SYSCTL_PERIPH_CAN0) ||
(ulPeripheral == SYSCTL_PERIPH_CAN1) ||
(ulPeripheral == SYSCTL_PERIPH_CAN2) ||
(ulPeripheral == SYSCTL_PERIPH_ETH));
//
// Disable this peripheral.
//
HWREG(g_pulRCGCRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) &=
~SYSCTL_PERIPH_MASK(ulPeripheral);
}
//*****************************************************************************
//
//! Enables a peripheral in sleep mode.
//!
//! \param ulPeripheral is the peripheral to enable in sleep mode.
//!
//! This function allows a peripheral to continue operating when the processor
//! goes into sleep mode. Since the clocking configuration of the device does
//! not change, any peripheral can safely continue operating while the
//! processor is in sleep mode, and can therefore wake the processor from sleep
//! mode.
//!
//! Sleep mode clocking of peripherals must be enabled via
//! SysCtlPeripheralClockGating(); if disabled, the peripheral sleep mode
//! configuration is maintained but has no effect when sleep mode is entered.
//!
//! The \b ulPeripheral argument must be only one of the following values:
//! \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_WDOG,
//! \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1, \b SYSCTL_PERIPH_SSI,
//! \b SYSCTL_PERIPH_QEI, \b SYSCTL_PERIPH_I2C, \b SYSCTL_PERIPH_TIMER0,
//! \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2, \b SYSCTL_PERIPH_COMP0,
//! \b SYSCTL_PERIPH_COMP1, \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_GPIOA,
//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD,
//! \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF, \b SYSCTL_PERIPH_GPIOG,
//! \b SYSCTL_PERIPH_GPIOH, \b SYSCTL_PERIPH_CAN0, \b SYSCTL_PERIPH_CAN1,
//! \b SYSCTL_PERIPH_CAN2, or \b SYSCTL_PERIPH_ETH.
//!
//! \return None.
//
//*****************************************************************************
void
SysCtlPeripheralSleepEnable(unsigned long ulPeripheral)
{
//
// Check the arguments.
//
ASSERT((ulPeripheral == SYSCTL_PERIPH_PWM) ||
(ulPeripheral == SYSCTL_PERIPH_ADC) ||
(ulPeripheral == SYSCTL_PERIPH_WDOG) ||
(ulPeripheral == SYSCTL_PERIPH_UART0) ||
(ulPeripheral == SYSCTL_PERIPH_UART1) ||
(ulPeripheral == SYSCTL_PERIPH_SSI) ||
(ulPeripheral == SYSCTL_PERIPH_QEI) ||
(ulPeripheral == SYSCTL_PERIPH_I2C) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER0) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER1) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER2) ||
(ulPeripheral == SYSCTL_PERIPH_COMP0) ||
(ulPeripheral == SYSCTL_PERIPH_COMP1) ||
(ulPeripheral == SYSCTL_PERIPH_COMP2) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOA) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOB) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOC) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOD) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOE) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOF) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOG) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOH) ||
(ulPeripheral == SYSCTL_PERIPH_CAN0) ||
(ulPeripheral == SYSCTL_PERIPH_CAN1) ||
(ulPeripheral == SYSCTL_PERIPH_CAN2) ||
(ulPeripheral == SYSCTL_PERIPH_ETH));
//
// Enable this peripheral in sleep mode.
//
HWREG(g_pulSCGCRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) |=
SYSCTL_PERIPH_MASK(ulPeripheral);
}
//*****************************************************************************
//
//! Disables a peripheral in sleep mode.
//!
//! \param ulPeripheral is the peripheral to disable in sleep mode.
//!
//! This function causes a peripheral to stop operating when the processor goes
//! into sleep mode. Disabling peripherals while in sleep mode helps to lower
//! the current draw of the device. If enabled (via SysCtlPeripheralEnable()),
//! the peripheral will automatically resume operation when the processor
//! leaves sleep mode, maintaining its entire state from before sleep mode was
//! entered.
//!
//! Sleep mode clocking of peripherals must be enabled via
//! SysCtlPeripheralClockGating(); if disabled, the peripheral sleep mode
//! configuration is maintained but has no effect when sleep mode is entered.
//!
//! The \b ulPeripheral argument must be only one of the following values:
//! \b SYSCTL_PERIPH_PWM, \b SYSCTL_PERIPH_ADC, \b SYSCTL_PERIPH_WDOG,
//! \b SYSCTL_PERIPH_UART0, \b SYSCTL_PERIPH_UART1, \b SYSCTL_PERIPH_SSI,
//! \b SYSCTL_PERIPH_QEI, \b SYSCTL_PERIPH_I2C, \b SYSCTL_PERIPH_TIMER0,
//! \b SYSCTL_PERIPH_TIMER1, \b SYSCTL_PERIPH_TIMER2, \b SYSCTL_PERIPH_COMP0,
//! \b SYSCTL_PERIPH_COMP1, \b SYSCTL_PERIPH_COMP2, \b SYSCTL_PERIPH_GPIOA,
//! \b SYSCTL_PERIPH_GPIOB, \b SYSCTL_PERIPH_GPIOC, \b SYSCTL_PERIPH_GPIOD,
//! \b SYSCTL_PERIPH_GPIOE, \b SYSCTL_PERIPH_GPIOF, \b SYSCTL_PERIPH_GPIOG,
//! \b SYSCTL_PERIPH_GPIOH, \b SYSCTL_PERIPH_CAN0, \b SYSCTL_PERIPH_CAN1,
//! \b SYSCTL_PERIPH_CAN2, \b SYSCTL_PERIPH_ETH.
//!
//! \return None.
//
//*****************************************************************************
void
SysCtlPeripheralSleepDisable(unsigned long ulPeripheral)
{
//
// Check the arguments.
//
ASSERT((ulPeripheral == SYSCTL_PERIPH_PWM) ||
(ulPeripheral == SYSCTL_PERIPH_ADC) ||
(ulPeripheral == SYSCTL_PERIPH_WDOG) ||
(ulPeripheral == SYSCTL_PERIPH_UART0) ||
(ulPeripheral == SYSCTL_PERIPH_UART1) ||
(ulPeripheral == SYSCTL_PERIPH_SSI) ||
(ulPeripheral == SYSCTL_PERIPH_QEI) ||
(ulPeripheral == SYSCTL_PERIPH_I2C) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER0) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER1) ||
(ulPeripheral == SYSCTL_PERIPH_TIMER2) ||
(ulPeripheral == SYSCTL_PERIPH_COMP0) ||
(ulPeripheral == SYSCTL_PERIPH_COMP1) ||
(ulPeripheral == SYSCTL_PERIPH_COMP2) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOA) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOB) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOC) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOD) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOE) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOF) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOG) ||
(ulPeripheral == SYSCTL_PERIPH_GPIOH) ||
(ulPeripheral == SYSCTL_PERIPH_CAN0) ||
(ulPeripheral == SYSCTL_PERIPH_CAN1) ||
(ulPeripheral == SYSCTL_PERIPH_CAN2) ||
(ulPeripheral == SYSCTL_PERIPH_ETH));
//
// Disable this peripheral in sleep mode.
//
HWREG(g_pulSCGCRegs[SYSCTL_PERIPH_INDEX(ulPeripheral)]) &=
~SYSCTL_PERIPH_MASK(ulPeripheral);
}
//*****************************************************************************
//
//! Enables a peripheral in deep-sleep mode.
//!
//! \param ulPeripheral is the peripheral to enable in deep-sleep mode.
//!
//! This function allows a peripheral to continue operating when the processor
//! goes into deep-sleep mode. Since the clocking configuration of the device
//! may change, not all peripherals can safely continue operating while the
//! processor is in sleep mode. Those that must run at a particular frequency
//! (such as a UART) will not work as expected if the clock changes. It is the
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