prcm-debug.c

来自「omap3 linux 2.6 用nocc去除了冗余代码」· C语言 代码 · 共 2,079 行 · 第 1/5 页

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/* * linux/arch/arm/mach-omap3/prcm-debug.c * * Copyright (C) 2007 Texas Instruments, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or * (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA * */#include <linux/module.h>#include <linux/init.h>#include <linux/delay.h>#include <linux/device.h>#include <asm/arch/resource.h>#include <asm/arch/prcm.h>#include <asm/arch/prcm-debug.h>#include <asm/arch/clock.h>#include "prcm-regs.h"/* #define RESOURCE_TEST  */#define S600M   600000000#define S550M   550000000#define S500M   500000000#define S250M   250000000#define S125M   125000000#define S19M    19200000#define S120M   120000000#define S477M   476000000#define S381M   381000000#define S191M   190000000#define S96M    96000000#define S166M   166000000#define S83M    83000000#define S66M    66500000#define S133M   133000000#define S266M   266000000#define S293M   293000000#define S320M   320000000#define scale_voltage_then_frequency  (curr_opp_no < target_opp_no)unsigned int round_rate_vdd1[5] = {	S125M, S250M, S500M, S550M, S600M	};unsigned int round_rate_vdd2[3] = {	0, S83M, S166M	};#define MAX_VDD1_OPP CO_VDD1_OPP5#define MAX_VDD2_OPP CO_VDD2_OPP3#define DPRINTK1(fmt, args...) printk(KERN_INFO"%s: " fmt,	\				__FUNCTION__ , ## args)#define execute_idle() \	{       \		__asm__ __volatile__ ("wfi");   \	}#define REQUEST_CO 0x1#define RELEASE_CO 0x2struct constraint_handle *co_latency;struct constraint_handle *co_opp;int nb_pre_test_func(struct notifier_block *n, unsigned long event, void *ptr){	printk(KERN_INFO"Pre Notifier function called for level %lu\n", event);	return 0;}int nb_post_test_func(struct notifier_block *n, unsigned long event, void *ptr){	printk(KERN_INFO"Post Notifier function called for level %lu\n", event);	return 0;}static struct notifier_block nb_test_pre = {	nb_pre_test_func,	NULL,};static struct notifier_block nb_test_post = {	nb_post_test_func,	NULL,};static struct constraint_id cnstr_id_lat = {	.type = RES_LATENCY_CO,	.data = (void *)"latency",};static struct constraint_id cnstr_id_vdd1 = {	.type = RES_OPP_CO,	.data = (void *)"vdd1_opp",};static struct constraint_id cnstr_id_vdd2 = {	.type = RES_OPP_CO,	.data = (void *)"vdd2_opp",};static struct constraint_id cnstr_id_arm = {	.type = RES_FREQ_CO,	.data = (void *)"arm_freq",};static struct constraint_id cnstr_id_dsp = {	.type = RES_FREQ_CO,	.data = (void *)"dsp_freq",};int power_configuration_test(void){	u32 ivaf, core1f, core1i, core2i, wkupf, wkupi;	u32 dssf, dssi, camf, cami, perf, peri;	u32 ssi_sysconfig, sdrc_sysconfig, sdma_sysconfig,	omap_ctrl_sysconfig, mbox_sysconfig, mcbsp1_sysconfig,	mcbsp2_sysconfig, gpt10_sysconfig, gpt11_sysconfig, uart1_sysconfig,	uart2_sysconfig, i2c1_sysconfig, i2c2_sysconfig, i2c3_sysconfig,	mcspi1_sysconfig, mcspi2_sysconfig, mcspi3_sysconfig, mcspi4_sysconfig,	mmc1_sysconfig, mmc2_sysconfig, sms_sysconfig, gpmc_sysconfig;	u32 sgxf, sgxi;	int ret = 0;	/* Turn on all power domains for test */	prcm_force_power_domain_state(DOM_IVA2, PRCM_ON);	prcm_force_power_domain_state(DOM_DSS, PRCM_ON);	prcm_force_power_domain_state(DOM_CAM, PRCM_ON);	prcm_force_power_domain_state(DOM_PER, PRCM_ON);	/* Save clock registers */	ivaf = CM_FCLKEN_IVA2;	core1f = CM_FCLKEN1_CORE;	core1i = CM_ICLKEN1_CORE;	core2i = CM_ICLKEN2_CORE;	sgxf = CM_FCLKEN_SGX;	sgxi = CM_ICLKEN_SGX;	wkupf = CM_FCLKEN_WKUP;	wkupi = CM_ICLKEN_WKUP;	dssf = CM_FCLKEN_DSS;	dssi = CM_ICLKEN_DSS;	camf = CM_FCLKEN_CAM;	cami = CM_ICLKEN_CAM;	perf = CM_FCLKEN_PER;	peri = CM_ICLKEN_PER;	/* Enable all clocks */	CM_FCLKEN_IVA2 = 0xFFFFFFFF;	CM_FCLKEN1_CORE = 0xFFFFFFFF;	CM_ICLKEN1_CORE = 0xFFFFFFFF;	CM_ICLKEN2_CORE = 0xFFFFFFFF;	CM_FCLKEN_SGX = 0xFFFFFFFF;	CM_ICLKEN_SGX = 0xFFFFFFFF;	CM_FCLKEN_WKUP = 0xFFFFFFFF;	CM_ICLKEN_WKUP = 0xFFFFFFFF;	CM_FCLKEN_DSS = 0xFFFFFFFF;	CM_ICLKEN_DSS = 0xFFFFFFFF;	CM_FCLKEN_CAM = 0xFFFFFFFF;	CM_ICLKEN_CAM = 0xFFFFFFFF;	CM_FCLKEN_PER = 0xFFFFFFFF;	CM_ICLKEN_PER = 0xFFFFFFFF;	/* Wait for clocks to stabilize */	mdelay(3000);	ssi_sysconfig = PRCM_SSI_SYSCONFIG;	sdrc_sysconfig = PRCM_SDRC_SYSCONFIG;	sdma_sysconfig = PRCM_SDMA_SYSCONFIG;	omap_ctrl_sysconfig = PRCM_OMAP_CTRL_SYSCONFIG;	mbox_sysconfig = PRCM_MBOXES_SYSCONFIG;	mcbsp1_sysconfig = PRCM_MCBSP1_SYSCONFIG;	mcbsp2_sysconfig = PRCM_MCBSP2_SYSCONFIG;	gpt10_sysconfig = PRCM_GPT10_SYSCONFIG;	gpt11_sysconfig = PRCM_GPT11_SYSCONFIG;	uart1_sysconfig = PRCM_UART1_SYSCONFIG;	uart2_sysconfig = PRCM_UART2_SYSCONFIG;	i2c1_sysconfig = PRCM_I2C1_SYSCONFIG;	i2c2_sysconfig = PRCM_I2C2_SYSCONFIG;	i2c3_sysconfig = PRCM_I2C3_SYSCONFIG;	mcspi1_sysconfig = PRCM_MCSPI1_SYSCONFIG;	mcspi2_sysconfig = PRCM_MCSPI2_SYSCONFIG;	mcspi3_sysconfig = PRCM_MCSPI3_SYSCONFIG;	mcspi4_sysconfig = PRCM_MCSPI4_SYSCONFIG;	mmc1_sysconfig = PRCM_MMC1_SYSCONFIG;	mmc2_sysconfig = PRCM_MMC2_SYSCONFIG;	sms_sysconfig = PRCM_SMS_SYSCONFIG;	gpmc_sysconfig = PRCM_GPMC_SYSCONFIG;	DPRINTK1 ("Before - SSI\t0x%x\n", PRCM_SSI_SYSCONFIG);	DPRINTK1 ("Before - SDRC\t0x%x\n", PRCM_SDRC_SYSCONFIG);	DPRINTK1 ("Before - SDMA\t0x%x\n", PRCM_SDMA_SYSCONFIG);	DPRINTK1 ("Before - CTRL\t0x%x\n", PRCM_OMAP_CTRL_SYSCONFIG);	DPRINTK1 ("Before - MBOXES\t0x%x\n", PRCM_MBOXES_SYSCONFIG);	DPRINTK1 ("Before - MCBSP1\t0x%x\n", PRCM_MCBSP1_SYSCONFIG);	DPRINTK1 ("Before - MCBSP2\t0x%x\n", PRCM_MCBSP2_SYSCONFIG);	DPRINTK1 ("Before - GPT10\t0x%x\n", PRCM_GPT10_SYSCONFIG);	DPRINTK1 ("Before - GPT11\t0x%x\n", PRCM_GPT11_SYSCONFIG);	DPRINTK1 ("Before - UART1\t0x%x\n", PRCM_UART1_SYSCONFIG);	DPRINTK1 ("Before - UART2\t0x%x\n", PRCM_UART2_SYSCONFIG);	DPRINTK1 ("Before - I2C1\t0x%x\n", PRCM_I2C1_SYSCONFIG);	DPRINTK1 ("Before - I2C2\t0x%x\n", PRCM_I2C2_SYSCONFIG);	DPRINTK1 ("Before - I2C3\t0x%x\n", PRCM_I2C3_SYSCONFIG);	DPRINTK1 ("Before - MCSPI1\t0x%x\n", PRCM_MCSPI1_SYSCONFIG);	DPRINTK1 ("Before - MCSPI2\t0x%x\n", PRCM_MCSPI2_SYSCONFIG);	DPRINTK1 ("Before - MCSPI3\t0x%x\n", PRCM_MCSPI3_SYSCONFIG);	DPRINTK1 ("Before - MCSPI4\t0x%x\n", PRCM_MCSPI4_SYSCONFIG);	DPRINTK1 ("Before - MMC1\t0x%x\n", PRCM_MMC1_SYSCONFIG);	DPRINTK1 ("Before - MMC2\t0x%x\n", PRCM_MMC2_SYSCONFIG);	DPRINTK1 ("Before - SMS\t0x%x\n", PRCM_SMS_SYSCONFIG);	ret = prcm_set_domain_power_configuration(DOM_CORE1, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, DOM_CORE1 failed\n");		goto revert;	}	ret = prcm_set_domain_power_configuration(DOM_WKUP, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, DOM_WKUP failed\n");		goto revert;	}	ret = prcm_set_domain_power_configuration(DOM_DSS, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, DOM_DSS failed\n");		goto revert;	}	ret = prcm_set_domain_power_configuration(DOM_CAM, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, DOM_CAM failed\n");		goto revert;	}	ret = prcm_set_domain_power_configuration(DOM_PER, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, DOM_PER failed\n");		goto revert;	}	ret = prcm_set_device_power_configuration(PRCM_SSI, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, PRCM_SSI failed\n");		goto revert;	}	ret = prcm_set_device_power_configuration(PRCM_CSIB, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, PRCM_CSIB failed\n");		goto revert;	}	ret = prcm_set_device_power_configuration(PRCM_SDRC, 2, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, PRCM_SDRC failed\n");		goto revert;	}	ret = prcm_set_device_power_configuration(PRCM_SMS, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, PRCM_SMS failed\n");		goto revert;	}	ret = prcm_set_device_power_configuration(PRCM_GPMC, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, PRCM_GPMC failed\n");		goto revert;	}	ret = prcm_set_device_power_configuration(PRCM_MPU_INTC, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, PRCM_MPU_INTC	failed"				"\n");		goto revert;	}	ret = prcm_set_device_power_configuration(PRCM_CAM, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, PRCM_CAM failed\n");		goto revert;	}	ret = prcm_set_device_power_configuration(PRCM_MMU, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, PRCM_MMU failed\n");		goto revert;	}	ret = prcm_set_device_power_configuration(PRCM_MCBSP2, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, PRCM_MCBSP2 failed"				"\n");		goto revert;	}	ret = prcm_set_device_power_configuration(PRCM_MCBSP3, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, PRCM_MCBSP3 failed"				"\n");		goto revert;	}	ret = prcm_set_device_power_configuration(PRCM_GPT2, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, PRCM_GPT2 failed\n");		goto revert;	}	ret = prcm_set_device_power_configuration(PRCM_GPT3, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, PRCM_GPT3 failed\n");		goto revert;	}	ret = prcm_set_device_power_configuration(PRCM_GPT4, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, PRCM_GPT4 failed\n");		goto revert;	}	ret = prcm_set_device_power_configuration(PRCM_GPIO4, 1, 1, 1);	if (ret != PRCM_PASS) {		DPRINTK1("Set domain power configuration, PRCM_GPIO4 failed\n");		goto revert;	}	DPRINTK1 ("After - SSI\t0x%x\n", PRCM_SSI_SYSCONFIG);	DPRINTK1 ("After - SDRC\t0x%x\n", PRCM_SDRC_SYSCONFIG);	DPRINTK1 ("After - SDMA\t0x%x\n", PRCM_SDMA_SYSCONFIG);	DPRINTK1 ("After - CTRL\t0x%x\n", PRCM_OMAP_CTRL_SYSCONFIG);	DPRINTK1 ("After - MBOXES\t0x%x\n", PRCM_MBOXES_SYSCONFIG);	DPRINTK1 ("After - MCBSP1\t0x%x\n", PRCM_MCBSP1_SYSCONFIG);	DPRINTK1 ("After - MCBSP2\t0x%x\n", PRCM_MCBSP2_SYSCONFIG);	DPRINTK1 ("After - GPT10\t0x%x\n", PRCM_GPT10_SYSCONFIG);	DPRINTK1 ("After - GPT11\t0x%x\n", PRCM_GPT11_SYSCONFIG);	DPRINTK1 ("After - UART1\t0x%x\n", PRCM_UART1_SYSCONFIG);	DPRINTK1 ("After - UART2\t0x%x\n", PRCM_UART2_SYSCONFIG);	DPRINTK1 ("After - I2C1\t0x%x\n", PRCM_I2C1_SYSCONFIG);	DPRINTK1 ("After - I2C2\t0x%x\n", PRCM_I2C2_SYSCONFIG);	DPRINTK1 ("After - I2C3\t0x%x\n", PRCM_I2C3_SYSCONFIG);	DPRINTK1 ("After - MCSPI1\t0x%x\n", PRCM_MCSPI1_SYSCONFIG);	DPRINTK1 ("After - MCSPI2\t0x%x\n", PRCM_MCSPI2_SYSCONFIG);	DPRINTK1 ("After - MCSPI3\t0x%x\n", PRCM_MCSPI3_SYSCONFIG);	DPRINTK1 ("After - MCSPI4\t0x%x\n", PRCM_MCSPI4_SYSCONFIG);	DPRINTK1 ("After - MMC1\t0x%x\n", PRCM_MMC1_SYSCONFIG);	DPRINTK1 ("After - MMC2\t0x%x\n", PRCM_MMC2_SYSCONFIG);	DPRINTK1 ("After - SMS\t0x%x\n", PRCM_SMS_SYSCONFIG);revert:	PRCM_SSI_SYSCONFIG = ssi_sysconfig;	PRCM_SDRC_SYSCONFIG = sdrc_sysconfig;	PRCM_SDMA_SYSCONFIG = sdma_sysconfig;	PRCM_OMAP_CTRL_SYSCONFIG = omap_ctrl_sysconfig;	PRCM_MBOXES_SYSCONFIG = mbox_sysconfig;	PRCM_MCBSP1_SYSCONFIG = mcbsp1_sysconfig;	PRCM_MCBSP5_SYSCONFIG = mcbsp2_sysconfig;	PRCM_GPT10_SYSCONFIG = gpt10_sysconfig;	PRCM_GPT11_SYSCONFIG = gpt11_sysconfig;	PRCM_UART1_SYSCONFIG = uart1_sysconfig;	PRCM_UART2_SYSCONFIG = uart2_sysconfig;	PRCM_I2C1_SYSCONFIG = i2c1_sysconfig;	PRCM_I2C2_SYSCONFIG = i2c2_sysconfig;	PRCM_I2C3_SYSCONFIG = i2c3_sysconfig;	PRCM_MCSPI1_SYSCONFIG = mcspi1_sysconfig;	PRCM_MCSPI2_SYSCONFIG = mcspi2_sysconfig;	PRCM_MCSPI3_SYSCONFIG = mcspi3_sysconfig;	PRCM_MCSPI4_SYSCONFIG = mcspi4_sysconfig;	PRCM_MMC1_SYSCONFIG = mmc1_sysconfig;	PRCM_MMC2_SYSCONFIG = mmc2_sysconfig;	PRCM_SMS_SYSCONFIG = sms_sysconfig;	PRCM_GPMC_SYSCONFIG = gpmc_sysconfig;	/* Restore clock registers */	CM_FCLKEN_IVA2 = ivaf;	CM_FCLKEN1_CORE = core1f;	CM_ICLKEN1_CORE = core1i;	CM_ICLKEN2_CORE = core2i;	CM_FCLKEN_SGX = sgxf;	CM_ICLKEN_SGX = sgxi;	CM_FCLKEN_WKUP = wkupf;	CM_ICLKEN_WKUP = wkupi;	CM_FCLKEN_DSS = dssf;	CM_ICLKEN_DSS = dssi;	CM_FCLKEN_CAM = camf;	CM_ICLKEN_CAM = cami;	CM_FCLKEN_PER = perf;	CM_ICLKEN_PER = peri;	/* Condition check required during error scenario */	if (ret != PRCM_PASS)		return -1;	/* Sleep/WaKeup dependency API test */	if (prcm_set_wkup_dependency(DOM_CAM, PRCM_WKDEP_EN_MPU |\		PRCM_WKDEP_EN_IVA2 | PRCM_WKDEP_EN_WKUP) != PRCM_PASS) {		printk(KERN_ERR"Camera domain wakeup dependency could not be "				"set\n");		return -1;	}	if (prcm_set_sleep_dependency(DOM_CAM, PRCM_SLEEPDEP_EN_CORE |\		PRCM_SLEEPDEP_EN_MPU | PRCM_SLEEPDEP_EN_IVA2) != PRCM_PASS) {		printk(KERN_ERR"Camera domain sleep dependency could not be "				"set\n");		return -1;	}	return 0;}EXPORT_SYMBOL(power_configuration_test);int prcm_set_power_state(u32 domain, u32 mode, u32 state){	int ret = 0;	u8 power_state;	u32 iclken, fclken;	prcm_get_domain_interface_clocks(domain , &iclken);	prcm_get_domain_functional_clocks(domain , &fclken);	if ((state == PRCM_OFF) || (state == PRCM_RET)) {		prcm_set_domain_interface_clocks(domain, 0x0);

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