📄 prcm-regs.h

📁 omap3 linux 2.6 用nocc去除了冗余代码
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#define PRM_CLKSEL		PRM_REG32(0xD40)#define PRM_CLKOUT_CTRL		PRM_REG32(0xD70)/* DSS_PRM registers */#define RM_RSTST_DSS		PRM_REG32(0xE58)#define PM_WKEN_DSS		PRM_REG32(0xEA0)#define PM_WKDEP_DSS		PRM_REG32(0xEC8)#define	PM_PWSTCTRL_DSS		PRM_REG32(0xEE0)#define PM_PWSTST_DSS		PRM_REG32(0xEE4)#define PM_PREPWSTST_DSS	PRM_REG32(0xEE8)/* CAM_PRM registers */#define RM_RSTST_CAM		PRM_REG32(0xF58)#define PM_WKDEP_CAM		PRM_REG32(0xFC8)#define PM_PWSTCTRL_CAM		PRM_REG32(0xFE0)#define PM_PWSTST_CAM		PRM_REG32(0xFE4)#define PM_PREPWSTST_CAM	PRM_REG32(0xFE8)/* PER_PRM registers */#define RM_RSTST_PER		PRM_REG32(0x1058)#define PM_WKEN_PER		PRM_REG32(0x10A0)#define PM_MPUGRPSEL_PER	PRM_REG32(0x10A4)#define PM_IVA2GRPSEL_PER	PRM_REG32(0x10A8)#define PM_WKST_PER		PRM_REG32(0x10B0)#define PM_WKDEP_PER		PRM_REG32(0x10C8)#define PM_PWSTCTRL_PER		PRM_REG32(0x10E0)#define PM_PWSTST_PER		PRM_REG32(0x10E4)#define PM_PREPWSTST_PER	PRM_REG32(0x10E8)/* EMU_PRM registers */#define RM_RSTST_EMU		PRM_REG32(0x1158)#define PM_PWSTST_EMU		PRM_REG32(0x11E4)/* Global Registers PRM */#define PRM_VC_SMPS_SA		PRM_REG32(0x1220)#define PRM_VC_SMPS_VOL_RA	PRM_REG32(0x1224)#define PRM_VC_SMPS_CMD_RA	PRM_REG32(0x1228)#define PRM_VC_CMD_VAL_0	PRM_REG32(0x122C)#define PRM_VC_CMD_VAL_1	PRM_REG32(0x1230)#define PRM_VC_CH_CONF		PRM_REG32(0x1234)#define PRM_VC_I2C_CFG		PRM_REG32(0x1238)#define PRM_VC_BYPASS_VAL	PRM_REG32(0x123C)#define PRM_RSTCTRL		PRM_REG32(0x1250)#define PRM_RSTTIME		PRM_REG32(0x1254)#define PRM_RSTST		PRM_REG32(0x1258)#define PRM_VOLTCTRL		PRM_REG32(0x1260)#define PRM_SRAM_PCHARGE	PRM_REG32(0x1264)#define PRM_CLKSRC_CTRL		PRM_REG32(0x1270)#define PRM_VOLTSETUP1		PRM_REG32(0x1290)#define PRM_VOLTOFFSET		PRM_REG32(0x1294)#define PRM_CLKSETUP		PRM_REG32(0x1298)#define PRM_POLCTRL		PRM_REG32(0x129C)#define PRM_VOLTSETUP2		PRM_REG32(0x12A0)#define PRM_VP1_CONFIG		PRM_REG32(0x12B0)#define PRM_VP1_VSTEPMIN	PRM_REG32(0x12B4)#define PRM_VP1_VSTEPMAX	PRM_REG32(0x12B8)#define PRM_VP1_VLIMITTO	PRM_REG32(0x12BC)#define PRM_VP1_VOLTAGE		PRM_REG32(0x12C0)#define PRM_VP1_STATUS		PRM_REG32(0x12C4)#define PRM_VP2_CONFIG		PRM_REG32(0x12D0)#define PRM_VP2_VSTEPMIN	PRM_REG32(0x12D4)#define PRM_VP2_VSTEPMAX	PRM_REG32(0x12D8)#define PRM_VP2_VLIMITTO	PRM_REG32(0x12DC)#define PRM_VP2_VOLTAGE		PRM_REG32(0x12E0)#define PRM_VP2_STATUS		PRM_REG32(0x12E4)/* NEON_PRM Registers */#define RM_RSTST_NEON		PRM_REG32(0x1358)#define PM_WKDEP_NEON		PRM_REG32(0x13C8)#define PM_PWSTCTRL_NEON	PRM_REG32(0x13E0)#define PM_PWSTST_NEON		PRM_REG32(0x13E4)#define PM_PREPWSTST_NEON	PRM_REG32(0x13E8)/* USBHOST_PRM Registers */#define RM_RSTST_USBHOST 	PRM_REG32(0x1458)#define PM_WKEN_USBHOST 	PRM_REG32(0x14A0)#define PM_MPUGRPSEL_USBHOST 	PRM_REG32(0x14A4)#define PM_IVA2GRPSEL_USBHOST 	PRM_REG32(0x14A8)#define PM_WKST_USBHOST 	PRM_REG32(0x14B0)#define PM_WKDEP_USBHOST 	PRM_REG32(0x14C8)#define PM_PWSTCTRL_USBHOST 	PRM_REG32(0x14E0)#define PM_PWSTST_USBHOST 	PRM_REG32(0x14E4)#define PM_PREPWSTST_USBHOST 	PRM_REG32(0x14E8)/* SYSCONFIG Registers *//* CORE1 */#define PRCM_SSI_BASE		0x48058000#define PRCM_SSI_SYSCONFIG		SYSCONFIG_REG32(PRCM_SSI_BASE, 0x10)#define PRCM_SDRC_BASE		0x6D000000#define PRCM_SDRC_SYSCONFIG	SYSCONFIG_REG32(PRCM_SDRC_BASE, 0x10)#define PRCM_SDMA_BASE	0x48056000#define PRCM_SDMA_SYSCONFIG	SYSCONFIG_REG32(PRCM_SDMA_BASE, 0x2C)#define PRCM_D2D_BASE		0x68003000#define PRCM_D2D_SYSCONFIG	SYSCONFIG_REG32(PRCM_D2D_BASE, 0x2C)#define PRCM_HSOTG_BASE	0x480AB000#define PRCM_HSOTG_SYSCONFIG	SYSCONFIG_REG32(PRCM_HSOTG_BASE, 0x404)#define PRCM_HDQ_BASE		0x480B2000#define PRCM_HDQ_SYSCONFIG	SYSCONFIG_REG32(PRCM_HDQ_BASE, 0x14)#define PRCM_OMAP_CTRL_BASE	0x48002000#define PRCM_OMAP_CTRL_SYSCONFIG	\	SYSCONFIG_REG32(PRCM_OMAP_CTRL_BASE, 0x10)#define PRCM_MBOXES_BASE	0x48094000#define PRCM_MBOXES_SYSCONFIG	SYSCONFIG_REG32(PRCM_MBOXES_BASE, 0x10)#define PRCM_FAC_BASE		0x48092000#define PRCM_FAC_SYSCONFIG	SYSCONFIG_REG32(PRCM_FAC_BASE, 0x18)#define PRCM_MCBSP1_BASE	0x48074000#define PRCM_MCBSP1_SYSCONFIG	SYSCONFIG_REG32(PRCM_MCBSP1_BASE, 0x8C)#define PRCM_MCBSP5_BASE	0x48096000#define PRCM_MCBSP5_SYSCONFIG	SYSCONFIG_REG32(PRCM_MCBSP5_BASE, 0x8C)#define PRCM_GPT10_BASE	0x48086000#define PRCM_GPT10_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPT10_BASE, 0x10)#define PRCM_GPT11_BASE	0x48088000#define PRCM_GPT11_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPT11_BASE, 0x10)#define PRCM_UART1_BASE	0x4806A000#define PRCM_UART1_SCR		SYSCONFIG_REG32(PRCM_UART1_BASE, 0x40)#define PRCM_UART1_SSR		SYSCONFIG_REG32(PRCM_UART1_BASE, 0x44)#define PRCM_UART1_SYSCONFIG	SYSCONFIG_REG32(PRCM_UART1_BASE, 0x54)#define PRCM_UART1_WER		SYSCONFIG_REG32(PRCM_UART1_BASE, 0x5C)#define PRCM_UART2_BASE	0x4806C000#define PRCM_UART2_SCR		SYSCONFIG_REG32(PRCM_UART2_BASE, 0x40)#define PRCM_UART2_SSR		SYSCONFIG_REG32(PRCM_UART2_BASE, 0x44)#define PRCM_UART2_SYSCONFIG	SYSCONFIG_REG32(PRCM_UART2_BASE, 0x54)#define PRCM_UART2_WER		SYSCONFIG_REG32(PRCM_UART2_BASE, 0x5C)#define PRCM_I2C1_BASE		0x48070000#define PRCM_I2C1_SYSCONFIG	SYSCONFIG_REG32(PRCM_I2C1_BASE, 0x20)#define PRCM_I2C2_BASE		0x48072000#define PRCM_I2C2_SYSCONFIG	SYSCONFIG_REG32(PRCM_I2C2_BASE, 0x20)#define PRCM_I2C3_BASE		0x48060000#define PRCM_I2C3_SYSCONFIG	SYSCONFIG_REG32(PRCM_I2C3_BASE, 0x20)#define PRCM_MCSPI1_BASE	0x48098000#define PRCM_MCSPI1_SYSCONFIG	SYSCONFIG_REG32(PRCM_MCSPI1_BASE, 0x10)#define PRCM_MCSPI2_BASE	0x4809A000#define PRCM_MCSPI2_SYSCONFIG		SYSCONFIG_REG32(PRCM_MCSPI2_BASE, 0x10)#define PRCM_MCSPI3_BASE	0x480B8000#define PRCM_MCSPI3_SYSCONFIG		SYSCONFIG_REG32(PRCM_MCSPI3_BASE, 0x10)#define PRCM_MCSPI4_BASE	0x480BA000#define PRCM_MCSPI4_SYSCONFIG		SYSCONFIG_REG32(PRCM_MCSPI4_BASE, 0x10)#define PRCM_MMC1_BASE		0x4809C000#define PRCM_MMC1_SYSCONFIG		SYSCONFIG_REG32(PRCM_MMC1_BASE, 0x10)#define PRCM_MMC2_BASE		0x480B4000#define PRCM_MMC2_SYSCONFIG	SYSCONFIG_REG32(PRCM_MMC2_BASE, 0x10)#define PRCM_MMC3_BASE		0x480AD000#define PRCM_MMC3_SYSCONFIG     SYSCONFIG_REG32(PRCM_MMC3_BASE, 0x10)#define PRCM_MPU_INTC_BASE	0x48200000#define PRCM_MPU_INTC_SYSCONFIG	SYSCONFIG_REG32(PRCM_MPU_INTC_BASE, 0x10)#define PRCM_SMS_BASE		0x6C000000#define PRCM_SMS_SYSCONFIG	SYSCONFIG_REG32(PRCM_SMS_BASE, 0x10)#define PRCM_GPMC_BASE	0x6E000000#define PRCM_GPMC_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPMC_BASE, 0x10)/* WKUP */#define PRCM_GPT1_BASE		0x48318000#define PRCM_GPT1_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPT1_BASE, 0x10)#define PRCM_GPT12_BASE	0x48304000#define PRCM_GPT12_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPT12_BASE, 0x10)#define PRCM_GPIO1_BASE	0x48310000#define PRCM_GPIO1_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPIO1_BASE, 0x10)#define GPIO1_IRQSTATUS1	DEFINE_REG(PRCM_GPIO1_BASE, 0x18)#define GPIO1_IRQSTATUS2	DEFINE_REG(PRCM_GPIO1_BASE, 0x28)#define GPIO1_IRQENABLE1	DEFINE_REG(PRCM_GPIO1_BASE, 0x1C)#define GPIO1_WAKEUPENABLE	DEFINE_REG(PRCM_GPIO1_BASE, 0x20)#define GPIO1_SETIRQENABLE1	DEFINE_REG(PRCM_GPIO1_BASE, 0x64)#define GPIO1_SETWKUENA		SYSCONFIG_REG32(PRCM_GPIO1_BASE, 0x84)#define GPIO1_FALLINGDETECT	SYSCONFIG_REG32(PRCM_GPIO1_BASE, 0x4C)#define PRCM_WDT1_BASE	0x4830C010#define PRCM_WDT1_SYSCONFIG	SYSCONFIG_REG32(PRCM_WDT1_BASE, 0x10)#define PRCM_WDT2_BASE	0x48314000#define PRCM_WDT2_SYSCONFIG	SYSCONFIG_REG32(PRCM_WDT2_BASE, 0x10)/* DSS */#define PRCM_DSS_BASE		0x48050000#define PRCM_DSS_SYSCONFIG	SYSCONFIG_REG32(PRCM_DSS_BASE, 0x10)#define PRCM_DISPC_BASE	0x48050400#define PRCM_DISPC_SYSCONFIG	SYSCONFIG_REG32(PRCM_DISPC_BASE, 0x10)#define PRCM_RFBI_BASE		0x48050800#define PRCM_RFBI_SYSCONFIG	SYSCONFIG_REG32(PRCM_RFBI_BASE, 0x10)/* CAM */#define PRCM_CAM_BASE		0x480BC000#define PRCM_CAM_SYSCONFIG	SYSCONFIG_REG32(PRCM_CAM_BASE, 0x04)#define PRCM_CSI_BASE		0x480BC200#define PRCM_CSIA_SYSCONFIG	SYSCONFIG_REG32(PRCM_CSI_BASE, 0x04)#define PRCM_CSIB_SYSCONFIG	SYSCONFIG_REG32(PRCM_CSI_BASE, 0x204)#define PRCM_MMU_BASE		0x480BD400#define PRCM_MMU_SYSCONFIG	SYSCONFIG_REG32(PRCM_MMU_BASE, 0x10)#define PRCM_ISP_CTRL_BASE		0x480BC000#define PRCM_ISP_CTRL_SYSCONFIG	SYSCONFIG_REG32(PRCM_ISP_CTRL_BASE, 0x40)/* PER */#define PRCM_MCBSP2_BASE	0x49022000#define PRCM_MCBSP2_SYSCONFIG	SYSCONFIG_REG32(PRCM_MCBSP2_BASE, 0x8C)#define PRCM_MCBSP3_BASE	0x49024000#define PRCM_MCBSP3_SYSCONFIG	SYSCONFIG_REG32(PRCM_MCBSP3_BASE, 0x8C)#define PRCM_MCBSP4_BASE	0x49026000#define PRCM_MCBSP4_SYSCONFIG	SYSCONFIG_REG32(PRCM_MCBSP4_BASE, 0x8C)#define PRCM_GPT2_BASE		0x49032000#define PRCM_GPT2_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPT2_BASE, 0x10)#define PRCM_GPT3_BASE		0x49034000#define PRCM_GPT3_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPT3_BASE, 0x10)#define PRCM_GPT4_BASE		0x49036000#define PRCM_GPT4_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPT4_BASE, 0x10)#define PRCM_GPT5_BASE		0x49038000#define PRCM_GPT5_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPT5_BASE, 0x10)#define PRCM_GPT6_BASE		0x4903A000#define PRCM_GPT6_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPT6_BASE, 0x10)#define PRCM_GPT7_BASE		0x4903C010#define PRCM_GPT7_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPT7_BASE, 0x10)#define PRCM_GPT8_BASE		0x4903E010#define PRCM_GPT8_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPT8_BASE, 0x10)#define PRCM_GPT9_BASE		0x49040010#define PRCM_GPT9_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPT9_BASE, 0x10)#define PRCM_UART3_BASE	0x49020000#define PRCM_UART3_SCR		SYSCONFIG_REG32(PRCM_UART3_BASE, 0x40)#define PRCM_UART3_SSR		SYSCONFIG_REG32(PRCM_UART3_BASE, 0x44)#define PRCM_UART3_SYSCONFIG	SYSCONFIG_REG32(PRCM_UART3_BASE, 0x54)#define PRCM_UART3_WER		SYSCONFIG_REG32(PRCM_UART3_BASE, 0x5C)#define PRCM_WDT3_BASE	0x49030000#define PRCM_WDT3_SYSCONFIG	SYSCONFIG_REG32(PRCM_WDT3_BASE, 0x10)#define PRCM_GPIO2_BASE	0x49050000#define PRCM_GPIO2_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPIO2_BASE, 0x10)#define PRCM_GPIO3_BASE	0x49052000#define PRCM_GPIO3_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPIO3_BASE, 0x10)#define PRCM_GPIO4_BASE	0x49054000#define PRCM_GPIO4_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPIO4_BASE, 0x10)#define PRCM_GPIO5_BASE	0x49056000#define PRCM_GPIO5_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPIO5_BASE, 0x10)#define PRCM_GPIO6_BASE	0x49058000#define PRCM_GPIO6_SYSCONFIG	SYSCONFIG_REG32(PRCM_GPIO6_BASE, 0x10)#endif				  /* SMART REFLEX REG BASE ADDRESS */#define OMAP34XX_SR1_BASE	0x480C9000#define OMAP34XX_SR2_BASE	0x480CB000/* SMART REFLEX REG ADDRESS OFFSET */#define SRCONFIG	0x00#define SRSTATUS	0x04#define SENVAL		0x08#define SENMIN		0x0C#define SENMAX		0x10#define SENAVG		0x14#define AVGWEIGHT	0x18#define NVALUERECIPROCAL	0x1C#define SENERROR	0x20#define ERRCONFIG	0x24
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