clock_34xx.h

omap3 linux 2.6 用nocc去除了冗余代码

	/* No s/w control for this clock */
	.flags	= CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk wdt1_ick = {
	.name	= "wdt_ick",
	.id	= 1,
	.prcmid	= PRCM_WDT1,
	.parent	= &sys_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk wdt1_fck = {
	.name	= "wdt_fck",
	.id	= 1,
	.parent	= &sys_32k_ck,
	/* No s/w control for this clock */
	.flags	= CLOCK_IN_OMAP343X | ALWAYS_ENABLED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk mcbsp2_fck = {
	.name	= "mcbsp2_fck",
	.parent	= &func_96m_ck,	/*Can be external clock too */
	.prcmid	= PRCM_MCBSP2,
	.flags	= CLOCK_IN_OMAP343X | SRC_SEL | F_CLK | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk mcbsp2_ick = {
	.name	= "mcbsp2_ick",
	.parent	= &l4_ck,
	.prcmid	= PRCM_MCBSP2,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk mcbsp3_fck = {
	.name	= "mcbsp3_fck",
	.parent	= &func_96m_ck,	/* Can be external clock too */
	.prcmid	= PRCM_MCBSP3,
	.flags	= CLOCK_IN_OMAP343X | SRC_SEL | F_CLK | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk mcbsp3_ick = {
	.name	= "mcbsp3_ick",
	.parent	= &l4_ck,
	.prcmid	= PRCM_MCBSP3,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk mcbsp4_fck = {
	.name	= "mcbsp4_fck",
	.parent	= &func_96m_ck,	/* can be external clock too */
	.prcmid	= PRCM_MCBSP4,
	.flags	= CLOCK_IN_OMAP343X | SRC_SEL | F_CLK | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk mcbsp4_ick = {
	.name	= "mcbsp4_ick",
	.parent	= &l4_ck,
	.prcmid	= PRCM_MCBSP4,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk uart3_ick = {
	.name	= "uart3_ick",
	.prcmid	= PRCM_UART3,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk uart3_fck = {
	.name	= "uart3_fck",
	.prcmid	= PRCM_UART3,
	.parent	= &func_48m_ck,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk wdt3_fck = {
	.name	= "wdt_fck",
	.id	= 3,
	.prcmid	= PRCM_WDT3,
	.parent	= &sys_32k_ck,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk wdt3_ick = {
	.name	= "wdt_ick",
	.id	= 3,
	.prcmid	= PRCM_WDT3,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpio2_fck = {
	.name	= "gpio2_fck",
	.prcmid	= PRCM_GPIO2,
	.parent	= &sys_32k_ck,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpio2_ick = {
	.name	= "gpio2_ick",
	.prcmid	= PRCM_GPIO2,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpio3_fck = {
	.name	= "gpio3_fck",
	.prcmid	= PRCM_GPIO3,
	.parent	= &sys_32k_ck,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpio3_ick = {
	.name	= "gpio3_ick",
	.prcmid	= PRCM_GPIO3,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpio4_fck = {
	.name	= "gpio4_fck",
	.prcmid	= PRCM_GPIO4,
	.parent	= &sys_32k_ck,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpio4_ick = {
	.name	= "gpio4_ick",
	.prcmid	= PRCM_GPIO4,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpio5_fck = {
	.name	= "gpio5_fck",
	.prcmid	= PRCM_GPIO5,
	.parent	= &sys_32k_ck,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpio5_ick = {
	.name	= "gpio5_ick",
	.prcmid	= PRCM_GPIO5,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpio6_fck = {
	.name	= "gpio6_fck",
	.prcmid	= PRCM_GPIO6,
	.parent	= &sys_32k_ck,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpio6_ick = {
	.name	= "gpio6_ick",
	.prcmid	= PRCM_GPIO6,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt2_ick = {
	.name	= "gpt2_ick",
	.prcmid	= PRCM_GPT2,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt2_fck = {
	.name	= "gpt2_fck",
	.prcmid	= PRCM_GPT2,
	.parent	= &sys_ck,	/* can be sys_32k_ck too */
	.rate   = S_OSC,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | SRC_SEL | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt3_ick = {
	.name	= "gpt3_ick",
	.prcmid	= PRCM_GPT3,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt3_fck = {
	.name	= "gpt3_fck",
	.prcmid	= PRCM_GPT3,
	.parent	= &sys_ck,	/* Can be sys_32k_ck too */
	.rate   = S_OSC,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | SRC_SEL | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt4_ick = {
	.name	= "gpt4_ick",
	.prcmid	= PRCM_GPT4,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt4_fck = {
	.name	= "gpt4_fck",
	.prcmid	= PRCM_GPT4,
	.parent	= &sys_ck,	/* Can be sys_32k_ck too */
	.rate   = S_OSC,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | SRC_SEL | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt5_ick = {
	.name	= "gpt5_ick",
	.prcmid	= PRCM_GPT5,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt5_fck = {
	.name	= "gpt5_fck",
	.prcmid	= PRCM_GPT5,
	.parent	= &sys_ck,	/* Can be sys_32k_ck too */
	.rate   = S_OSC,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | SRC_SEL | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt6_ick = {
	.name	= "gpt6_ick",
	.prcmid	= PRCM_GPT6,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt6_fck = {
	.name	= "gpt6_fck",
	.prcmid	= PRCM_GPT6,
	.parent	= &sys_ck,	/* Can be sys_32k_ck too */
	.rate   = S_OSC,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | SRC_SEL | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt7_ick = {
	.name	= "gpt7_ick",
	.prcmid	= PRCM_GPT7,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt7_fck = {
	.name	= "gpt7_fck",
	.prcmid	= PRCM_GPT7,
	.parent	= &sys_ck,	/* Can be sys_32k_ck too */
	.rate	= S_OSC,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | SRC_SEL | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt8_ick = {
	.name	= "gpt8_ick",
	.prcmid	= PRCM_GPT8,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt8_fck = {
	.name	= "gpt8_fck",
	.prcmid	= PRCM_GPT8,
	.parent	= &sys_ck,	/* Can be sys_32k_ck too */
	.rate	= S_OSC,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | SRC_SEL | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt9_ick = {
	.name	= "gpt9_ick",
	.prcmid	= PRCM_GPT9,
	.parent	= &l4_ck,
	.flags	= CLOCK_IN_OMAP343X | I_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk gpt9_fck = {
	.name	= "gpt9_fck",
	.prcmid	= PRCM_GPT9,
	.parent	= &sys_ck,	/* Can be sys_32k_ck too */
	.rate	= S_OSC,
	.flags	= CLOCK_IN_OMAP343X | F_CLK | SRC_SEL | POWER_ON_REQUIRED,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk sr1_fck = {
	.name	= "sr1_fck",
	.prcmid	= PRCM_SR1,
	.parent	= &sys_ck,
	.flags	= CLOCK_IN_OMAP343X | F_CLK,
	.recalc	= &omap3_followparent_recalc,
};

static struct clk sr2_fck = {
	.name	= "sr2_fck",
	.prcmid	= PRCM_SR2,
	.parent	= &sys_ck,
	.flags	= CLOCK_IN_OMAP343X | F_CLK,
	.recalc	= &omap3_followparent_recalc,
};

/* This node is used to model the external mcbsp clock*/
/* Rate of the clock is supposed to be set using clk_set_rate API*/
static struct clk ext_mcbsp_ck = {
	.name	= "ext_mcbsp_ck",
	.prcmid	= PRCM_EXT_MCBSP_CLK,
	.rate	= S96M,
	.flags	= CLOCK_IN_OMAP343X | RATE_PROPAGATES,
	.recalc	= &omap3_propagate_rate,
};

static struct clk virt_vdd1_prcm_set = {
	.name		= "virt_vdd1_prcm_set",
	.flags		= CLOCK_IN_OMAP343X | VIRTUAL_CLOCK | ALWAYS_ENABLED,
	.parent		= &mpu_ck,	/* Indexed by mpu speed, no parent */
	.recalc		= &omap3_table_recalc,	/* sets are keyed on mpu rate */
	.set_rate	= &omap3_select_table_rate,
	.round_rate	= &omap3_round_to_table_rate,
};

static struct clk virt_vdd2_prcm_set = {
	.name		= "virt_vdd2_prcm_set",
	.flags		= CLOCK_IN_OMAP343X | VIRTUAL_CLOCK | ALWAYS_ENABLED,
	.parent		= &core_ck,	/* Indexed by core speed, no parent */
	.recalc		= &omap3_table_recalc,	/* sets are keyed on mpu rate */
	.set_rate	= &omap3_select_table_rate,
	.round_rate	= &omap3_round_to_table_rate,
};

static struct clk *onchip_clks[] = {
	/* external root sources */
	&sys_32k_ck,
	&osc_ck,
	&sys_ck,
	&sys_alt_ck,
	/* internal sources */
	&core_ck,
	&core_x2_ck,
	&emul_core_alwon_ck,
	&cm_96m_ck,
	&func_96m_ck,
	&dpll4_m3x2_ck,
	&emul_per_alwon_ck,
	&func_48m_ck,
	&func_12m_ck,
	&dss_tv_fck,
	&sys_clkout1,
	&sys_clkout2,
	&l3_ck,
	&l4_ck,
	&rm_ck,
	&dpll1_fck,
	&dpll2_fck,
	&mpu_ck,
	&iva2_ck,
	&usim_fck,
	&usim_ick,
	&usbhost2_fck,
	&cpefuse_fck,
	&ts_fck,
	&sgx_fck,
	&sgx_ick,
	&hsusb_ick,
	&sdrc_ick,
	&pka_ick,
	&aes2_ick,
	&sha12_ick,
	&des2_ick,
	&aes1_ick,
	&sha11_ick,
	&des1_ick,
	&rng_ick,
	&mcbsp1_fck,
	&mcbsp1_ick,
	&mcbsp5_fck,
	&mcbsp5_ick,
	&mmc1_fck,
	&mmc1_ick,
	&mmc2_fck,
	&mmc2_ick,
	&mmc3_fck,
	&mmc3_ick,
	&mspro_fck,
	&mspro_ick,
	&i2c1_fck,
	&i2c1_ick,
	&i2c2_fck,
	&i2c2_ick,
	&i2c3_fck,
	&i2c3_ick,
	&usbhost_ick,
	&usbhost1_fck,
	&usbtll_host_sar_fck,
	&usbtll_ick,
	&uart1_fck,
	&uart1_ick,
	&uart2_fck,
	&uart2_ick,
	&mcspi1_fck,
	&mcspi1_ick,
	&mcspi2_fck,
	&mcspi2_ick,
	&mcspi3_fck,
	&mcspi3_ick,
	&mcspi4_fck,
	&mcspi4_ick,
	&hdq_fck,
	&hdq_ick,
	&gpt10_fck,
	&gpt10_ick,
	&gpt11_fck,
	&gpt11_ick,
	&omapctrl_ick,
	&mailboxes_ick,
	&ssi_ick,
	&ssi_ssr_sst_fck,
	&dss1_fck,
	&dss_96m_fck,
	&dss2_fck,
	&dss_ick,
	&cam_fck,
	&cam_ick,
	&csi2_fck,
	&gpt1_fck,
	&gpt1_ick,
	&sync_32k_fck,
	&sync_32k_ick,
	&wdt2_fck,
	&wdt2_ick,
	&gpio1_fck,
	&gpio1_ick,
	&gpt12_fck,
	&gpt12_ick,
	&wdt1_fck,
	&wdt1_ick,
	&mcbsp2_fck,
	&mcbsp2_ick,
	&mcbsp3_fck,
	&mcbsp3_ick,
	&mcbsp4_fck,
	&mcbsp4_ick,
	&uart3_fck,
	&uart3_ick,
	&wdt3_fck,
	&wdt3_ick,
	&gpio2_fck,
	&gpio2_ick,
	&gpio3_fck,
	&gpio3_ick,
	&gpio4_fck,
	&gpio4_ick,
	&gpio5_fck,
	&gpio5_ick,
	&gpio6_fck,
	&gpio6_ick,
	&gpt2_fck,
	&gpt2_ick,
	&gpt3_fck,
	&gpt3_ick,
	&gpt4_fck,
	&gpt4_ick,
	&gpt5_fck,
	&gpt5_ick,
	&gpt6_fck,
	&gpt6_ick,
	&gpt7_fck,
	&gpt7_ick,
	&gpt8_fck,
	&gpt8_ick,
	&gpt9_fck,
	&gpt9_ick,
	&sr1_fck,
	&sr2_fck,
	/* External mcbsp clock */
	&ext_mcbsp_ck,
	/* virtual group clock */
	&virt_vdd1_prcm_set,
	&virt_vdd2_prcm_set,
};