📄 dc_2.mdl
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}
Line {
SrcBlock "Add2"
SrcPort 1
DstBlock "Out2"
DstPort 1
}
Line {
SrcBlock "In4"
SrcPort 1
DstBlock "Math\nFunction"
DstPort 1
}
}
}
Block {
BlockType Product
Name "Rx Mix 1"
Ports [2, 1]
Position [270, 37, 300, 68]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^0"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Rx Mix 2"
Ports [2, 1]
Position [275, 177, 305, 208]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^0"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sin
Name "Rx Quadrature \nSine Wave\nat Fc"
Ports [0, 1]
Position [100, 115, 130, 145]
Frequency "Fc*2*pi"
Phase "[-pi/2,0]"
SampleTime "0"
}
Block {
BlockType Outport
Name "Out1"
Position [575, 83, 605, 97]
IconDisplay "Port number"
}
Block {
BlockType Outport
Name "Out2"
Position [575, 223, 605, 237]
Port "2"
IconDisplay "Port number"
}
Line {
SrcBlock "In1"
SrcPort 1
Points [15, 0]
Branch {
Points [0, -85]
DstBlock "Rx Mix 1"
DstPort 1
}
Branch {
Points [0, 70]
Branch {
DstBlock "Rx Mix 2"
DstPort 2
}
Branch {
Points [0, 65]
DstBlock "Mixer IP2 Impairment"
DstPort 4
}
}
}
Line {
SrcBlock "Rx Quadrature \nSine Wave\nat Fc"
SrcPort 1
DstBlock "Demux1"
DstPort 1
}
Line {
Name "I_lo"
Labels [3, 0]
SrcBlock "Demux1"
SrcPort 1
Points [25, 0; 0, -60]
DstBlock "Rx Mix 1"
DstPort 2
}
Line {
Name "Q_lo"
Labels [3, 0]
SrcBlock "Demux1"
SrcPort 2
Points [25, 0; 0, 45]
DstBlock "Rx Mix 2"
DstPort 1
}
Line {
SrcBlock "Analog\nAA Filter I"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
Line {
SrcBlock "Analog\nAA Filter Q"
SrcPort 1
DstBlock "Out2"
DstPort 1
}
Line {
Labels [0, 0]
SrcBlock "Rx Mix 1"
SrcPort 1
DstBlock "Mixer IP2 Impairment"
DstPort 1
}
Line {
Labels [0, 0]
SrcBlock "Alpha"
SrcPort 1
DstBlock "Mixer IP2 Impairment"
DstPort 2
}
Line {
Labels [0, 0]
SrcBlock "Rx Mix 2"
SrcPort 1
DstBlock "Mixer IP2 Impairment"
DstPort 3
}
Line {
SrcBlock "Mixer IP2 Impairment"
SrcPort 1
DstBlock "Analog\nAA Filter I"
DstPort 1
}
Line {
SrcBlock "Mixer IP2 Impairment"
SrcPort 2
DstBlock "Analog\nAA Filter Q"
DstPort 1
}
Line {
SrcBlock "Constant"
SrcPort 1
DstBlock "Alpha"
DstPort 1
}
Annotation {
Name "Mixer In/Out relationship\nYout = (LO * RF) + (Alpha * RF^2)"
Position [196, 327]
FontSize 18
FontWeight "bold"
}
}
}
Block {
BlockType SubSystem
Name "Direct Conversion Tx 1"
Ports [2, 1]
Position [185, 60, 225, 120]
MinAlgLoopOccurrences off
PropExecContextOutsideSubsystem off
RTWSystemCode "Auto"
FunctionWithSeparateData off
Opaque off
RequestExecContextInheritance off
MaskHideContents off
System {
Name "Direct Conversion Tx 1"
Location [215, 160, 529, 494]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "In1"
Position [45, 28, 75, 42]
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "In2"
Position [35, 223, 65, 237]
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Demux
Name "Demux"
Ports [1, 2]
Position [80, 111, 85, 149]
BackgroundColor "black"
ShowName off
Outputs "2"
DisplayOption "bar"
Port {
PortNumber 1
Name "I_lo"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
Port {
PortNumber 2
Name "Q_lo"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Sum
Name "Sum"
Ports [2, 1]
Position [200, 112, 230, 168]
ShowName off
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^0"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Tx Mix 1"
Ports [2, 1]
Position [135, 27, 165, 58]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^0"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Tx Mix 2"
Ports [2, 1]
Position [135, 207, 165, 238]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^0"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sin
Name "Tx Quadrature \nSine Wave\nat Fc"
Ports [0, 1]
Position [25, 115, 55, 145]
Amplitude "4.1"
Frequency "Fc*2*pi"
Phase "[-pi/2,0]"
SampleTime "0"
}
Block {
BlockType Outport
Name "Out1"
Position [255, 133, 285, 147]
IconDisplay "Port number"
}
Line {
SrcBlock "Tx Quadrature \nSine Wave\nat Fc"
SrcPort 1
DstBlock "Demux"
DstPort 1
}
Line {
Name "I_lo"
Labels [3, 0]
SrcBlock "Demux"
SrcPort 1
Points [5, 0; 0, -70]
DstBlock "Tx Mix 1"
DstPort 2
}
Line {
Name "Q_lo"
Labels [3, 0]
SrcBlock "Demux"
SrcPort 2
Points [5, 0; 0, 75]
DstBlock "Tx Mix 2"
DstPort 1
}
Line {
SrcBlock "Tx Mix 1"
SrcPort 1
Points [5, 0; 0, 80]
DstBlock "Sum"
DstPort 1
}
Line {
SrcBlock "Tx Mix 2"
SrcPort 1
Points [5, 0; 0, -70]
DstBlock "Sum"
DstPort 2
}
Line {
SrcBlock "In1"
SrcPort 1
DstBlock "Tx Mix 1"
DstPort 1
}
Line {
SrcBlock "Sum"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
Line {
SrcBlock "In2"
SrcPort 1
DstBlock "Tx Mix 2"
DstPort 2
}
}
}
Block {
BlockType SubSystem
Name "Direct Conversion Tx 2"
Ports [2, 1]
Position [180, 180, 220, 240]
MinAlgLoopOccurrences off
PropExecContextOutsideSubsystem off
RTWSystemCode "Auto"
FunctionWithSeparateData off
Opaque off
RequestExecContextInheritance off
MaskHideContents off
System {
Name "Direct Conversion Tx 2"
Location [215, 179, 529, 494]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "usletter"
PaperUnits "inches"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "In1"
Position [45, 28, 75, 42]
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "In2"
Position [35, 223, 65, 237]
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Demux
Name "Demux"
Ports [1, 2]
Position [80, 111, 85, 149]
BackgroundColor "black"
ShowName off
Outputs "2"
DisplayOption "bar"
Port {
PortNumber 1
Name "I_lo"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
Port {
PortNumber 2
Name "Q_lo"
RTWStorageClass "Auto"
DataLoggingNameMode "SignalName"
}
}
Block {
BlockType Sum
Name "Sum"
Ports [2, 1]
Position [200, 112, 230, 168]
ShowName off
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^0"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Tx Mix 1"
Ports [2, 1]
Position [135, 27, 165, 58]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^0"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Tx Mix 2"
Ports [2, 1]
Position [135, 207, 165, 238]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
OutDataType "sfix(16)"
OutScaling "2^0"
OutDataTypeStr "Inherit: Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Sin
Name "Tx Quadrature \nSine Wave\nat Fc"
Ports [0, 1]
Position [25, 115, 55, 145]
Amplitude "4.1"
Frequency "(Fc+30.0e6)*2*pi "
Phase "[-pi/2,0]"
SampleTime "0"
}
Block {
BlockType Outport
Name "Out1"
Position [255, 133, 285, 147]
IconDisplay "Port number"
}
Line {
SrcBlock "In2"
SrcPort 1
DstBlock "Tx Mix 2"
DstPort 2
}
Line {
SrcBlock "Sum"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
Line {
SrcBlock "In1"
SrcPort 1
DstBlock "Tx Mix 1"
DstPort 1
}
Line {
SrcBlock "Tx Mix 2"
SrcPort 1
Points [5, 0; 0, -70]
DstBlock "Sum"
DstPort 2
}
Line {
SrcBlock "Tx Mix 1"
SrcPort 1
Points [5, 0; 0, 80]
DstBlock "Sum"
DstPort 1
}
Line {
Name "Q_lo"
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