1.sim.rpt

一个不错的ROM例子

; |ram_32|lpm_mux:ram_initial_rtl_14|mux_jcc:auto_generated|_~13             ; |ram_32|lpm_mux:ram_initial_rtl_14|mux_jcc:auto_generated|_~13             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_14|mux_jcc:auto_generated|_~14             ; |ram_32|lpm_mux:ram_initial_rtl_14|mux_jcc:auto_generated|_~14             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_14|mux_jcc:auto_generated|_~15             ; |ram_32|lpm_mux:ram_initial_rtl_14|mux_jcc:auto_generated|_~15             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_14|mux_jcc:auto_generated|w_result65w~0    ; |ram_32|lpm_mux:ram_initial_rtl_14|mux_jcc:auto_generated|w_result65w~0    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_14|mux_jcc:auto_generated|w_result65w~1    ; |ram_32|lpm_mux:ram_initial_rtl_14|mux_jcc:auto_generated|w_result65w~1    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_14|mux_jcc:auto_generated|w_result65w      ; |ram_32|lpm_mux:ram_initial_rtl_14|mux_jcc:auto_generated|w_result65w      ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|result_node[0]~0 ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|result_node[0]~0 ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~0              ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~0              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|result_node[0]~1 ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|result_node[0]~1 ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|result_node[0]   ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|result_node[0]   ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~2              ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~2              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~3              ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~3              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~4              ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~4              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result36w~1    ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result36w~1    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result36w      ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result36w      ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~6              ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~6              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~7              ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~7              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result37w~1    ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result37w~1    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result37w      ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result37w      ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~9              ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~9              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~11             ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~11             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~12             ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~12             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result44w~1    ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result44w~1    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result44w      ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result44w      ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~13             ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~13             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~15             ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|_~15             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result65w~1    ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result65w~1    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result65w      ; |ram_32|lpm_mux:ram_initial_rtl_13|mux_jcc:auto_generated|w_result65w      ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|result_node[0]~0 ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|result_node[0]~0 ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~0              ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~0              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|result_node[0]~1 ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|result_node[0]~1 ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|result_node[0]   ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|result_node[0]   ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~1              ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~1              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~2              ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~2              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result36w~0    ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result36w~0    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~3              ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~3              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result36w~1    ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result36w~1    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result36w      ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result36w      ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~5              ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~5              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~6              ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~6              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result37w~0    ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result37w~0    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~7              ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~7              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result37w~1    ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result37w~1    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result37w      ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result37w      ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~9              ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~9              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~11             ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~11             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~12             ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~12             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result44w~1    ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result44w~1    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result44w      ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result44w      ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~13             ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~13             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~15             ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~15             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~16             ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|_~16             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result65w~1    ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result65w~1    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result65w      ; |ram_32|lpm_mux:ram_initial_rtl_12|mux_jcc:auto_generated|w_result65w      ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~0              ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~0              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~2              ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~2              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~3              ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~3              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~4              ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~4              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~6              ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~6              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~7              ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~7              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~8              ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~8              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~9              ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~9              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~11             ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~11             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~12             ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~12             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|w_result44w~1    ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|w_result44w~1    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|w_result44w      ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|w_result44w      ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~13             ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~13             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~15             ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~15             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~16             ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|_~16             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|w_result65w~1    ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|w_result65w~1    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|w_result65w      ; |ram_32|lpm_mux:ram_initial_rtl_11|mux_jcc:auto_generated|w_result65w      ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~0              ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~0              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|result_node[0]~1 ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|result_node[0]~1 ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|result_node[0]   ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|result_node[0]   ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~2              ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~2              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~3              ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~3              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~4              ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~4              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|w_result36w~1    ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|w_result36w~1    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|w_result36w      ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|w_result36w      ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~6              ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~6              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~7              ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~7              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~8              ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~8              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~9              ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~9              ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~11             ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~11             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~12             ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~12             ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|w_result44w~1    ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|w_result44w~1    ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|w_result44w      ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|w_result44w      ; out0             ;
; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~13             ; |ram_32|lpm_mux:ram_initial_rtl_10|mux_jcc:auto_generated|_~13             ; out0             ;