int2alaw.asm

DSP芯片TMS320C5416实验程序

; INT2ALAW.ASM
;
; Integer originally loaded into B Accumulator
; (Q12 number is assumed to be sign-extended to 16 bits)
;
; 6 LSB are then striped off and the result is put in A
;
; acode = asgn + achord + astep
;
; achord = (1Fh - T|EXP + B36|NORM)<<4
; = 1F0h - (T|EXP)*16 + (B36|NORM)<<4
;
; asgn = A8<<7
;
; astep = |int| << (T|EXP) - (B36|NORM)<< 4
; step is located in guard bits of B (B32-39)
;
; acode = A8<<7 + 1F0h - (T|EXP)*16 + (B36|NORM)<<4
; + |int|<<(T|EXP) - (B36|NORM)<< 4
; = A8<<7 + 1F0h - (T|EXP)*16 + |int|<<(T|EXP)
;
; Before transmission the even bits starting from bit0 are inverted
;
; acode* = acode XOR %01010101
;
; Final output is stored in low accumulator A(0-7)
		.def CodeEntry
		.mmregs

		.data
		
MASK 	.word 80h
BIAS 	.word 1F0h
SHFT 	.word 10h
INVT 	.word 055h
CONST 	.word 1Fh
TABLE 	.word -2460,-1505,-650,-338,-90,-1,40,102,169,420,499,980
		;0ah,0b2h,81h,90h,0f3h,0d5h,42h,65h,6ch,19h,05h,0a6h

		;TEST VALUES
RESULT	.word 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
		
		.text
CodeEntry 	
		SSBX    SXM
		STM 	#TABLE, AR0
		STM 	#RESULT, AR1
		
		LD 		#MASK, DP
cbeg 	LD 		*AR0+, B 			;LOAD INTEGER FOR CONVERSION
		SFTA 	B, -6, A 			;STRIP OFF 6 LSBs: A = B>>6
		EXP 	A 					;# LEADING ZEROS -> (T|EXP) =(25..31)
		ABS 	B 					;B = |int|
		XC 		1,AEQ 				;If number is between 0 and 63
		LD 		CONST,T 			;load 1F into T(EXP of zero yields NO sign bits)
		NORM 	B 					;B = |int| << T|EXP
		AND 	MASK, A 			;A = asgn
		ADD 	BIAS, A 			;A = asgn + 1F0h
		MAS 	SHFT, A 			;A -= (T|EXP)*16
		ADD 	BG, A 				;A += |int| << T|EXP
		XOR 	INVT, A 			;INVERT FOR XMISSION: A =(A XOR 55h)

		STL     A, *AR1+		
		
		B 		cbeg 				;DO IT AGAIN!