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pcb设计资料初学者难得的入门资料包含工厂制作过程

A combination of computer hardware and software that serves as a <br>
general-purpose computing platform. For example, a personal computer. Contra <br>
st <br>
with embedded system. <br>
H <br>
HLL <br>
See high-level language. <br>
heap <br>
An area of memory that is used for dynamic memory allocation. Calls to mallo <br>
c and <br>
free and the C++ operators new and delete result in run-time manipulation of <br>
 the <br>
heap. <br>
high-level language <br>
A language, such as C or C++, that is processor-independent. When programmin <br>
g in <br>
a high-level language, it is possible to concentrate on algorithms and appli <br>
cations <br>
cations <br>
without worrying about the details of a particular processor. <br>
host <br>
A general-purpose computer that communicates with the target via a serial po <br>
rt or <br>
network connection. This term is usually used to distinguish the computer on <br>
 which <br>
the debugger is running from the embedded system that is being developed. <br>
I <br>
ICE <br>
In-Circuit Emulator. See emulator. <br>
I/O <br>
Input/Output. The interface between a processor and the world around it. The <br>
  <br>
simplest examples are switches (inputs) and LEDs (outputs). <br>
I/O device <br>
A piece of hardware that interfaces between the processor and the outside wo <br>
rld. <br>
Common examples are switches and LEDs, serial ports, and network controllers <br>
. <br>
I/O map <br>
A table or diagram containing the name and address range of each peripheral <br>
addressable by the processor within the I/O space. I/O maps are a helpful ai <br>

d in <br>
getting to know the target. <br>
I/O space <br>
A special memory region provided by some processors and generally reserved f <br>
or <br>
the attachment of I/O devices. Memory locations and registers within an I/O <br>
space can be accessed only via special instructions. For example, processors <br>
 in the <br>
80x86 family have special I/O space instructions called in and out. Contrast <br>
 with <br>
memory space. <br>
ISR <br>
See interrupt service routine. <br>
instruction pointer <br>
A register in the processor that contains the address of the next instructio <br>
n to <br>
be executed. Also known as a program counter. <br>
interrupt <br>
An asynchronous electrical signal from a peripheral to the processor. When t <br>
he <br>
peripheral asserts this signal, we say that an interrupt occurs. When an int <br>
errupt <br>
errupt <br>
occurs, the current state of the processor is saved and an interrupt service <br>
  <br>
routine is executed. When the interrupt service routine exits, control of th <br>
e <br>
processor is returned to whatever part of the software was previously runnin <br>
g. <br>
interrupt latency <br>
The amount of time between the assertion of an interrupt and the start of th <br>
e <br>
associated interrupt service routine. <br>
interrupt service routine <br>
A piece of software executed in response to a particular interrupt. <br>
interrupt type <br>
A unique number associated with each interrupt. <br>
interrupt vector <br>
The address of an interrupt service routine. <br>
interrupt vector table <br>
A table containing interrupt vectors and indexed by interrupt type. This tab <br>
le <br>
contains the processor's mapping between interrupts and interrupt service <br>
routines and must be initialized by the programmer. <br>
intertask communication <br>

A mechanism used by tasks and interrupt service routines to share informatio <br>
n <br>
and synchronize their access to shared resources. The most common building <br>
blocks of intertask communication are semaphores and mutexes. <br>
K <br>
kernel <br>
An essential part of any multitasking operating system, the kernel contains <br>
just <br>
the scheduler and context-switch routine. <br>
L <br>
linker <br>
A software development tool that accepts one or more object files as input a <br>
nd <br>
outputs a relocatable program. The linker is thus run after all of the sourc <br>
e files <br>
have been compiled or assembled. <br>
locator <br>
A software development tool that assigns physical addresses to the relocatab <br>
le <br>
program produced by the linker. This is the last step in the preparation of <br>
software for execution by an embedded system and the resulting file is calle <br>
d an <br>
d an <br>
executable. In some cases, the locator's function may be hidden within the l <br>
inker. <br>
logic analyzer <br>
A hardware debugging tool that can be used to capture the logic levels (0 or <br>
 1) of <br>
dozens, or even hundreds, of electrical signals in real-time. Logic analyzer <br>
s can be <br>
quite helpful for debugging hardware problems and complex processor-peripher <br>
al <br>
interactions. <br>
M <br>
memory map <br>
A table or diagram containing the name and address range of each peripheral <br>
addressable by the processor within the memory space. Memory maps are a help <br>
ful <br>
aid in getting to know the target. <br>
memory-mapped I/O <br>
An increasingly common hardware design methodology in which I/O devices are <br>
placed into the memory space rather than the I/O space. From the processor's <br>
  <br>
point of view, memory-mapped I/O devices look very much like memory devices. <br>
  <br>
  <br>
memory space <br>
A processor's standard address space. Contrast with I/O space. <br>
microcontroller <br>
A microcontroller is very similar to a microprocessor. The main difference i <br>
s that <br>
a microcontroller is designed specifically for use in embedded systems. <br>
Microcontrollers typically include a CPU, memory (a small amount of RAM and/ <br>
or <br>
ROM), and other peripherals on the same chip. Common examples are the 8051, <br>
Intel's 80196, and Motorola's 68HCxx series. <br>
microprocessor <br>
A piece of silicon containing a general-purpose CPU. The most common example <br>
s <br>
are Intel's 80x86 and Motorola's 680x0 families. <br>
monitor <br>
In the context of this book, a debug monitor. However, there is a second mea <br>
ning <br>
for this word that is associated with intertask communication. In that conte <br>
xt, a <br>
monitor is a language-level synchronization feature. <br>
multiprocessing <br>
The use of more than one processor in a single computer system. So-called <br>

"multiprocessor systems" usually have a common memory space through which th <br>
e <br>
processors can communicate and share data. In addition, some multiprocessor <br>
systems support parallel processing. <br>
multitasking <br>
The execution of multiple software routines in pseudo-parallel. Each routine <br>
  <br>
represents a separate "thread of execution" and is referred to as a task. Th <br>
e <br>
operating system is responsible for simulating parallelism by parceling out <br>
the <br>
processor's time. <br>
mutex <br>
A data structure for mutual exclusion, also known as a binary semaphore. A m <br>
utex <br>
is basically just a multitasking-aware binary flag that can be used to synch <br>
ronize <br>
the activities of multiple tasks. As such, it can be used to protect critica <br>
l sections <br>
of the code from interruption and shared resources from simultaneous use. <br>
mutual exclusion <br>
A guarantee of exclusive access to a shared resource. In embedded systems, t <br>

he <br>
shared resource is typically a block of memory, a global variable, or a set <br>
of <br>
registers. Mutual exclusion can be achieved with the use of a semaphore or m <br>
utex. <br>
N <br>
NVRAM <br>
Non-Volatile Random-Access Memory. A type of RAM that retains its data even <br>
when the system is powered down. NVRAM frequently consists of an SRAM and a <br>
long-life battery. <br>
O <br>
OTP <br>
See one-time programmable. <br>
object code <br>
A set of processor-readable opcodes and data. The output of compilers, <br>
assemblers, linkers, and locators are files containing object code. <br>
object file <br>
A file containing object code. The output of a compiler or assembler. <br>
one-time programmable <br>
Any programmable device, like a PROM, that can be programmed just once by th <br>
e <br>
end user. However, this term is used almost exclusively to refer to <br>

microcontrollers with on-chip PROM. <br>
opcode <br>
A sequence of bits that is recognized by the processor as one of the instruc <br>
tions <br>
in its instruction set. <br>
operating system <br>
A piece of software that makes multitasking possible. An operating system <br>
typically consists of a set of function calls, or software interrupts, and a <br>
 periodic <br>
clock tick. The operating system is responsible for deciding which task shou <br>
ld be <br>
using the processor at a given time and for controlling access to shared res <br>
ources. <br>
oscilloscope <br>
A hardware debugging tool that allows you to view the voltage on one or more <br>
  <br>
electrical lines. For example, you might use an oscilloscope to determine if <br>
 a <br>
particular interrupt is currently asserted. <br>
P <br>
PROM <br>
Programmable Read-Only Memory. A type of ROM that can be written <br>

(programmed) with a device programmer. These memory devices can be <br>
programmed only once, so they are sometimes referred to as write-once or <br>
one-time programmable devices. <br>
parallel processing <br>
The ability to apply two or more processors to a single computation. <br>
peripheral <br>
A piece of hardware other than the processor, usually memory or an I/O devic <br>
e. <br>
The peripheral may reside within the same chip as the processor, in which ca <br>
se it <br>
is called an internal peripheral. <br>
physical address <br>
The actual address that is placed on the address bus when accessing a memory <br>
  <br>
location or register. <br>
preemptive <br>
A scheduler is said to be preemptive if it allows the running task to be sus <br>
pended <br>
when a higher-priority task becomes ready. Non-preemptive schedulers are eas <br>
ier <br>
to implement but less appropriate for embedded systems. <br>
polling <br>
polling <br>