or51132.c

V4l driver for DVB HD

	case QAM_64:
	case QAM_256:
		return MOD_FWCLASS_QAM;
	default:
		return MOD_FWCLASS_UNKNOWN;
	}
}

static int or51132_set_parameters(struct dvb_frontend* fe,
				  struct dvb_frontend_parameters *param)
{
	int ret;
	u8 buf[4];
	struct or51132_state* state = fe->demodulator_priv;
	const struct firmware *fw;
	const char *fwname;
	int clock_mode;

	/* Upload new firmware only if we need a different one */
	if (modulation_fw_class(state->current_modulation) !=
	    modulation_fw_class(param->u.vsb.modulation)) {
		switch(modulation_fw_class(param->u.vsb.modulation)) {
		case MOD_FWCLASS_VSB:
			dprintk("set_parameters VSB MODE\n");
			fwname = OR51132_VSB_FIRMWARE;

			/* Set non-punctured clock for VSB */
			clock_mode = 0;
			break;
		case MOD_FWCLASS_QAM:
			dprintk("set_parameters QAM MODE\n");
			fwname = OR51132_QAM_FIRMWARE;

			/* Set punctured clock for QAM */
			clock_mode = 1;
			break;
		default:
			printk("or51132: Modulation type(%d) UNSUPPORTED\n",
			       param->u.vsb.modulation);
			return -1;
		}
		printk("or51132: Waiting for firmware upload(%s)...\n",
		       fwname);
		ret = request_firmware(&fw, fwname, &state->i2c->dev);
		if (ret) {
			printk(KERN_WARNING "or51132: No firmware up"
			       "loaded(timeout or file not found?)\n");
			return ret;
		}
		ret = or51132_load_firmware(fe, fw);
		release_firmware(fw);
		if (ret) {
			printk(KERN_WARNING "or51132: Writing firmware to "
			       "device failed!\n");
			return ret;
		}
		printk("or51132: Firmware upload complete.\n");
		state->config->set_ts_params(fe, clock_mode);
	}
	/* Change only if we are actually changing the modulation */
	if (state->current_modulation != param->u.vsb.modulation) {
		state->current_modulation = param->u.vsb.modulation;
		or51132_setmode(fe);
	}

	dvb_pll_configure(state->config->pll_desc, buf,
			  param->frequency, 0);
	dprintk("set_parameters tuner bytes: 0x%02x 0x%02x "
		"0x%02x 0x%02x\n",buf[0],buf[1],buf[2],buf[3]);
	if (i2c_writebytes(state, state->config->pll_address, buf, 4))
		printk(KERN_WARNING "or51132: set_parameters error "
		       "writing to tuner\n");

	/* Set to current mode */
	or51132_setmode(fe);

	/* Update current frequency */
	state->current_frequency = param->frequency;
	return 0;
}

static int or51132_get_parameters(struct dvb_frontend* fe,
				  struct dvb_frontend_parameters *param)
{
	struct or51132_state* state = fe->demodulator_priv;
	u8 buf[2];

	/* Receiver Status */
	buf[0]=0x04;
	buf[1]=0x00;
	msleep(30); /* 30ms */
	if (i2c_writebytes(state,state->config->demod_address,buf,2)) {
		printk(KERN_WARNING "or51132: get_parameters write error\n");
		return -EREMOTEIO;
	}
	msleep(30); /* 30ms */
	if (i2c_readbytes(state,state->config->demod_address,buf,2)) {
		printk(KERN_WARNING "or51132: get_parameters read error\n");
		return -EREMOTEIO;
	}
	switch(buf[0]) {
		case 0x06: param->u.vsb.modulation = VSB_8; break;
		case 0x43: param->u.vsb.modulation = QAM_64; break;
		case 0x45: param->u.vsb.modulation = QAM_256; break;
		default:
			printk(KERN_WARNING "or51132: unknown status 0x%02x\n",
			       buf[0]);
			return -EREMOTEIO;
	}

	/* FIXME: Read frequency from frontend, take AFC into account */
	param->frequency = state->current_frequency;

	/* FIXME: How to read inversion setting? Receiver 6 register? */
	param->inversion = INVERSION_AUTO;

	return 0;
}

static int or51132_read_status(struct dvb_frontend* fe, fe_status_t* status)
{
	struct or51132_state* state = fe->demodulator_priv;
	unsigned char rec_buf[2];
	unsigned char snd_buf[2];
	*status = 0;

	/* Receiver Status */
	snd_buf[0]=0x04;
	snd_buf[1]=0x00;
	msleep(30); /* 30ms */
	if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
		printk(KERN_WARNING "or51132: read_status write error\n");
		return -1;
	}
	msleep(30); /* 30ms */
	if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
		printk(KERN_WARNING "or51132: read_status read error\n");
		return -1;
	}
	dprintk("read_status %x %x\n",rec_buf[0],rec_buf[1]);

	if (rec_buf[1] & 0x01) { /* Receiver Lock */
		*status |= FE_HAS_SIGNAL;
		*status |= FE_HAS_CARRIER;
		*status |= FE_HAS_VITERBI;
		*status |= FE_HAS_SYNC;
		*status |= FE_HAS_LOCK;
	}
	return 0;
}

static int or51132_read_signal_strength(struct dvb_frontend* fe, u16* strength)
{
	struct or51132_state* state = fe->demodulator_priv;
	unsigned char rec_buf[2];
	unsigned char snd_buf[2];
	u8 rcvr_stat;
	u16 snr_equ;
	u32 signal_strength;
	int usK;

	snd_buf[0]=0x04;
	snd_buf[1]=0x02; /* SNR after Equalizer */
	msleep(30); /* 30ms */
	if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
		printk(KERN_WARNING "or51132: read_status write error\n");
		return -1;
	}
	msleep(30); /* 30ms */
	if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
		printk(KERN_WARNING "or51132: read_status read error\n");
		return -1;
	}
	snr_equ = rec_buf[0] | (rec_buf[1] << 8);
	dprintk("read_signal_strength snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);

	/* Receiver Status */
	snd_buf[0]=0x04;
	snd_buf[1]=0x00;
	msleep(30); /* 30ms */
	if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
		printk(KERN_WARNING "or51132: read_signal_strength read_status write error\n");
		return -1;
	}
	msleep(30); /* 30ms */
	if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
		printk(KERN_WARNING "or51132: read_signal_strength read_status read error\n");
		return -1;
	}
	dprintk("read_signal_strength read_status %x %x\n",rec_buf[0],rec_buf[1]);
	rcvr_stat = rec_buf[1];
	usK = (rcvr_stat & 0x10) ? 3 : 0;

	/* The value reported back from the frontend will be FFFF=100% 0000=0% */
	signal_strength = (((8952 - i20Log10(snr_equ) - usK*100)/3+5)*65535)/1000;
	if (signal_strength > 0xffff)
		*strength = 0xffff;
	else
		*strength = signal_strength;
	dprintk("read_signal_strength %i\n",*strength);

	return 0;
}

static int or51132_read_snr(struct dvb_frontend* fe, u16* snr)
{
	struct or51132_state* state = fe->demodulator_priv;
	unsigned char rec_buf[2];
	unsigned char snd_buf[2];
	u16 snr_equ;

	snd_buf[0]=0x04;
	snd_buf[1]=0x02; /* SNR after Equalizer */
	msleep(30); /* 30ms */
	if (i2c_writebytes(state,state->config->demod_address,snd_buf,2)) {
		printk(KERN_WARNING "or51132: read_snr write error\n");
		return -1;
	}
	msleep(30); /* 30ms */
	if (i2c_readbytes(state,state->config->demod_address,rec_buf,2)) {
		printk(KERN_WARNING "or51132: read_snr dvr read error\n");
		return -1;
	}
	snr_equ = rec_buf[0] | (rec_buf[1] << 8);
	dprintk("read_snr snr_equ %x %x (%i)\n",rec_buf[0],rec_buf[1],snr_equ);

	*snr = 0xFFFF - snr_equ;
	dprintk("read_snr %i\n",*snr);

	return 0;
}

static int or51132_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
{
	fe_tune_settings->min_delay_ms = 500;
	fe_tune_settings->step_size = 0;
	fe_tune_settings->max_drift = 0;

	return 0;
}

static void or51132_release(struct dvb_frontend* fe)
{
	struct or51132_state* state = fe->demodulator_priv;
	kfree(state);
}

static struct dvb_frontend_ops or51132_ops;

struct dvb_frontend* or51132_attach(const struct or51132_config* config,
				    struct i2c_adapter* i2c)
{
	struct or51132_state* state = NULL;

	/* Allocate memory for the internal state */
	state = kmalloc(sizeof(struct or51132_state), GFP_KERNEL);
	if (state == NULL)
		goto error;

	/* Setup the state */
	state->config = config;
	state->i2c = i2c;
	memcpy(&state->ops, &or51132_ops, sizeof(struct dvb_frontend_ops));
	state->current_frequency = -1;
	state->current_modulation = -1;

	/* Create dvb_frontend */
	state->frontend.ops = &state->ops;
	state->frontend.demodulator_priv = state;
	return &state->frontend;

error:
	kfree(state);
	return NULL;
}

static struct dvb_frontend_ops or51132_ops = {

	.info = {
		.name			= "Oren OR51132 VSB/QAM Frontend",
		.type 			= FE_ATSC,
		.frequency_min		= 44000000,
		.frequency_max		= 958000000,
		.frequency_stepsize	= 166666,
		.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
			FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
			FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_QAM_AUTO |
			FE_CAN_8VSB
	},

	.release = or51132_release,

	.init = or51132_init,
	.sleep = or51132_sleep,

	.set_frontend = or51132_set_parameters,
	.get_frontend = or51132_get_parameters,
	.get_tune_settings = or51132_get_tune_settings,

	.read_status = or51132_read_status,
	.read_ber = or51132_read_ber,
	.read_signal_strength = or51132_read_signal_strength,
	.read_snr = or51132_read_snr,
	.read_ucblocks = or51132_read_ucblocks,
};

module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");

MODULE_DESCRIPTION("OR51132 ATSC [pcHDTV HD-3000] (8VSB & ITU J83 AnnexB FEC QAM64/256) Demodulator Driver");
MODULE_AUTHOR("Kirk Lapray");
MODULE_LICENSE("GPL");

EXPORT_SYMBOL(or51132_attach);

/*
 * Local variables:
 * c-basic-offset: 8
 * End:
 */