📄 f3xx_usb0_interruptserviceroutine.lst
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213 1 { // ended prematurely then set
214 2 POLL_WRITE_BYTE (E0CSR, rbDATAEND);
215 2 // Serviced SETUP End bit and return EP0
216 2 POLL_WRITE_BYTE (E0CSR, rbSSUEND);
217 2 EP_STATUS[0] = EP_IDLE; // to idle state
218 2 }
219 1
220 1 if (EP_STATUS[0] == EP_IDLE) // If Endpoint 0 is in idle mode
221 1 {
222 2 if (ControlReg & rbOPRDY) // Make sure that EP 0 has an Out Packet
223 2 { // ready from host although if EP0
224 3 // is idle, this should always be the
225 3 // case
226 3 Fifo_Read (FIFO_EP0, 8, (unsigned char *)&SETUP);
227 3 // Get SETUP Packet off of Fifo,
228 3 // it is currently Big-Endian
229 3
230 3 // Compiler Specific - these next three
231 3 // statements swap the bytes of the
232 3 // SETUP packet words to Big Endian so
233 3 // they can be compared to other 16-bit
234 3 // values elsewhere properly
235 3 SETUP.wValue.i = SETUP.wValue.c[MSB] + 256*SETUP.wValue.c[LSB];
236 3 SETUP.wIndex.i = SETUP.wIndex.c[MSB] + 256*SETUP.wIndex.c[LSB];
237 3 SETUP.wLength.i = SETUP.wLength.c[MSB] + 256*SETUP.wLength.c[LSB];
238 3
239 3 // Intercept HID class-specific requests
240 3 if( (SETUP.bmRequestType & ~0x80) == DSC_HID) {
241 4 switch (SETUP.bRequest) {
C51 COMPILER V8.05a F3XX_USB0_INTERRUPTSERVICEROUTINE 10/16/2008 16:50:25 PAGE 5
242 5 case GET_REPORT:
243 5 Get_Report ();
244 5 break;
245 5 case SET_REPORT:
246 5 Set_Report ();
247 5 break;
248 5 case GET_IDLE:
249 5 Get_Idle ();
250 5 break;
251 5 case SET_IDLE:
252 5 Set_Idle ();
253 5 break;
254 5 case GET_PROTOCOL:
255 5 Get_Protocol ();
256 5 break;
257 5 case SET_PROTOCOL:
258 5 Set_Protocol ();
259 5 break;
260 5 default:
261 5 Force_Stall (); // Send stall to host if invalid
262 5 break; // request
263 5 }
264 4 } else
265 3
266 3 switch (SETUP.bRequest) // Call correct subroutine to handle
267 3 { // each kind of standard request
268 4 case GET_STATUS:
269 4 Get_Status ();
270 4 break;
271 4 case CLEAR_FEATURE:
272 4 Clear_Feature ();
273 4 break;
274 4 case SET_FEATURE:
275 4 Set_Feature ();
276 4 break;
277 4 case SET_ADDRESS:
278 4 Set_Address ();
279 4 break;
280 4 case GET_DESCRIPTOR:
281 4 Get_Descriptor ();
282 4 break;
283 4 case GET_CONFIGURATION:
284 4 Get_Configuration ();
285 4 break;
286 4 case SET_CONFIGURATION:
287 4 Set_Configuration ();
288 4 break;
289 4 case GET_INTERFACE:
290 4 Get_Interface ();
291 4 break;
292 4 case SET_INTERFACE:
293 4 Set_Interface ();
294 4 break;
295 4 default:
296 4 Force_Stall (); // Send stall to host if invalid request
297 4 break;
298 4 }
299 3 }
300 2 }
301 1
302 1 if (EP_STATUS[0] == EP_TX) // See if endpoint should transmit
303 1 {
C51 COMPILER V8.05a F3XX_USB0_INTERRUPTSERVICEROUTINE 10/16/2008 16:50:25 PAGE 6
304 2 if (!(ControlReg & rbINPRDY) ) // Don't overwrite last packet
305 2 {
306 3 // Read control register
307 3 POLL_READ_BYTE (E0CSR, ControlReg);
308 3
309 3 // Check to see if SETUP End or Out Packet received, if so do not put
310 3 // any new data on FIFO
311 3 if ((!(ControlReg & rbSUEND)) || (!(ControlReg & rbOPRDY)))
312 3 {
313 4 // Add In Packet ready flag to E0CSR bitmask
314 4 ControlReg = rbINPRDY;
315 4 if (DATASIZE >= EP0_PACKET_SIZE)
316 4 {
317 5 // Break Data into multiple packets if larger than Max Packet
318 5 Fifo_Write_InterruptServiceRoutine (FIFO_EP0, EP0_PACKET_SIZE,
319 5 (unsigned char*)DATAPTR);
320 5 // Advance data pointer
321 5 DATAPTR += EP0_PACKET_SIZE;
322 5 // Decrement data size
323 5 DATASIZE -= EP0_PACKET_SIZE;
324 5 // Increment data sent counter
325 5 DATASENT += EP0_PACKET_SIZE;
326 5 }
327 4 else
328 4 {
329 5 // If data is less than Max Packet size or zero
330 5 Fifo_Write_InterruptServiceRoutine (FIFO_EP0, DATASIZE,
331 5 (unsigned char*)DATAPTR);
332 5 ControlReg |= rbDATAEND;// Add Data End bit to bitmask
333 5 EP_STATUS[0] = EP_IDLE; // Return EP 0 to idle state
334 5 }
335 4 if (DATASENT == SETUP.wLength.i)
336 4 {
337 5 // This case exists when the host requests an even multiple of
338 5 // your endpoint zero max packet size, and you need to exit
339 5 // transmit mode without sending a zero length packet
340 5 ControlReg |= rbDATAEND;// Add Data End bit to mask
341 5 EP_STATUS[0] = EP_IDLE; // Return EP 0 to idle state
342 5 }
343 4 // Write mask to E0CSR
344 4 POLL_WRITE_BYTE(E0CSR, ControlReg);
345 4 }
346 3 }
347 2 }
348 1
349 1 if (EP_STATUS[0] == EP_RX) // See if endpoint should transmit
350 1 {
351 2 // Read control register
352 2 POLL_READ_BYTE (E0CSR, ControlReg);
353 2 if (ControlReg & rbOPRDY) // Verify packet was received
354 2 {
355 3 ControlReg = rbSOPRDY;
356 3 if (DATASIZE >= EP0_PACKET_SIZE)
357 3 {
358 4 Fifo_Read(FIFO_EP0, EP0_PACKET_SIZE, (unsigned char*)DATAPTR);
359 4 // Advance data pointer
360 4 DATAPTR += EP0_PACKET_SIZE;
361 4 // Decrement data size
362 4 DATASIZE -= EP0_PACKET_SIZE;
363 4 // Increment data sent counter
364 4 DATASENT += EP0_PACKET_SIZE;
365 4 }
C51 COMPILER V8.05a F3XX_USB0_INTERRUPTSERVICEROUTINE 10/16/2008 16:50:25 PAGE 7
366 3 else
367 3 {
368 4 // read bytes from FIFO
369 4 Fifo_Read (FIFO_EP0, DATASIZE, (unsigned char*) DATAPTR);
370 4
371 4 ControlReg |= rbDATAEND; // signal end of data
372 4 EP_STATUS[0] = EP_IDLE; // set Endpoint to IDLE
373 4 }
374 3 if (DATASENT == SETUP.wLength.i)
375 3 {
376 4 ControlReg |= rbDATAEND;
377 4 EP_STATUS[0] = EP_IDLE;
378 4 }
379 3 // if EP_RX mode was entered through a SET_REPORT request,
380 3 // call the ReportHandler_OUT function and pass the Report
381 3 // ID, which is the first by the of DATAPTR's buffer
382 3 if ( (EP_STATUS[0] == EP_IDLE) && (SETUP.bRequest == SET_REPORT) )
383 3 {
384 4 ReportHandler_OUT (*DATAPTR);
385 4 }
386 3
387 3 if (EP_STATUS[0] != EP_STALL) POLL_WRITE_BYTE (E0CSR, ControlReg);
388 3 }
389 2 }
390 1
391 1 }
392
393 //-----------------------------------------------------------------------------
394 // Handle_In1
395 //-----------------------------------------------------------------------------
396 //
397 // Handler will be entered after the endpoint's buffer has been
398 // transmitted to the host. In1_StateMachine is set to Idle, which
399 // signals the foreground routine SendPacket that the Endpoint
400 // is ready to transmit another packet.
401 //-----------------------------------------------------------------------------
402 void Handle_In1 ()
403 {
404 1 EP_STATUS[1] = EP_IDLE;
405 1 }
406
407 //-----------------------------------------------------------------------------
408 // Handle_Out1
409 //-----------------------------------------------------------------------------
410 // Take the received packet from the host off the fifo and put it into
411 // the Out_Packet array.
412 //
413 //-----------------------------------------------------------------------------
414 void Handle_Out1 ()
415 {
416 1
417 1 unsigned char Count = 0;
418 1 unsigned char ControlReg;
419 1
420 1 POLL_WRITE_BYTE (INDEX, 1); // Set index to endpoint 2 registers
421 1 POLL_READ_BYTE (EOUTCSR1, ControlReg);
422 1
423 1 if (EP_STATUS[1] == EP_HALT) // If endpoint is halted, send a stall
424 1 {
425 2 POLL_WRITE_BYTE (EOUTCSR1, rbOutSDSTL);
426 2 }
427 1
C51 COMPILER V8.05a F3XX_USB0_INTERRUPTSERVICEROUTINE 10/16/2008 16:50:25 PAGE 8
428 1 else // Otherwise read received packet
429 1 // from host
430 1 {
431 2 if (ControlReg & rbOutSTSTL) // Clear sent stall bit if last
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