process_dsplink_linux_linkcfg.c.orig

Introduce how to Change the DVEVM6446 Memory Map

/* --COPYRIGHT--
 *  Copyright $(CPYYEAR)
 *  $(COMPANY_NAME)
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 * --/COPYRIGHT--
 */
/*
 *  ======== Process_dsplink_linux_linkcfg.c ========
 *
 *  This is how we configure link: 
 *
 *  Link 1.40 lets the user take the generated CFG_Davinci.c file, modify
 *  link params, change the name of the global link config object, include
 *  the modified source file in the user's build, and call Proc_setup() with 
 *  the address of the global link config object.
 *
 *  In CE, we insulate the user from this step, by including the CFG_Davinci.c 
 *  file un the OSAL build with DSPLink settings appropriate for CE.
 *  The user only provides the DSP memory map, which CE uses to modify the 
 *  link config structure at runtime, immediately before calling Proc_setup(). 
 *
 *  However if the user wants to change more than just the memory map,
 *  he can take this source file and add it to its build, making some changes
 *  in his .cfg as well.
 *
 *  What follows is the original contents of dsplink\config\all\CFG_Davinci.c
 *  file. We only rename the global Link Config object from LINKCFG_config
 *  to LINKCFG_ceConfig, and make all objects non-constant, so that we can
 *  modify them as necessary in Process_create() before calling Proc_setup.
 *  Lines of code we added to the original CFG_Davinic.c file are tagged with 
 *  [CE]. To update this file, pick a different CFG_Davinci.c and insert
 *  the tagged lines after #includes.
 */
 
/* ----------- original CFG_Davinci.c, possibly adapted for CE: -------------- */ 
 
/** ============================================================================
 *  @file   CFG_Davinci.c
 *
 *  @path   $(DSPLINK)/config/all/
 *
 *  @desc   Defines the configuration information for DSP/BIOS LINK for the
 *          Davinci platform.
 *
 *  @ver    01.40.03.02
 *  ============================================================================
 *  Copyright (c) Texas Instruments Incorporated 2002-2006
 *
 *  Use of this software is controlled by the terms and conditions found in the
 *  license agreement under which this software has been supplied or provided.
 *  ============================================================================
 */


/*  ----------------------------------- DSP/BIOS LINK Headers       */
#include <dsplink.h>
#include <procdefs.h>

#define LINKCFG_config ti_sdo_ce_osal_Process_linkcfg   /* [CE] */
#undef  CONST                                           /* [CE] */
#define CONST                                           /* [CE] */

#if defined (__cplusplus)
EXTERN "C" {
#endif /* defined (__cplusplus) */


/** ============================================================================
 *  @name   LINKCFG_gppObject
 *
 *  @desc   Configuration object for the GPP.
 *  ============================================================================
 */
STATIC CONST LINKCFG_Gpp  LINKCFG_gppObject = {
    "ARM9",                    /* NAME           : Name of the GPP */
    16,                        /* MAXMSGQS       : Maximum MSGQs that can be opened */
    16,                        /* MAXCHNLQUEUE   : Maximum Queue Length for all channels */
    (Uint32) -1,               /* POOLTABLEID    : ID of the POOL table (-1 if not needed) */
    0,                         /* NUMPOOLS       : Number of POOLs supported */
    3,                         /* PROBERTCID     : Real Time Clock ID for PROBE */
    33                         /* PROBEINTID     : Interrupt ID for PROBE */
} ;

/** ============================================================================
 *  @name   LINKCFG_dspObjects
 *
 *  @desc   Array of configuration objects for the DSPs in the system.
 *  ============================================================================
 */
STATIC CONST LINKCFG_Dsp  LINKCFG_dspObjects [] =
{
    {
        "Gem",                 /* NAME           : Name of the DSP */
        DspArch_C64x,          /* ARCHITECTURE   : DSP architecture */
        "COFF",                /* LOADERNAME     : Name of the DSP executable loader */
        FALSE,                 /* AUTOSTART      : Autostart the DSP (Not supported) */
        "DEFAULT.OUT",         /* EXECUTABLE     : Executable for autostart */
        FALSE,                 /* DOPOWERCTRL    : Link does the Power Ctrl of DSP. */
        0x8FF00020,            /* RESUMEADDR     : Resume address */
        0x8FF00000,            /* RESETVECTOR    : Reset Vector for the DSP */
        0x80,                  /* RESETCODESIZE  : Size of code at DSP Reset Vector */
        1,                     /* MADUSIZE       : DSP Minimum Addressable Data Unit */
        Endianism_Little,      /* ENDIAN         : DSP Endianism */
        FALSE,                 /* WORDSWAP       : Words must be swapped when writing to memory */
        0,                     /* MEMTABLEID     : ID of the memory table used */
        6,                     /* MEMENTRIES     : Number of entries in memory table */
        0                      /* LINKDRVID      : ID of the link driver used */
    }
} ;

/** ============================================================================
 *  @name   LINKCFG_memTable_00
 *
 *  @desc   Memory table ID 0.
 *  ============================================================================
 */
STATIC CONST LINKCFG_MemEntry  LINKCFG_memTable_00 [] =
{
    {
        0,                     /* ENTRY          : Entry number */
        "DSPLINKMEM",          /* NAME           : Name of the memory region */
        0x8FE00000,            /* ADDRPHYS       : Physical address */
        0x8FE00000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x5000,                /* SIZE           : Size of the memory region */
        TRUE                   /* SHARED         : Shared access memory? */
    },
    {
        1,                     /* ENTRY          : Entry number */
        "DSPLINKMEM1",         /* NAME           : Name of the memory region */
        0x8FE05000,            /* ADDRPHYS       : Physical address */
        0x8FE05000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0xFB000,               /* SIZE           : Size of the memory region */
        TRUE                   /* SHARED         : Shared access memory? */
    },
    {
        2,                     /* ENTRY          : Entry number */
        "RESETCTRL",           /* NAME           : Name of the memory region */
        0x8FF00000,            /* ADDRPHYS       : Physical address */
        0x8FF00000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x00000080,            /* SIZE           : Size of the memory region */
        FALSE                  /* SHARED         : Shared access memory? */
    },
    {
        3,                     /* ENTRY          : Entry number */
        "DDR2",                /* NAME           : Name of the memory region */
        0x8FF00080,            /* ADDRPHYS       : Physical address */
        0x8FF00080,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0xFFF80,               /* SIZE           : Size of the memory region */
        FALSE                  /* SHARED         : Shared access memory? */
    },
    {
        4,                     /* ENTRY          : Entry number */
        "DSPIRAM",             /* NAME           : Name of the memory region */
        0x11800000,            /* ADDRPHYS       : Physical address */
        0x11800000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0x10000,               /* SIZE           : Size of the memory region */
        FALSE                  /* SHARED         : Shared access memory? */
    },
    {
        5,                     /* ENTRY          : Entry number */
        "DSPL1DRAM",           /* NAME           : Name of the memory region */
        0x11F04000,            /* ADDRPHYS       : Physical address */
        0x11F04000,            /* ADDRDSPVIRT    : DSP virtual address */
        (Uint32) -1,           /* ADDRGPPVIRT    : GPP virtual address (if known) */
        0xC000,                /* SIZE           : Size of the memory region */
        FALSE                  /* SHARED         : Shared access memory? */
    }
} ;

/** ============================================================================
 *  @name   LINKCFG_memTables
 *
 *  @desc   Array of memory tables in the system.
 *  ============================================================================
 */
STATIC CONST LINKCFG_MemEntry * LINKCFG_memTables [] =
{
    LINKCFG_memTable_00        /* Memory Table 0 */
} ;

/** ============================================================================
 *  @name   LINKCFG_linkDrvObjects
 *
 *  @desc   Array of Link driver objects in the system.
 *  ============================================================================
 */
STATIC CONST LINKCFG_LinkDrv  LINKCFG_linkDrvObjects [] =
{
    {
        "SHMDRV",              /* NAME           : Name of the link driver */
        (Uint32) 100000000,    /* HSHKPOLLCOUNT  : Poll value for which handshake waits (-1 if infinite) */
        (Uint32) 1,            /* MEMENTRY       : Memory entry ID (-1 if not needed) */
        0,                     /* IPSTABLEID     : ID of the IPS table used */
        2,                     /* IPSENTRIES     : Number of IPS supported */
        0,                     /* POOLTABLEID    : ID of the POOL table */
        1,                     /* NUMPOOLS       : Number of POOLs supported */
        0,                     /* DATATABLEID    : ID of the data driver table */
        1,                     /* NUMDATADRV     : Number of data drivers supported */
        0,                     /* MQTID          : ID of the MQT */
        0,                     /* RINGIOTABLEID  : RingIO Table Id used for this DSP */
        0,                     /* MPLISTTABLEID  : MpList Table Id used for this DSP */
        0                      /* MPCSTABLEID    : MPCS Table ID used for this DSP */
    }
} ;

/** ============================================================================
 *  @name   LINKCFG_ipsTable_00
 *
 *  @desc   IPS table ID 0.
 *  ============================================================================
 */
STATIC CONST LINKCFG_Ips  LINKCFG_ipsTable_00 [] =
{
    {
        "IPS",                 /* NAME           : Name of the Inter-Processor-Signaling component */
        (Uint32) 32,           /* NUMIPSEVENTS   : Number of IPS events to be supported */
        (Uint32) 0,            /* MEMENTRY       : Memory entry ID (-1 if not needed) */
        (Uint32) 46,           /* GPPINTID       : Interrupt no. to used by the IPS on GPP-side. */
        (Uint32) 16,           /* DSPINTID       : Interrupt no. to used by the IPS on DSP-side. */
        0,                     /* ARGUMENT1      : First IPS-specific argument */
        0                      /* ARGUMENT2      : Second IPS-specific argument */