pwm_motor_settings.xml

DSP中使用PWM模块对电机进行控制

<PE_PROJECT_SETTINGS_DOCUMENTATION>
<PE_product_version v="version 2.97 for Freescale 56800/E family"/>
<PE_core_version v="Processor Expert Version 0374"/>

<CPU_Bean name="Cpu" type="56F8346">
<Enabled v="Y"/>

<Properties>
<Bean_name v="Cpu"/>
<CPU_type v="56F8346"/>
<Oscillator_frequency__MHz_ v="8"/>
<Initialization_priority v="minimal priority"/>
<Temp_sensor v="Disabled"/>
<Saturation_mode v="Disabled"/>

<boolgroup name="Initialize shadow registers" v="no" />

<enumgroup name="Initialize unused I/O pins" v="no initialization">

</enumgroup>

<group name="Internal peripherals">

<group name="SIM module">
<Pull_up_resistor_JTAG v="yes"/>
<Pull_up_resistor_CTRL v="yes"/>
<Pull_up_resistor_PWMA0 v="yes"/>
<Pull_up_resistor_PWMB v="yes"/>
<Pull_up_resistor_XBOOT v="yes"/>
<Pull_up_resistor_RESETB v="yes"/>
<Pull_up_resistor_EMI_MODE v="yes"/>
<Pull_up_resistor_CAN v="yes"/>
<Pull_up_resistor_PWMA1 v="yes"/>
<Wait_disable_mode v="Enabled"/>
<Stop_disable_mode v="Enabled"/>
<OnCE_clock_to_core v="Enabled when core TAP is enabled"/>
<CLKO_select v="SYS_CLK"/>
<CLKOUT_mode v="Disabled"/>

</group>

<boolgroup name="Flash security &amp; protection" v="Disabled" />

<group name="Peripheral clocks">
<PWM_A_peripheral_clock v="Enabled"/>
<PWM_B_peripheral_clock v="Enabled"/>
<SPI_0_peripheral_clock v="Enabled"/>
<SPI_1_peripheral_clock v="Enabled"/>
<SCI_0_peripheral_clock v="Enabled"/>
<SCI_1_peripheral_clock v="Enabled"/>
<TMR_A_peripheral_clock v="Enabled"/>
<TMR_B_peripheral_clock v="Enabled"/>
<TMR_C_peripheral_clock v="Enabled"/>
<TMR_D_peripheral_clock v="Enabled"/>
<DEC_0_peripheral_clock v="Enabled"/>
<DEC_1_peripheral_clock v="Enabled"/>
<CAN_peripheral_clock v="Enabled"/>
<ADC_A_peripheral_clock v="Enabled"/>
<ADC_B_peripheral_clock v="Enabled"/>
<EMI_peripheral_clock v="Enabled"/>

</group>

</group>

<group name="Allocated interrupts">

<boolgroup name="Interrupt SW0" v="Disabled" />

<boolgroup name="Interrupt SW1" v="Disabled" />

<boolgroup name="Interrupt SW2" v="Disabled" />

<boolgroup name="Interrupt SW3" v="Disabled" />

<boolgroup name="Interrupt LP" v="Disabled" />

<boolgroup name="Interrupt PLL" v="Disabled" />

<boolgroup name="Interrupt LVI" v="Disabled" />

<boolgroup name="Interrupt Illegal Instruction" v="Disabled" />

<boolgroup name="Interrupt Misalign Access" v="Disabled" />

<boolgroup name="Interrupt HW Stack Overflow" v="Disabled" />

</group>

<boolgroup name="External bus" v="Enabled">

<enumgroup name="Program memory boot" v="Internal">

</enumgroup>
<Data_memory v="Internal &amp; External"/>
<Initialize_OMR_register v="no"/>

<group name="Chip selects">

<boolgroup name="CS0" v="Enabled">
<Base_address v="0"/>
<Block_size v="128k"/>
<Read_wait_states v="1"/>
<Upper_Lower_byte_option v="Both Bytes Enable"/>
<R_W v="Read/Write"/>
<Program_Data_space_select v="PS only / Disable"/>
<Write_wait_states v="1"/>
<Write_wait_states_setup_delay v="0"/>
<Write_wait_states_hold_delay v="0"/>
<Read_wait_states_setup_delay v="0"/>
<Read_wait_states_hold_delay v="0"/>
<Minimal_delay_after_read v="0"/>

</boolgroup>

<boolgroup name="CS1" v="Enabled">
<Base_address v="0"/>
<Block_size v="128k"/>
<Read_wait_states v="1"/>
<Upper_Lower_byte_option v="Lower Byte Enable"/>
<R_W v="Read/Write"/>
<Program_Data_space_select v="DS only"/>
<Write_wait_states v="1"/>
<Write_wait_states_setup_delay v="0"/>
<Write_wait_states_hold_delay v="0"/>
<Read_wait_states_setup_delay v="0"/>
<Read_wait_states_hold_delay v="0"/>
<Minimal_delay_after_read v="0"/>

</boolgroup>

<boolgroup name="CS2" v="Enabled">
<Base_address v="0"/>
<Block_size v="128k"/>
<Read_wait_states v="1"/>
<Upper_Lower_byte_option v="Upper Byte Enable"/>
<R_W v="Read/Write"/>
<Program_Data_space_select v="DS only"/>
<Write_wait_states v="1"/>
<Write_wait_states_setup_delay v="0"/>
<Write_wait_states_hold_delay v="0"/>
<Read_wait_states_setup_delay v="0"/>
<Read_wait_states_hold_delay v="0"/>
<Minimal_delay_after_read v="0"/>

</boolgroup>

<boolgroup name="CS3" v="Disabled" />

</group>
<Base_read_wait_states v="1"/>
<Base_write_wait_states v="1"/>
<Base_minimal_delay_after_read v="0"/>
<Drive v="1"/>

<list name="External memory" v="0">

</list>

</boolgroup>

<group name="Enabled speed modes">

<boolgroup name="High speed mode" v="Enabled">
<System_clock__IP_Bus_ v="60"/>

<boolgroup name="PLL clock" v="Enabled">
<PLL_clock_frequency v="120"/>

</boolgroup>

</boolgroup>

<boolgroup name="Low speed mode" v="Disabled" />

<boolgroup name="Slow speed mode" v="Disabled" />

</group>
</Properties>

<Methods>
<SetHighSpeed v="don&apos;t generate code"/>
<SetLowSpeed v="don&apos;t generate code"/>
<SetSlowSpeed v="don&apos;t generate code"/>
<GetSpeedMode v="don&apos;t generate code"/>
<EnableInt v="generate code"/>
<DisableInt v="generate code"/>
<GetResetSource v="don&apos;t generate code"/>
<SetWaitMode v="generate code"/>
<SetStopMode v="generate code"/>
<SetDataMode v="generate code"/>
<GetBusFreqHz v="don&apos;t generate code"/>
<OpenBackDoor v="don&apos;t generate code"/>
<InitShadowRegs v="don&apos;t generate code"/>
<Delay100US v="don&apos;t generate code"/>
</Methods>

<Events>
<Event_module_name v="Events"/>

<event name="OnReset" v="don&apos;t generate code" />

<event name="OnSwINT0" v="don&apos;t generate code" />

<event name="OnSwINT1" v="don&apos;t generate code" />

<event name="OnSwINT2" v="don&apos;t generate code" />

<event name="OnSwINT3" v="don&apos;t generate code" />

<event name="OnSwINTLP" v="don&apos;t generate code" />

<event name="OnPLLError" v="don&apos;t generate code" />

<event name="OnIllegalOpcode" v="don&apos;t generate code" />

<event name="OnMisalignData" v="don&apos;t generate code" />

<event name="OnHWStackError" v="don&apos;t generate code" />

<event name="OnLVI22" v="don&apos;t generate code" />

<event name="OnLVI27" v="don&apos;t generate code" />
</Events>
<Compiler v="Metrowerks DSP C Compiler"/>

<CompilerProperties>
<Compiler v="Metrowerks DSP C Compiler"/>
<PESL_support v="yes"/>
<Unhandled_interrupts v="One handler for all"/>

<group name="User initialization">
<User_data_declarations v="(string list)"/>
<User_code_before_PE_initialization v="(string list)"/>
<User_code_after_PE_initialization v="(string list)"/>

</group>

<boolgroup name="Generate linker file" v="yes">
<Constants_in_xROM v="no"/>
<xROM_xRAM_mode v="no"/>
<pROM_xRAM_mode v="no"/>

<boolgroup name="Serial bootloader support" v="no" />
<Stack_size v="512"/>
<Heap_size v="256"/>

<list name="ROM/RAM Areas" v="3">

<group name="MemoryArea0">

<boolgroup name="ROM/RAM Area" v="Enabled">
<Name v=".p_Interrupts"/>
<Address v="0"/>
<Size v="164"/>
<Qualifier v="RWX"/>

</boolgroup>

</group>

<group name="MemoryArea1">

<boolgroup name="ROM/RAM Area" v="Enabled">
<Name v=".p_Code"/>
<Address v="164"/>
<Size v="65372"/>
<Qualifier v="RWX"/>

</boolgroup>

</group>

<group name="MemoryArea2">

<boolgroup name="ROM/RAM Area" v="Enabled">
<Name v=".x_Data"/>
<Address v="1"/>
<Size v="4095"/>
<Qualifier v="RW"/>

</boolgroup>

</group>

</list>

</boolgroup>

<list name="System paths " v="0">

</list>

<list name="User paths " v="0">

</list>

<list name="Libraries" v="0">

</list>

<list name="User directories" v="0">

</list>
</CompilerProperties>
</CPU_Bean>

<CPU_Bean name="Cpu" type="56F8346">
<Enabled v="N"/>

<Properties>
<Bean_name v="Cpu"/>
<CPU_type v="56F8346"/>
<Oscillator_frequency__MHz_ v="8"/>
<Initialization_priority v="minimal priority"/>
<Temp_sensor v="Disabled"/>
<Saturation_mode v="Disabled"/>

<boolgroup name="Initialize shadow registers" v="no" />

<enumgroup name="Initialize unused I/O pins" v="no initialization">

</enumgroup>

<group name="Internal peripherals">

<group name="SIM module">
<Pull_up_resistor_JTAG v="yes"/>
<Pull_up_resistor_CTRL v="yes"/>
<Pull_up_resistor_PWMA0 v="yes"/>
<Pull_up_resistor_PWMB v="yes"/>
<Pull_up_resistor_XBOOT v="yes"/>
<Pull_up_resistor_RESETB v="yes"/>
<Pull_up_resistor_EMI_MODE v="yes"/>
<Pull_up_resistor_CAN v="yes"/>
<Pull_up_resistor_PWMA1 v="yes"/>
<Wait_disable_mode v="Enabled"/>
<Stop_disable_mode v="Enabled"/>
<OnCE_clock_to_core v="Enabled when core TAP is enabled"/>
<CLKO_select v="SYS_CLK"/>
<CLKOUT_mode v="Disabled"/>

</group>

<boolgroup name="Flash security &amp; protection" v="Disabled" />

<group name="Peripheral clocks">
<PWM_A_peripheral_clock v="Enabled"/>
<PWM_B_peripheral_clock v="Enabled"/>
<SPI_0_peripheral_clock v="Enabled"/>
<SPI_1_peripheral_clock v="Enabled"/>
<SCI_0_peripheral_clock v="Enabled"/>
<SCI_1_peripheral_clock v="Enabled"/>
<TMR_A_peripheral_clock v="Enabled"/>
<TMR_B_peripheral_clock v="Enabled"/>
<TMR_C_peripheral_clock v="Enabled"/>
<TMR_D_peripheral_clock v="Enabled"/>
<DEC_0_peripheral_clock v="Enabled"/>
<DEC_1_peripheral_clock v="Enabled"/>
<CAN_peripheral_clock v="Enabled"/>
<ADC_A_peripheral_clock v="Enabled"/>
<ADC_B_peripheral_clock v="Enabled"/>
<EMI_peripheral_clock v="Enabled"/>

</group>

</group>

<group name="Allocated interrupts">

<boolgroup name="Interrupt SW0" v="Disabled" />

<boolgroup name="Interrupt SW1" v="Disabled" />

<boolgroup name="Interrupt SW2" v="Disabled" />

<boolgroup name="Interrupt SW3" v="Disabled" />

<boolgroup name="Interrupt LP" v="Disabled" />

<boolgroup name="Interrupt PLL" v="Disabled" />

<boolgroup name="Interrupt LVI" v="Disabled" />

<boolgroup name="Interrupt Illegal Instruction" v="Disabled" />

<boolgroup name="Interrupt Misalign Access" v="Disabled" />