sfr_r82b.inc

基于7758的三相多功能电能表的设计程序

;-------------------------------------------------------
;   Timer RD status register 1
;-------------------------------------------------------
trdsr1			.equ		0153h
imfa_trdsr1		.btequ		0,trdsr1	; Input capture / compare match flag A
imfb_trdsr1		.btequ		1,trdsr1	; Input capture / compare match flag B
imfc_trdsr1		.btequ		2,trdsr1	; Input capture / compare match flag C
imfd_trdsr1		.btequ		3,trdsr1	; Input capture / compare match flag D
ovf_trdsr1		.btequ		4,trdsr1	; Overflow flag
udf_trdsr1		.btequ		5,trdsr1	; Underflow flag
;
;-------------------------------------------------------
;   Timer RD interrupt enable register 0
;-------------------------------------------------------
trdier0			.equ		0144h
imiea_trdier0	.btequ		0,trdier0	; Input capture / compare match interrupt enable bit A
imieb_trdier0	.btequ		1,trdier0	; Input capture / compare match interrupt enable bit B
imiec_trdier0	.btequ		2,trdier0	; Input capture / compare match interrupt enable bit C
imied_trdier0	.btequ		3,trdier0	; Input capture / compare match interrupt enable bit D
ovie_trdier0	.btequ		4,trdier0	; Overflow / underflow interrupt enable bit
;
;-------------------------------------------------------
;   Timer RD interrupt enable register 1
;-------------------------------------------------------
trdier1			.equ		0154h
imiea_trdier1	.btequ		0,trdier1	; Input capture / compare match interrupt enable bit A
imieb_trdier1	.btequ		1,trdier1	; Input capture / compare match interrupt enable bit B
imiec_trdier1	.btequ		2,trdier1	; Input capture / compare match interrupt enable bit C
imied_trdier1	.btequ		3,trdier1	; Input capture / compare match interrupt enable bit D
ovie_trdier1	.btequ		4,trdier1	; Overflow / underflow interrupt enable bit
;
;-------------------------------------------------------
;   Timer RD PWM mode output level control register 0
;-------------------------------------------------------
trdpocr0		.equ		0145h
polb_trdpocr0	.btequ		0,trdpocr0	; PWM mode output level control bit B
polc_trdpocr0	.btequ		1,trdpocr0	; PWM mode output level control bit C
pold_trdpocr0	.btequ		2,trdpocr0	; PWM mode output level control bit D
;
;-------------------------------------------------------
;   Timer RD PWM mode output level control register 1
;-------------------------------------------------------
trdpocr1		.equ		0155h
polb_trdpocr1	.btequ		0,trdpocr1	; PWM mode output level control bit B
polc_trdpocr1	.btequ		1,trdpocr1	; PWM mode output level control bit C
pold_trdpocr1	.btequ		2,trdpocr1	; PWM mode output level control bit D
;
;-------------------------------------------------------
;   Timer RD Counter0
;-------------------------------------------------------
trd0			.equ		0146h		; Timer RD counter 0
;
;------------------------------------------------------
;   Timer RD general register A0
;------------------------------------------------------
trdgra0			.equ		0148h		; Timer RD general register A0
;
;------------------------------------------------------
;   Timer RD general register B0
;------------------------------------------------------
trdgrb0			.equ		014ah		; Timer RD general register B0
;
;------------------------------------------------------
;   Timer RD general register C0
;------------------------------------------------------
trdgrc0			.equ		014ch		; Timer RD general register C0
;
;------------------------------------------------------
;   Timer RD general register D0
;------------------------------------------------------
trdgrd0			.equ		014eh		; Timer RD general register D0
;
;------------------------------------------------------
;   Timer RD Counter1
;------------------------------------------------------
trd1			.equ		0156h		; Timer RD counter 1
;
;------------------------------------------------------
;   Timer RD general register A1
;------------------------------------------------------
trdgra1			.equ		0158h		; Timer RD general register A1
;
;------------------------------------------------------
;   Timer RD general register B1
;------------------------------------------------------
trdgrb1			.equ		015ah		; Timer RD general register B1
;
;------------------------------------------------------
;   Timer RD general register C1
;------------------------------------------------------
trdgrc1			.equ		015ch		; Timer RD general register C1
;
;------------------------------------------------------
;   Timer RD general register D1
;------------------------------------------------------
trdgrd1			.equ		015eh		; Timer RD general register D1
;
;-------------------------------------------------------
;   Flash mamory control register4
;-------------------------------------------------------
fmr4			.equ		01b3h
fmr40			.btequ		0,fmr4		; Erase-suspend function enable bit
fmr41			.btequ		1,fmr4		; Erase-suspend request bit
fmr42			.btequ		2,fmr4		; Program-suspend request bit
fmr43			.btequ		3,fmr4		; Erase command flag
fmr44			.btequ		4,fmr4		; Program command flag
fmr46			.btequ		6,fmr4		; Read status flag
fmr47			.btequ		7,fmr4		; Low-Power consumption read mode enable bit
;
;-------------------------------------------------------
;   Flash mamory control register1
;-------------------------------------------------------
fmr1			.equ		01b5h
fmr11			.btequ		1,fmr1		; EW1 mode select bit
fmr15			.btequ		5,fmr1		; Block0 rewrite disable bit
fmr16			.btequ		6,fmr1		; Block1 rewrite disable bit
;
;-------------------------------------------------------
;   Flash mamory control register0
;-------------------------------------------------------
fmr0			.equ		01b7h
fmr00			.btequ		0,fmr0		; RY/BY status flag
fmr01			.btequ		1,fmr0		; CPU rewrite mode select bit
fmr02			.btequ		2,fmr0		; Block 0, 1 rew rite enable bit
fmstp			.btequ		3,fmr0		; Flash memory stop bit
fmr06			.btequ		6,fmr0		; Program status flag 
fmr07			.btequ		7,fmr0		; Erase status flag
;
;-------------------------------------------------------
;   Timer RF register, Capture / Compare register
;-------------------------------------------------------
trf				.equ		0290h		; Timer RF register
trfm0			.equ		029ch		; Capture / Compare0 register
trfm1			.equ		029eh		; Compare1 register
;
;-------------------------------------------------------
;   Timer RF control register 0
;-------------------------------------------------------
trfcr0			.equ		029ah
tstart_trfcr0	.btequ		0,trfcr0	; Timer RF count start bit
tck0_trfcr0		.btequ		1,trfcr0	; Timer RF count source selection bit
tck1_trfcr0		.btequ		2,trfcr0	; Timer RF count source selection bit
trfc03_trfcr0	.btequ		3,trfcr0	; Capture polarity select bit
trfc04_trfcr0	.btequ		4,trfcr0	; Capture polarity select bit
trfc05_trfcr0	.btequ		5,trfcr0	; CMP output selection bit 0 when count stops
trfc06_trfcr0	.btequ		6,trfcr0	; CMP output selection bit 1 when count stops
;
trfc00_trfcr0	.btequ		0,trfcr0	; Timer RF count start bit
trfc01_trfcr0	.btequ		1,trfcr0	; Timer RF count source selection bit
trfc02_trfcr0	.btequ		2,trfcr0	; Timer RF count source selection bit
;
;-------------------------------------------------------
;   Timer RF control register 1
;-------------------------------------------------------
trfcr1			.equ		029bh
tipf0_trfcr1	.btequ		0,trfcr1	; TRFI filter select bit
tipf1_trfcr1	.btequ		1,trfcr1	; TRFI filter select bit
cclr_trfcr1		.btequ		2,trfcr1	; TRF register count operation select bit
tmod_trfcr1		.btequ		3,trfcr1	; Timer RF operation mode select bit
trfc14_trfcr1	.btequ		4,trfcr1	; Compare 0 output mode seelct bit
trfc15_trfcr1	.btequ		5,trfcr1	; Compare 0 output mode seelct bit
trfc16_trfcr1	.btequ		6,trfcr1	; Compare 1 output mode seelct bit
trfc17_trfcr1	.btequ		7,trfcr1	; Compare 1 output mode seelct bit
;
trfc10_trfcr1	.btequ		0,trfcr1	; TRFI filter select bit
trfc11_trfcr1	.btequ		1,trfcr1	; TRFI filter select bit
trfc12_trfcr1	.btequ		2,trfcr1	; TRF register count operation select bit
trfc13_trfcr1	.btequ		3,trfcr1	; Timer RF operation mode select bit
;
;-------------------------------------------------------
;   A-D control register2
;-------------------------------------------------------
adcon2			.equ		02d4h
smp				.btequ		0,adcon2	; A-D conversion method select bit
adgsel0			.btequ		3,adcon2	; A-D input group select bit
adgsel1			.btequ		4,adcon2	; 
;
;-------------------------------------------------------
;   A-D control register0
;-------------------------------------------------------
adcon0			.equ		02d6h
ch0				.btequ		0,adcon0	; Analog input pin select bit
ch1				.btequ		1,adcon0	; Analog input pin select bit
ch2				.btequ		2,adcon0	; Analog input pin select bit
md0				.btequ		3,adcon0	; A-D operation mode select bit
md1				.btequ		4,adcon0	; A-D operation mode select bit
adcap			.btequ		5,adcon0	; A-D conversion automatic start bit
adst			.btequ		6,adcon0	; A-D conversion start flag
cks0			.btequ		7,adcon0	; Frequency select bit0
cks0_adcon0 	.btequ		7,adcon0	; Frequency select bit0
;
;-------------------------------------------------------
;   A-D control register1
;-------------------------------------------------------
adcon1			.equ		02d7h
scan0			.btequ		0,adcon1	; 
bits			.btequ		3,adcon1	; 8/10-bit mode select bit
cks1			.btequ		4,adcon1	; Frequency select bit1
cks1_adcon1		.btequ		4,adcon1	; Frequency select bit1
vcut			.btequ		5,adcon1	; Vref connect bit
;
;-------------------------------------------------------
;   Timer RF output control register
;-------------------------------------------------------
trfout			.equ		02ffh
trfout0			.btequ		0,trfout	; TRFO00 output enable bit 0
trfout1			.btequ		1,trfout	; TRFO01 output enable bit 1
trfout2			.btequ		2,trfout	; TRFO02 output enable bit 2
trfout3			.btequ		3,trfout	; TRFO10 output enable bit 3
trfout4			.btequ		4,trfout	; TRFO11 output enable bit 4
trfout5			.btequ		5,trfout	; TRFO12 output enable bit 5
trfout6			.btequ		6,trfout	; TRFO00 to TRFO02 output reverse bit
trfout7			.btequ		7,trfout	; TRFO10 to TRFO12 output reverse bit
;
;-------------------------------------------------------
;   Interrupt control register
;-------------------------------------------------------
trcic			.equ		0047h		; Timer RC interrupt control register
ilvl0_trcic		.btequ		0,trcic		; Interrupt priority level select bit
ilvl1_trcic		.btequ		1,trcic		; 
ilvl2_trcic		.btequ		2,trcic		; 
ir_trcic		.btequ		3,trcic		; Interrupt request bit
;
trd0ic			.equ		0048h		; Timer RD 0 interrupt control register
ilvl0_trd0ic	.btequ		0,trd0ic	; Interrupt priority level select bit
ilvl1_trd0ic	.btequ		1,trd0ic	; 
ilvl2_trd0ic	.btequ		2,trd0ic	; 
ir_trd0ic		.btequ		3,trd0ic	; Interrupt request bit
;
trd1ic			.equ		0049h		; Timer RD 1 interrupt control register
ilvl0_trd1ic	.btequ		0,trd1ic	; Interrupt priority level select bit
ilvl1_trd1ic	.btequ		1,trd1ic	; 
ilvl2_trd1ic	.btequ		2,trd1ic	; 
ir_trd1ic		.btequ		3,trd1ic	; Interrupt request bit
;
treic			.equ		004ah		; Timer RE interrupt control register
ilvl0_treic		.btequ		0,treic		; Interrupt priority level select bit
ilvl1_treic		.btequ		1,treic		; 
ilvl2_treic		.btequ		2,treic		; 
ir_treic		.btequ		3,treic		; Interrupt request bit
;
s2tic			.equ		004bh		; UART2 transmit interrupt control register
ilvl0_s2tic		.btequ		0,s2tic		; Interrupt priority level select bit
ilvl1_s2tic		.btequ		1,s2tic		; 
ilvl2_s2tic		.btequ		2,s2tic		; 
ir_s2tic		.btequ		3,s2tic		; Interrupt request bit
;
s2ric			.equ		004ch		; UART2 receive interrupt control register
ilvl0_s2ric		.btequ		0,s2ric		; Interrupt priority level select bit
ilvl1_s2ric		.btequ		1,s2ric		; 
ilvl2_s2ric		.btequ		2,s2ric		; 
ir_s2ric		.btequ		3,s2ric		; Interrupt request bit
;
kupic			.equ		004dh		; Key input interrupt control register
ilvl0_kupic		.btequ		0,kupic		; Interrupt priority level select bit
ilvl1_kupic		.btequ		1,kupic		; 
ilvl2_kupic		.btequ		2,kupic		; 
ir_kupic		.btequ		3,kupic		; Interrupt request bit
;
ssuic			.equ		004fh		; SSU interrupt control register
ilvl0_ssuic		.btequ		0,ssuic		; Interrupt priority level select bit
ilvl1_ssuic		.btequ		1,ssuic		; 
ilvl2_ssuic		.btequ		2,ssuic		; 
ir_ssuic		.btequ		3,ssuic		; Interrupt request bit
;
iicic			.equ		004fh		; IIC interrupt control register
ilvl0_iicic		.btequ		0,iicic		; Interrupt priority level select bit
ilvl1_iicic		.btequ		1,iicic		; 
ilvl2_iicic		.btequ		2,iicic		; 
ir_iicic		.btequ		3,iicic		; Interrupt request bit
;
cmp1ic			.equ		0050h		; Compare 1 interrupt control register
ilvl0_cmp1ic	.btequ		0,cmp1ic	; Interrupt priority level select bit
ilvl1_cmp1ic	.btequ		1,cmp1ic	; 
ilvl2_cmp1ic	.btequ		2,cmp1ic	; 
ir_cmp1ic		.btequ		3,cmp1ic	; Interrupt request bit
;
s0tic			.equ		0051h		; UART0 transmit interrupt control register
ilvl0_s0tic		.btequ		0,s0tic		; Interrupt priority level select bit
ilvl1_s0tic		.btequ		1,s0tic		; 
ilvl2_s0tic		.btequ		2,s0tic		; 
ir_s0tic		.btequ		3,s0tic		; Inter