📄 sfr_r82b.inc
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int1sel .btequ 0,pmr ; INT1 port select bit
int2sel .btequ 1,pmr ; INT2 port select bit
u1pinsel .btequ 4,pmr ; UART1 enable bit
iicsel .btequ 7,pmr ; SSU/IIC bus switch bit
;
;-------------------------------------------------------
; External input enable register
;-------------------------------------------------------
inten .equ 00f9h
int0en .btequ 0,inten ; INT0 input enable bit
int0pl .btequ 1,inten ; INT0 input polarity select bit
int1en .btequ 2,inten ; INT1 input enable bit
int1pl .btequ 3,inten ; INT1 input polarity select bit
int2en .btequ 4,inten ; INT2 input enable bit
int2pl .btequ 5,inten ; INT2 input polarity select bit
int3en .btequ 6,inten ; INT3 input enable bit
int3pl .btequ 7,inten ; INT3 input polarity select bit
;
;-------------------------------------------------------
; INT0 input filter select register
;-------------------------------------------------------
intf .equ 00fah
int0f0 .btequ 0,intf ; INT0 input filter select bit
int0f1 .btequ 1,intf ; INT0 input filter select bit
int1f0 .btequ 2,intf ; INT1 input filter select bit
int1f1 .btequ 3,intf ; INT1 input filter select bit
int2f0 .btequ 4,intf ; INT2 input filter select bit
int2f1 .btequ 5,intf ; INT2 input filter select bit
int3f0 .btequ 6,intf ; INT3 input filter select bit
int3f1 .btequ 7,intf ; INT3 input filter select bit
;
;-------------------------------------------------------
; Key input enable register
;-------------------------------------------------------
kien .equ 00fbh
ki0en .btequ 0,kien ; KI0 input enable bit
ki0pl .btequ 1,kien ; KI0 input polarity select bit
ki1en .btequ 2,kien ; KI1 input enable bit
ki1pl .btequ 3,kien ; KI1 input polarity select bit
ki2en .btequ 4,kien ; KI2 input enable bit
ki2pl .btequ 5,kien ; KI2 input polarity select bit
ki3en .btequ 6,kien ; KI3 input enable bit
ki3pl .btequ 7,kien ; KI3 input polarity select bit
;
;-------------------------------------------------------
; Pull-up control registers
;-------------------------------------------------------
pur0 .equ 00fch
pu00 .btequ 0,pur0 ; P00 to P03 pull-up
pu01 .btequ 1,pur0 ; P04 to P07 pull-up
pu02 .btequ 2,pur0 ; P10 to P13 pull-up
pu03 .btequ 3,pur0 ; P14 to P17 pull-up
pu04 .btequ 4,pur0 ; P20 to P23 pull-up
pu05 .btequ 5,pur0 ; P24 to P27 pull-up
pu06 .btequ 6,pur0 ; P30 to P33 pull-up
pu07 .btequ 7,pur0 ; P34 to P37 pull-up
;
pur1 .equ 00fdh
pu10 .btequ 0,pur1 ; P43 pull-up
pu11 .btequ 1,pur1 ; P44, P45 pull-up
pu12 .btequ 2,pur1 ; P50 to P53 pull-up
pu13 .btequ 3,pur1 ; P54 to P57 pull-up
pu14 .btequ 4,pur1 ; P60 to P63 pull-up
pu15 .btequ 5,pur1 ; P64 to P67 pull-up
;
pur2 .equ 02fch
pu22 .btequ 2,pur2 ; P80 to P83 pull-up
pu23 .btequ 3,pur2 ; P84 to P86 pull-up
;
;-------------------------------------------------------
; Timer RA control register
;-------------------------------------------------------
tracr .equ 0100h
tstart_tracr .btequ 0,tracr ; Timer RA count start bit
tcstf_tracr .btequ 1,tracr ; Timer RA count status flag
tstop_tracr .btequ 2,tracr ; Timer RA count forcible stop bit
tedgf_tracr .btequ 4,tracr ; Active edge judgment flag
tundf_tracr .btequ 5,tracr ; Timer RA underflow flag
;
;-------------------------------------------------------
; Timer RA I/O control register
;-------------------------------------------------------
traioc .equ 0101h
tedgsel_traioc .btequ 0,traioc ; TRAIO polarity switch bit
topcr_traioc .btequ 1,traioc ; TRAIO output control bit
toena_traioc .btequ 2,traioc ; TRAO output enable bit
tiosel_traioc .btequ 3,traioc ; INT1/TRAIO select bit
tipf0_traioc .btequ 4,traioc ; TRAIO input filter select bit
tipf1_traioc .btequ 5,traioc ; TRAIO input filter select bit
;
;-------------------------------------------------------
; Timer RA mode register
;-------------------------------------------------------
tramr .equ 0102h
tmod0_tramr .btequ 0,tramr ; Timer RA operation mode select bit
tmod1_tramr .btequ 1,tramr ; Timer RA operation mode select bit
tmod2_tramr .btequ 2,tramr ; Timer RA operation mode select bit
tck0_tramr .btequ 4,tramr ; Timer RA count source select bit
tck1_tramr .btequ 5,tramr ; Timer RA count source select bit
tck2_tramr .btequ 6,tramr ; Timer RA count source select bit
tckcut_tramr .btequ 7,tramr ; Timer RA count source cutoff bit
;
;-------------------------------------------------------
; Timer RA prescaler register
;-------------------------------------------------------
trapre .equ 0103h
;
;-------------------------------------------------------
; Timer RA register
;-------------------------------------------------------
tra .equ 0104h
;
;-------------------------------------------------------
; LIN special function register
;-------------------------------------------------------
lincr2 .equ 0105h
;
bce_lincr2 .btequ 0,lincr2 ; When Synch Break send, bus collision detection effective bit
;
;-------------------------------------------------------
; LIN control register
;-------------------------------------------------------
lincr .equ 0106h
sfie_lincr .btequ 0,lincr ; Synchronous field measurementcompleted interrupt enable bit
sbie_lincr .btequ 1,lincr ; Synchronous break detection interrupt enable bit
bcie_lincr .btequ 2,lincr ; Bus collision detection interrupt enable bit
rxdsf_lincr .btequ 3,lincr ; RxD0 input status flag
lstart_lincr .btequ 4,lincr ; Synchronous Break detection start bit
sbe_lincr .btequ 5,lincr ; RxD0 input unmasking timing select bit
mst_lincr .btequ 6,lincr ; LIN operation mode setting bit
line_lincr .btequ 7,lincr ; LIN operation start bit
;
;-------------------------------------------------------
; LIN status register
;-------------------------------------------------------
linst .equ 0107h
sfdct_linst .btequ 0,linst ; Synchronous field measurementcompleted flag
sbdct_linst .btequ 1,linst ; Synchronous break detection flag
bcdct_linst .btequ 2,linst ; Bus collision detection flag
b0clr_linst .btequ 3,linst ; SFDCT flag clear bit
b1clr_linst .btequ 4,linst ; SBDCT flag clear bit
b2clr_linst .btequ 5,linst ; BCDCT flag clear bit
;
;-------------------------------------------------------
; Timer RB control register
;-------------------------------------------------------
trbcr .equ 0108h
tstart_trbcr .btequ 0,trbcr ; Timer RB count start bit
tcstf_trbcr .btequ 1,trbcr ; Timer RB count status flag
tstop_trbcr .btequ 2,trbcr ; Timer RB count forcible stop bit
;
;-------------------------------------------------------
; Timer RB one shot control register
;-------------------------------------------------------
trbocr .equ 0109h
tosst_trbocr .btequ 0,trbocr ; Timer RB one-shot start bit
tossp_trbocr .btequ 1,trbocr ; Timer RB one-shot stop bit
tosstf_trbocr .btequ 2,trbocr ; Timer RB one-shot status flag
;
;-------------------------------------------------------
; Timer RB I/O control register
;-------------------------------------------------------
trbioc .equ 010ah
topl_trbioc .btequ 0,trbioc ; Timer RB output level select bit
tocnt_trbioc .btequ 1,trbioc ; Timer RB output switch bit
inostg_trbioc .btequ 2,trbioc ; One-shot trigger control bit
inoseg_trbioc .btequ 3,trbioc ; One-shot trigger polarity select bit
;
;-------------------------------------------------------
; Timer RB mode register
;-------------------------------------------------------
trbmr .equ 010bh
tmod0_trbmr .btequ 0,trbmr ; Timer RB operating mode select bit
tmod1_trbmr .btequ 1,trbmr ; Timer RB operating mode select bit
twrc_trbmr .btequ 3,trbmr ; Timer RB write control bit
tck0_trbmr .btequ 4,trbmr ; Timer RB count source select bit
tck1_trbmr .btequ 5,trbmr ; Timer RB count source select bit
tckcut_trbmr .btequ 7,trbmr ; Timer RB count source cutoff bit
;
;-------------------------------------------------------
; Timer RB prescaler register
;-------------------------------------------------------
trbpre .equ 010ch
;
;-------------------------------------------------------
; Timer RB secondary register
;-------------------------------------------------------
trbsc .equ 010dh
;
;-------------------------------------------------------
; Timer RB Primary Register
;-------------------------------------------------------
trbpr .equ 010eh
;
;-------------------------------------------------------
; Timer RE seconds data register / Timer RE counter data register
;-------------------------------------------------------
tresec .equ 0118h
sc00_tresec .btequ 0,tresec ; 1st digit of seconds count bits
sc01_tresec .btequ 1,tresec ; 1st digit of seconds count bits
sc02_tresec .btequ 2,tresec ; 1st digit of seconds count bits
sc03_tresec .btequ 3,tresec ; 1st digit of seconds count bits
sc10_tresec .btequ 4,tresec ; 2nd digit of seconds count bits
sc11_tresec .btequ 5,tresec ; 2nd digit of seconds count bits
sc12_tresec .btequ 6,tresec ; 2nd digit of seconds count bits
bsy_tresec .btequ 7,tresec ; Timer RE busy flag
;
;-------------------------------------------------------
; Timer RE minutes data register / Timer RE compare data register
;-------------------------------------------------------
tremin .equ 0119h
mn00_tremin .btequ 0,tremin ; 1st digit of minutes count bits
mn01_tremin .btequ 1,tremin ; 1st digit of minutes count bits
mn02_tremin .btequ 2,tremin ; 1st digit of minutes count bits
mn03_tremin .btequ 3,tremin ; 1st digit of minutes count bits
mn10_tremin .btequ 4,tremin ; 2nd digit of minutes count bits
mn11_tremin .btequ 5,tremin ; 2nd digit of minutes count bits
mn12_tremin .btequ 6,tremin ; 2nd digit of minutes count bits
bsy_tremin .btequ 7,tremin ; Timer RE busy flag
;
;-------------------------------------------------------
; Timer RE Hours Data Register
;-------------------------------------------------------
trehr .equ 011ah
hr00_trehr .btequ 0,trehr ; 1st digit of hours count bits
hr01_trehr .btequ 1,trehr ; 1st digit of hours count bits
hr02_trehr .btequ 2,trehr ; 1st digit of hours count bits
hr03_trehr .btequ 3,trehr ; 1st digit of hours count bits
hr10_trehr .btequ 4,trehr ; 2nd digit of hours count bits
hr11_trehr .btequ 5,trehr ; 2nd digit of hours count bits
bsy_trehr .btequ 7,trehr ; Timer RE busy flag
;
;-------------------------------------------------------
; Timer RE Days of Week Data Register
;-------------------------------------------------------
trewk .equ 011bh
wk0_trewk .btequ 0,trewk ; Days of week count bits
wk1_trewk .btequ 1,trewk ; Days of week count bits
wk2_trewk .btequ 2,trewk ; Days of week count bits
bsy_trewk .btequ 7,trewk ; Timer RE busy flag
;
;-------------------------------------------------------
; Timer RE control register1
;-------------------------------------------------------
trecr1 .equ 011ch
tcstf_trecr1 .btequ 1,trecr1 ; Timer RE count status flag
toena_trecr1 .btequ 2,trecr1 ; TREO pin output enable bit
int_trecr1 .btequ 3,trecr1 ; Interrupt request timing bit
trerst_trecr1 .btequ 4,trecr1 ; Timer RE reset bit
pm_trecr1 .btequ 5,trecr1 ; A.M. / P.M. bit
h12_h24_trecr1 .btequ 6,trecr1 ; Operating mode select bit
tstart_trecr1 .btequ 7,trecr1 ; Timer RE count start bit
;
;-------------------------------------------------------
; Timer RE control register2
;-------------------------------------------------------
trecr2 .equ 011dh
seie_trecr2 .btequ 0,trecr2 ; Periodic interrupt triggered every second enable bit
mnie_trecr2 .btequ 1,trecr2 ; Periodic interrupt triggered every minute enable bit
hrie_trecr2 .btequ 2,trecr2 ; Periodic interrupt triggered every hour enable bit
dyie_trecr2 .btequ 3,trecr2 ; Periodic interrupt triggered every day enable bit
wkie_trecr2 .btequ 4,trecr2 ; Periodic interrupt triggered every week enable bit
comie_trecr2 .btequ 5,trecr2 ; Compare match interrupt enable bit
;
;-------------------------------------------------------
; Timer RE count source select register
;-------------------------------------------------------
trecsr .equ 011eh
rcs0_trecsr .btequ 0,trecsr ; Count source select bit
rcs1_trecsr .btequ 1,trecsr ; Count source select bit
rcs2_trecsr .btequ 2,trecsr ; 4-Bit counter select bit
rcs3_trecsr .btequ 3,trecsr ; Real-Time clock mode select bit
rcs5_trecsr .btequ 5,trecsr ; Clock output select bit
rcs6_trecsr .btequ 6,trecsr ; Clock output select bit
;
;-------------------------------------------------------
; Timer RC mode register
;-------------------------------------------------------
trcmr .equ 0120h
pwmb_trcmr .btequ 0,trcmr ; TRCIOB PWM mode select bit
pwmc_trcmr .btequ 1,trcmr ; TRCIOC PWM mode select bit
pwmd_trcmr .btequ 2,trcmr ; TRCIOD PWM mode select bit
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