frequency.tan.rpt

这是一个通过外部按键来控制发光二极管发光的程序

; tco                                                                                      ;
+-------+--------------+------------+-----------------------------+-----------+------------+
; Slack ; Required tco ; Actual tco ; From                        ; To        ; From Clock ;
+-------+--------------+------------+-----------------------------+-----------+------------+
; N/A   ; None         ; 26.800 ns  ; keydecoder:u3|cnt4[0]       ; clkout    ; clk        ;
; N/A   ; None         ; 26.500 ns  ; keydecoder:u3|cnt4[1]       ; clkout    ; clk        ;
; N/A   ; None         ; 23.300 ns  ; fptd:u4|clkout2             ; clkout    ; clk        ;
; N/A   ; None         ; 20.600 ns  ; fptd:u4|clkout3             ; clkout    ; clk        ;
; N/A   ; None         ; 20.600 ns  ; keyscan:u2|present_state[3] ; keydrv[3] ; clk        ;
; N/A   ; None         ; 20.600 ns  ; keyscan:u2|present_state[2] ; keydrv[2] ; clk        ;
; N/A   ; None         ; 20.600 ns  ; keyscan:u2|present_state[1] ; keydrv[1] ; clk        ;
; N/A   ; None         ; 20.600 ns  ; keyscan:u2|present_state[0] ; keydrv[0] ; clk        ;
; N/A   ; None         ; 19.600 ns  ; fptd:u4|clkout1             ; clkout    ; clk        ;
; N/A   ; None         ; 17.400 ns  ; fptd:u4|clkout4             ; clkout    ; clk        ;
+-------+--------------+------------+-----------------------------+-----------+------------+


+-------------------------------------------------------------+
; tpd                                                         ;
+-------+-------------------+-----------------+------+--------+
; Slack ; Required P2P Time ; Actual P2P Time ; From ; To     ;
+-------+-------------------+-----------------+------+--------+
; N/A   ; None              ; 18.700 ns       ; en   ; clkout ;
+-------+-------------------+-----------------+------+--------+


+--------------------------------------------------------------------------------------------+
; th                                                                                         ;
+---------------+-------------+-----------+----------+----------------------------+----------+
; Minimum Slack ; Required th ; Actual th ; From     ; To                         ; To Clock ;
+---------------+-------------+-----------+----------+----------------------------+----------+
; N/A           ; None        ; 1.900 ns  ; keyin[1] ; keydecoder:u3|keyvalue[3]  ; clk      ;
; N/A           ; None        ; 1.700 ns  ; keyin[1] ; keydecoder:u3|keyvalue[2]  ; clk      ;
; N/A           ; None        ; -0.300 ns ; keyin[0] ; keydecoder:u3|temp_pressed ; clk      ;
; N/A           ; None        ; -0.500 ns ; keyin[1] ; keydecoder:u3|temp_pressed ; clk      ;
; N/A           ; None        ; -1.500 ns ; keyin[1] ; keydecoder:u3|keyvalue[0]  ; clk      ;
; N/A           ; None        ; -1.500 ns ; keyin[1] ; keydecoder:u3|keyvalue[1]  ; clk      ;
; N/A           ; None        ; -1.700 ns ; keyin[0] ; keydecoder:u3|keyvalue[0]  ; clk      ;
; N/A           ; None        ; -1.700 ns ; keyin[0] ; keydecoder:u3|keyvalue[1]  ; clk      ;
; N/A           ; None        ; -1.700 ns ; keyin[0] ; keydecoder:u3|keyvalue[2]  ; clk      ;
; N/A           ; None        ; -1.700 ns ; keyin[0] ; keydecoder:u3|keyvalue[3]  ; clk      ;
+---------------+-------------+-----------+----------+----------------------------+----------+


+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Timing Analyzer
    Info: Version 5.1 Build 176 10/26/2005 SJ Full Version
    Info: Processing started: Fri Dec 19 17:37:25 2008
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off frequency -c frequency
Info: Started post-fitting delay annotation
Info: Delay annotation completed successfully
Warning: Found pins functioning as undefined clocks and/or memory enables
    Info: Assuming node "clk" is an undefined clock
Warning: Found 4 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew
    Info: Detected ripple clock "keydecoder:u3|q5" as buffer
    Info: Detected ripple clock "keydecoder:u3|q6" as buffer
    Info: Detected gated clock "keydecoder:u3|keypressed" as buffer
    Info: Detected ripple clock "fp:u1|clkout1" as buffer
Info: Clock "clk" has Internal fmax of 70.42 MHz between source register "fptd:u4|cnt4[8]" and destination register "fptd:u4|clkout4" (period= 14.2 ns)
    Info: + Longest register to register delay is 12.400 ns
        Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC1_B17; Fanout = 4; REG Node = 'fptd:u4|cnt4[8]'
        Info: 2: + IC(1.200 ns) + CELL(2.200 ns) = 3.400 ns; Loc. = LC2_B12; Fanout = 1; COMB Node = 'fptd:u4|LessThan~1500'
        Info: 3: + IC(1.100 ns) + CELL(1.500 ns) = 6.000 ns; Loc. = LC5_B13; Fanout = 1; COMB Node = 'fptd:u4|LessThan~1551'
        Info: 4: + IC(0.000 ns) + CELL(1.900 ns) = 7.900 ns; Loc. = LC6_B13; Fanout = 1; COMB Node = 'fptd:u4|LessThan~1509'
        Info: 5: + IC(3.500 ns) + CELL(1.000 ns) = 12.400 ns; Loc. = LC6_I19; Fanout = 1; REG Node = 'fptd:u4|clkout4'
        Info: Total cell delay = 6.600 ns ( 53.23 % )
        Info: Total interconnect delay = 5.800 ns ( 46.77 % )
    Info: - Smallest clock skew is 0.000 ns
        Info: + Shortest clock path from clock "clk" to destination register is 1.900 ns
            Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = PIN_79; Fanout = 117; CLK Node = 'clk'
            Info: 2: + IC(1.400 ns) + CELL(0.000 ns) = 1.900 ns; Loc. = LC6_I19; Fanout = 1; REG Node = 'fptd:u4|clkout4'
            Info: Total cell delay = 0.500 ns ( 26.32 % )
            Info: Total interconnect delay = 1.400 ns ( 73.68 % )
        Info: - Longest clock path from clock "clk" to source register is 1.900 ns
            Info: 1: + IC(0.000 ns) + CELL(0.500 ns) = 0.500 ns; Loc. = PIN_79; Fanout = 117; CLK Node = 'clk'