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TagVisibility "local"
}
Block {
BlockType Product
Name "Product6"
Ports [2, 1]
Position [295, 311, 340, 349]
ShowName off
Inputs "**"
CollapseMode "All dimensions"
InputSameDT off
OutDataTypeMode "double"
RndMeth "Floor"
}
Block {
BlockType Reference
Name "Raised Cosine\nReceive Filter"
Ports [1, 1]
Position [730, 118, 810, 162]
ShowName off
DialogController "dspDDGCreate"
DialogControllerArgs "DataTag0"
SourceBlock "commfilt2/Raised Cosine\nReceive Filter"
SourceType "Raised Cosine Receive Filter"
ShowPortLabels "FromPortIcon"
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
filtType "Square root"
N "8"
D "4"
R "0.35"
sampMode "Sample-based"
rateMode "None"
downFactor "0"
downOffset "0"
checkGain "Normalized"
filterGain "1"
checkCoeff off
variableName "rcRxFilt"
launchFVT off
roundingMode "Floor"
overflowMode off
coeffMode "Same word length as input"
coeffWordLength "16"
coeffFracLength "15"
prodOutputMode "Same as input"
prodOutputWordLength "32"
prodOutputFracLength "30"
accumMode "Same as product output"
accumWordLength "32"
accumFracLength "30"
outputMode "Same as accumulator"
outputWordLength "16"
outputFracLength "15"
LockScale off
}
Block {
BlockType Reference
Name "Raised Cosine\nTransmit Filter"
Ports [1, 1]
Position [160, 68, 240, 112]
ShowName off
DialogController "dspDDGCreate"
DialogControllerArgs "DataTag1"
SourceBlock "commfilt2/Raised Cosine\nTransmit Filter"
SourceType "Raised Cosine Transmit Filter"
ShowPortLabels "FromPortIcon"
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
filtType "Square root"
D "4"
R "0.35"
sampMode "Sample-based"
N "8"
checkGain "Normalized"
filterGain "1"
checkCoeff off
variableName "rcTxFilt"
launchFVT off
roundingMode "Floor"
overflowMode off
coeffMode "Same word length as input"
coeffWordLength "16"
coeffFracLength "15"
prodOutputMode "Inherit via internal rule"
prodOutputWordLength "32"
prodOutputFracLength "30"
accumMode "Inherit via internal rule"
accumWordLength "32"
accumFracLength "30"
outputMode "Same as accumulator"
outputWordLength "16"
outputFracLength "15"
LockScale off
}
Block {
BlockType Scope
Name "Scope3"
Ports [2]
Position [960, 35, 990, 70]
Floating off
Location [5, 45, 1029, 737]
Open off
NumInputPorts "2"
ZoomMode "xonly"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
axes2 "%<SignalLabel>"
}
TimeRange "0.0025"
YMin "-500~-500"
YMax "500~500"
SaveName "ScopeData6"
DataFormat "StructureWithTime"
LimitDataPoints off
SampleTime "0"
}
Block {
BlockType Scope
Name "Scope4"
Ports [2]
Position [475, 25, 505, 60]
Floating off
Location [5, 34, 1033, 760]
Open off
NumInputPorts "2"
ZoomMode "xonly"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
axes2 "%<SignalLabel>"
}
TimeRange "0.0025"
YMin "-500~-500"
YMax "500~500"
SaveName "ScopeData7"
DataFormat "StructureWithTime"
LimitDataPoints off
SampleTime "0"
}
Block {
BlockType SubSystem
Name "Subsystem"
Ports [0, 1]
Position [45, 70, 115, 110]
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
FunctionWithSeparateData off
MaskHideContents off
System {
Name "Subsystem"
Location [-8, 154, 267, 254]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Reference
Name "QPSK\nModulator\nBaseband"
Ports [1, 1]
Position [120, 26, 195, 74]
ShowName off
SourceBlock "commdigbbndpm3/QPSK\nModulator\nBaseband"
SourceType "QPSK Modulator Baseband"
ShowPortLabels "FromPortIcon"
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
InType "Integer"
Enc "Gray"
Ph "pi/4"
outDtype "double"
outWordLen "16"
outUDDataType "sfix(16)"
outFracLenMode "Best precision"
outFracLen "15"
}
Block {
BlockType Reference
Name "Random Integer\nGenerator"
Ports [0, 1]
Position [25, 28, 105, 72]
ShowName off
SourceBlock "commrandsrc2/Random Integer\nGenerator"
SourceType "Random Integer Generator"
ShowPortLabels "FromPortIcon"
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
mul "4"
seed "37"
Ts "Tsym"
frameBased off
sampPerFrame "1"
orient off
outDataType "double"
}
Block {
BlockType Outport
Name "Out1"
Position [220, 43, 250, 57]
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
SrcBlock "Random Integer\nGenerator"
SrcPort 1
DstBlock "QPSK\nModulator\nBaseband"
DstPort 1
}
Line {
SrcBlock "QPSK\nModulator\nBaseband"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
}
}
Block {
BlockType SubSystem
Name "Subsystem1"
Ports [1, 3]
Position [460, 298, 580, 362]
ShowName off
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
FunctionWithSeparateData off
MaskHideContents off
MaskPromptString "Pre-Detection Integration Time(s)|IF Sampling F"
"requency(Hz)"
MaskStyleString "edit,edit"
MaskTunableValueString "on,on"
MaskCallbackString "|"
MaskEnableString "on,on"
MaskVisibilityString "on,on"
MaskToolTipString "on,on"
MaskVarAliasString ","
MaskVariables "IDTime=@1;Fsamp=@2;"
MaskDisplay "disp('Phase\\nDiscriminator');\nport_label('inp"
"ut',4,'Data');\nport_label('input',1,'P');\nport_label('input',2,'E');\nport_"
"label('input',3,'L');\nport_label('output',2,'CarPD');\nport_label('output',3"
",'CarPD2');\nport_label('output',1,'CodePD');\n"
MaskIconFrame on
MaskIconOpaque on
MaskIconRotate "none"
MaskIconUnits "autoscale"
MaskValueString "Tsym |Fs"
MaskTabNameString ","
System {
Name "Subsystem1"
Location [2, 80, 998, 712]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "Data"
Position [35, 78, 65, 92]
IconDisplay "Port number"
}
Block {
BlockType SubSystem
Name " QPSK Phase\n Error Detector"
Ports [2, 1]
Position [590, 597, 630, 653]
MinAlgLoopOccurrences off
RTWSystemCode "Auto"
FunctionWithSeparateData off
MaskHideContents off
System {
Name " QPSK Phase\n Error Detector"
Location [285, 392, 823, 677]
Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000]
TiledPageScale 1
ShowPageBoundaries off
ZoomFactor "100"
Block {
BlockType Inport
Name "I"
Position [155, 63, 185, 77]
IconDisplay "Port number"
}
Block {
BlockType Inport
Name "Q"
Position [155, 113, 185, 127]
Port "2"
IconDisplay "Port number"
}
Block {
BlockType Product
Name "Product"
Ports [2, 1]
Position [330, 62, 360, 93]
CollapseMode "All dimensions"
RndMeth "Floor"
}
Block {
BlockType Product
Name "Product1"
Ports [2, 1]
Position [330, 137, 360, 168]
CollapseMode "All dimensions"
RndMeth "Floor"
}
Block {
BlockType Signum
Name "Sign"
Position [250, 55, 280, 85]
}
Block {
BlockType Signum
Name "Sign1"
Position [245, 185, 275, 215]
}
Block {
BlockType Sum
Name "Sum"
Ports [2, 1]
Position [385, 70, 405, 90]
ShowName off
IconShape "round"
Inputs "|+-"
CollapseMode "All dimensions"
}
Block {
BlockType Outport
Name "error"
Position [460, 73, 490, 87]
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
SrcBlock "Sign"
SrcPort 1
DstBlock "Product"
DstPort 1
}
Line {
SrcBlock "I"
SrcPort 1
Points [30, 0]
Branch {
DstBlock "Sign"
DstPort 1
}
Branch {
Points [0, 75]
DstBlock "Product1"
DstPort 1
}
}
Line {
SrcBlock "Q"
SrcPort 1
Points [10, 0]
Branch {
Points [115, 0]
DstBlock "Product"
DstPort 2
}
Branch {
Points [0, 80]
DstBlock "Sign1"
DstPort 1
}
}
Line {
SrcBlock "Sign1"
SrcPort 1
Points [35, 0]
DstBlock "Product1"
DstPort 2
}
Line {
SrcBlock "Sum"
SrcPort 1
DstBlock "error"
DstPort 1
}
Line {
SrcBlock "Product"
SrcPort 1
DstBlock "Sum"
DstPort 1
}
Line {
SrcBlock "Product1"
SrcPort 1
Points [30, 0]
DstBlock "Sum"
DstPort 2
}
}
}
Block {
BlockType Abs
Name "Abs"
Position [500, 260, 530, 290]
SaturateOnIntegerOverflow off
}
Block {
BlockType Abs
Name "Abs1"
Position [495, 535, 525, 565]
SaturateOnIntegerOverflow off
}
Block {
BlockType Reference
Name "Binary Point\nCasting"
Ports [1, 1]
Position [965, 121, 1045, 139]
SourceBlock "bus_alteradspbuilder/Binary Point\nCasting"
SourceType "sBinPoint Altera BlockSet"
Inputs "Signed Fractional"
bwl "2"
bwr "40"
Outputs "39"
}
Block {
BlockType Reference
Name "Compare\nTo Constant"
Ports [1, 1]
Position [560, 260, 590, 290]
ShowName off
SourceBlock "simulink/Logic and Bit\nOperations/Compare"
"\nTo Constant"
SourceType "Compare To Constant"
ShowPortLabels "FromPortIcon"
SystemSampleTime "-1"
FunctionWithSeparateData off
RTWMemSecFuncInitTerm "Inherit from model"
RTWMemSecFuncExecute "Inherit from model"
RTWMemSecDataConstants "Inherit from model"
RTWMemSecDataInternal "Inherit from model"
RTWMemSecDataParameters "Inherit from model"
relop ">="
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