vdk-bf533.ldf

analog device vdsp LAN driver and examples

/*
** Default LDF for a VDK project on the ADSP-BF533.
** 
** There are configuration options that can be specified either by compiler
** flags, or by linker flags directly. These options are:
**
** __WORKAROUNDS_ENABLED
**      Defined by compiler when -workaround is used to direct LDF to
**      link with libraries that have been built with work-arounds enabled.
** USE_CACHE
**      Makes use of some L1 memory as cache. Implies the presence of at
**      least some external memory.
** USE_SDRAM
**     Makes SDRAM available as standard program/data memory, with no
**     cache configuration of L1. 
** USE_SCRATCHPAD_STACK
**   Use scratchpad for system stack. Note only 4k memory.
** USE_SCRATCHPAD_HEAP
**   Use scratchpad for dynamic heap allocation. Note only 4k memory.
** USE_SDRAM_STACK
**   Use SDRAM for system stack rather than L1 default. Should allow for
**   much larger stack but likely to have a significant performance impact.
** USE_SDRAM_HEAP
**   Use SDRAM for dynamic heap allocation rather than L1 default. Should
**   result in a much larger heap being available but can have a significant
**   performance impact.
** USER_CRT
**   Specifies a custom or System Builder generated CRT startup object to use.
** USER_CPLBTAB
**   Specifies a custom or System Builder generated CPLB configuration
**   definition.
** PARTITION_EZKIT_SDRAM
**    The ADSP-BF533 is supplied with one external bank populated with
**    with 32MB of SDRAM. The ADSP-BF533 EBIU allows for 4 internal banks
**    in an external SDRAM bank to be accessed simultaneously, reducing the
**    stall on access compared to keeping program and data in one bank.
**    Defining this macro partitions the SDRAM into 4 8MB banks with the
**    intention of use being: bank0 - program, bank1 - data, bank2 - data/bsz,
**    bank3 - program/heap. See 533 Hardware Reference Manual, 17-22, SDRAM
**    controler.
** IEEEFP
**   Defined by the compiler when switch -ieee-fp is used to direct the
**   use of slower but more IEEE conformant floating-point emulation.
** _DINKUM_IO
**   Use dinkum io library (slower but more compatible). Enabled
**   by the flag -full-io
** __MEMINIT__
**   Macro defined by the linker when -meminit is used to enable runtime
**   initialization.
*/

// Setup the architecture
ARCHITECTURE(ADSP-BF533)

// Setup the search directories
SEARCH_DIR( $ADI_DSP/BLACKFIN/lib )

# if defined(USE_INSTRUCTION_CACHE) || \
     defined(USE_DATA_A_CACHE) || defined(USE_DATA_B_CACHE)
#  define USE_CACHE_PARTS 1
# else
#  define USE_CACHE_PARTS 0
#endif

#define INSTR_CACHE \
    ( defined(USE_CACHE) && \
     ( ( defined(USE_INSTRUCTION_CACHE) || !USE_CACHE_PARTS ) ) )

#define DATAA_CACHE \
    ( defined(USE_CACHE) && \
     ( ( defined(USE_DATA_A_CACHE) || defined(USE_DATA_B_CACHE) || \
         !USE_CACHE_PARTS ) ) )

#define DATAB_CACHE \
    ( defined(USE_CACHE) && \
     ( ( defined(USE_DATA_B_CACHE) || !USE_CACHE_PARTS ) ) )


/* definitions related to the placement of heap and stack */
/*
** decide if to include mappings to SDRAM or not
*/
#if !defined(USE_SDRAM) && \
    ( defined(USE_CACHE) || defined(USE_SDRAM_STACK) || \
      defined(USE_SDRAM_HEAP) )
#  define USE_SDRAM
#endif

// our default stack size is small so it can fit in scratchpad leaving space
// for other things in other memory areas
#if !defined (USE_SDRAM_STACK) && !defined (USE_L1_DATA_STACK)
#define USE_SCRATCHPAD_STACK
#endif

#ifndef USE_L1_DATA_STACK
#define USE_L1_DATA_STACK (!defined(USE_SCRATCHPAD_STACK) && !defined(USE_SDRAM_STACK))
#endif

#ifndef USE_L1_DATA_HEAP
#define USE_L1_DATA_HEAP  (!defined(USE_SCRATCHPAD_HEAP) && !defined(USE_SDRAM_HEAP))
#endif

// minimum sizes of the stack and heap allocated
#define STACK_SIZE 1K
#define HEAP_SIZE 11K
#define STACKHEAP_SIZE 12K

// Include the VDK preprocessor macros
#define VDK_LDF_
#include "VDK.h"

// Setup the VDK library preprocessor macros
#if VDK_INSTRUMENTATION_LEVEL_==2
#define VDK_IFLAG_ i
#elif VDK_INSTRUMENTATION_LEVEL_==1
#define VDK_IFLAG_ e
#else
#define VDK_IFLAG_ n
#endif

  #define VDK_LIB_NAME_MACRO_(x) vdk- ## x ## -BF532.dlb
  #define VDK_LIB_NAME_(x) VDK_LIB_NAME_MACRO_(x)
#ifdef __WORKAROUNDS_ENABLED
    #define RT_LIB_NAME(x) lib ## x ## y.dlb
    #define RT_LIB_NAME_MT(x) lib ## x ## mty.dlb
    #define RT_OBJ_NAME(x) x ## y.doj
    #define RT_OBJ_NAME_MT(x) x ## mty.doj
  #ifdef __ADI_LIBEH__
    #define RT_LIB_NAME_EH(x) lib ## x ## yx.dlb
    #define RT_LIB_NAME_EH_MT(x) lib ## x ## mtyx.dlb
  #else /* __ADI_LIBEH__ */
    #define RT_LIB_NAME_EH(x) lib ## x ## y.dlb
    #define RT_LIB_NAME_EH_MT(x) lib ## x ## mty.dlb
  #endif
#else /* __WORKAROUNDS_ENABLED */
    #define RT_LIB_NAME(x) lib ## x ## .dlb
    #define RT_LIB_NAME_MT(x) lib ## x ## mt.dlb
    #define RT_OBJ_NAME(x) x ## .doj
    #define RT_OBJ_NAME_MT(x) x ## mt.doj
  #ifdef __ADI_LIBEH__
    #define RT_LIB_NAME_EH(x) lib ## x ## x.dlb
    #define RT_LIB_NAME_EH_MT(x) lib ## x ## mtx.dlb
  #else /* __ADI_LIBEH__ */
    #define RT_LIB_NAME_EH(x) lib ## x ## .dlb
    #define RT_LIB_NAME_EH_MT(x) lib ## x ## mt.dlb
  #endif
#endif /* __WORKAROUNDS_ENABLED */

#ifdef USER_CRT 
  #define CRT USER_CRT
#else
  #define CRT RT_OBJ_NAME_MT(crtsfc532)
#endif

#if defined(USER_CPLBTAB)
   #define CPLBTAB USER_CPLBTAB 
#else
   #define CPLBTAB cplbtab533.doj
#endif

#define MEMINIT __initsbsz532.doj

$LIBRARIES = 
   RT_LIB_NAME_MT(small532)
   ,MEMINIT
#if defined(_DINKUM_IO)
   ,RT_LIB_NAME_MT(c532)         /* ANSI C (and IO) run-time library */
   ,RT_LIB_NAME_MT(io532)        /* Fast IO and host IO support      */
#else
   ,RT_LIB_NAME_MT(io532)        /* Fast IO and host IO support      */
   ,RT_LIB_NAME_MT(c532)         /* ANSI C (and IO) run-time library */
#endif
   ,RT_LIB_NAME_MT(rt_fileio532)    /* Run-time Support with File IO    */
   ,RT_LIB_NAME_MT(event532)
   ,RT_LIB_NAME_EH_MT(cpp532)
   ,RT_LIB_NAME_EH_MT(cpprt532)
   ,RT_LIB_NAME_MT(x532)
#if defined(IEEEFP)
   ,RT_LIB_NAME(sftflt532)    /* IEEE floating-point emulation    */
#endif
   ,RT_LIB_NAME(f64ieee532)   /* 64-bit floating-point support    */
   ,RT_LIB_NAME(dsp532)       /* DSP run-time library             */
#if !defined(IEEEFP)
   ,RT_LIB_NAME(sftflt532)    /* IEEE floating-point emulation    */
#endif
   ,RT_LIB_NAME(etsi532)
   ,RT_LIB_NAME(ssl532_vdk)
   ,RT_LIB_NAME(drv532)
   ,RT_OBJ_NAME_MT(idle532)
   ,RT_LIB_NAME_MT(rt_fileio532)
   ;

$BASE_LIBRARIES = $LIBRARIES;

$LIBS = TMK-BF532.dlb, VDK_LIB_NAME_(CORE), VDK_LIB_NAME_(VDK_IFLAG_), $BASE_LIBRARIES;

$OBJS = CRT, $COMMAND_LINE_OBJECTS, CPLBTAB, RT_OBJ_NAME_MT(crtn532);
$OBJS_LIBS_INTERNAL= 
        $OBJS{prefersMem("internal")},
	$LIBS{prefersMem("internal")};
$OBJS_LIBS_NOT_EXTERNAL= 
	$OBJS{!prefersMem("external")},
	$LIBS{!prefersMem("external")};
$INPUT_BY_MEM_TYPE =
	$OBJS_LIBS_INTERNAL,
	$OBJS_LIBS_NOT_EXTERNAL,
	$OBJS, 
	$LIBS;

/*
** Memory map.
**
** 0xFFE00000 - 0xFFFFFFFF  Core MMR registers (2MB)
** 0xFFC00000 - 0xFFDFFFFF  System MMR registers (2MB)
** 0xFFB01000 - 0xFFBFFFFF  Reserved
** 0xFFB00000 - 0xFFB00FFF  Scratch SRAM (4K)
** 0xFFA14000 - 0xFFAFFFFF  Reserved
** 0xFFA10000 - 0xFFA13FFF  Code SRAM / cache (16K)
** 0xFFA00000 - 0xFFA0FFFF  Code SRAM (64K)
** 0xFF908000 - 0xFF9FFFFF  Reserved
** 0xFF904000 - 0xFF907FFF  Data Bank B SRAM / cache (16K)
** 0xFF900000 - 0xFF903FFF  Data Bank B SRAM (16K)
** 0xFF808000 - 0xFF8FFFFF  Reserved
** 0xFF804000 - 0xFF807FFF  Data Bank A SRAM / cache (16K)
** 0xFF800000 - 0xFF803FFF  Data Bank A SRAM (16K)
** 0xEF000000 - 0xFF7FFFFF  Reserved
** 0x20400000 - 0xEEFFFFFF  Reserved
** 0x20300000 - 0x203FFFFF  ASYNC MEMORY BANK 3 (1MB)
** 0x20200000 - 0x202FFFFF  ASYNC MEMORY BANK 2 (1MB)
** 0x20100000 - 0x201FFFFF  ASYNC MEMORY BANK 1 (1MB)
** 0x20000000 - 0x200FFFFF  ASYNC MEMORY BANK 0 (1MB)
** 0x00000000 - 0x04000000  EZ-Kit SDRAM MEMORY (32MB)
** 0x00000000 - 0x07FFFFFF  SDRAM MEMORY (16MB - 128MB)
**
*/

// The following address ranges cannot be used for data/code that needs to be
// initialised at boot time because the boot loader uses them
// Silicon revision 0.1 0xFF900000 to 0xFF90000F 
// Silicon revision 0.2 0xFF807FE0 to 0xFF807FFF
// Silicon revisions 0.3 and 0.4 0xFF807FF0 to 0xFF807FFF
 
MEMORY
{
    mem_l1_scratch      { TYPE(RAM) START(0xFFB00000) END(0xFFB00FFF) WIDTH(8) }
    mem_l1_code         { TYPE(RAM) START(0xFFA00000) END(0xFFA0FFFF) WIDTH(8) }
    mem_l1_code_cache   { TYPE(RAM) START(0xFFA10000) END(0xFFA13FFF) WIDTH(8) }

#if DATAB_CACHE
    mem_l1_data_b       { TYPE(RAM) START(0xFF900000) END(0xFF903FFF) WIDTH(8) }
    mem_l1_data_b_cache { TYPE(RAM) START(0xFF904000) END(0xFF907FFF) WIDTH(8) }
#else
    mem_l1_data_b       { TYPE(RAM) START(0xFF900000) END(0xFF907FFF) WIDTH(8) }
#endif
#if DATAA_CACHE
    mem_l1_data_a       { TYPE(RAM) START(0xFF800000) END(0xFF803FFF) WIDTH(8) }
    mem_l1_data_a_cache { TYPE(RAM) START(0xFF804000) END(0xFF807FFF) WIDTH(8) }
#else
    mem_l1_data_a       { TYPE(RAM) START(0xFF800000) END(0xFF807FFF) WIDTH(8) }
#endif

#ifdef PARTITION_EZKIT_SDRAM
    mem_sdram0_bank0  { TYPE(RAM) START(0x00000004) END(0x007FFFFF) WIDTH(8) }
    mem_sdram0_bank1  { TYPE(RAM) START(0x00800000) END(0x00FFFFFF) WIDTH(8) }
    mem_sdram0_bank2  { TYPE(RAM) START(0x01000000) END(0x017FFFFF) WIDTH(8) }
    mem_sdram0_bank3  { TYPE(RAM) START(0x01800000) END(0x01FFFFFF) WIDTH(8) }
#else
    mem_sdram0        { TYPE(RAM) START(0x00000004) END(0x01FFFFFF) WIDTH(8) }
#endif

}


PROCESSOR p0
{
   OUTPUT( $COMMAND_LINE_OUTPUT_FILE )
   RESOLVE(start,0xFFA00000)
   KEEP(start,_main)
   KEEP(_kMaxNumThreads__3VDK)
   KEEP(_kMaxNumActiveSemaphores__3VDK)
   KEEP(_g_Sem_ThreadBaseOffset__3VDK)
   KEEP(_kMaxNumActiveDevFlags__3VDK)
   KEEP(_kMaxNumActiveMessages__3VDK)
   KEEP(_kMaxNumActiveMemoryPools__3VDK)
   KEEP(_kNumEvents__3VDK)
   KEEP(_kNumEventBits__3VDK)

    SECTIONS
    {

#if defined(__WORKAROUND_AVOID_LDF_BLOCK_BOUNDARIES) /* { */
    /* Workaround for hardware errata 05-00-0189 -
    ** "Speculative (and fetches made at boundary of reserved memory
    ** space) for instruction or data fetches may cause false
    ** protection exceptions".
    **
    ** Done by avoiding use of 76 bytes from at the end of blocks
    ** that are adjacent to reserved memory. Workaround is enabled
    ** for appropriate silicon revisions (-si-revision switch).
    */
    RESERVE(___wab0=0xFFB00FFF - 75,___l0=76) /* scratchpad */
#  if INSTR_CACHE
    RESERVE(___wab1=0xFFA0FFFF - 75,___l1=76) /* l1 instr sram */
#  else
    RESERVE(___wab2=0xFFA13FFF - 75,___l2=76) /* l1 instr sram/cache */
#  endif /* INSTR_CACHE } */
#  if DATAB_CACHE
    RESERVE(___wab3=0xFF903FFF - 75,___l3=76) /* data B sram */
#  else
    RESERVE(___wab4=0xFF907FFF - 75,___l4=76) /* data B sram/cache */
#  endif
#  if DATAA_CACHE
    RESERVE(___wab5=0xFF803FFF - 75,___l5=76) /* data A sram */
#  else
    RESERVE(___wab6=0xFF807FFF - 75,___l6=76) /* data A sram/cache */
#  endif
#  if defined(PARTITION_EZKIT_SDRAM) /* { */
    RESERVE(___wab8=0x17FFFFF - 75,___l8=76)  /*EZ-Kit sdram */
#  elif defined(USE_SDRAM)
    RESERVE(___wab9=0x1FFFFFF - 75,___l9=76)  /* sdram */
#  endif
#endif /*} __WORKAROUND_AVOID_LDF_BLOCK_BOUNDARIES */

/*
** Include avoidance of boot-loader used bytes. The workaround for errata
** 05-00-0189 may have achieved this this already in some instances.
*/
#if ((defined(__SILICON_REVISION__) && \
     (__SILICON_REVISION__ == 0xffff || __SILICON_REVISION__ == 0x1)) || \
   !defined(__SILICON_REVISION__))
    /* FF900000-0xFF90000F used by boot-loader for 0.1 silicon. */
    RESERVE(___bldr1=0xFF900000,___bldr1l=16)
#endif
#if !defined(__WORKAROUND_AVOID_LDF_BLOCK_BOUNDARIES)
#  if ((defined(__SILICON_REVISION__) && \
       (__SILICON_REVISION__ == 0xffff || __SILICON_REVISION__ == 0x2)) || \
     !defined(__SILICON_REVISION__))
      /* 0xFF807FDF-0xFF807FFF used by boot-loader for 0.2 silicon. */
      RESERVE(___bldr2=0xFF807FDF,___bldr2l=33)
#  elif ((defined(__SILICON_REVISION__) && \
         (__SILICON_REVISION__ == 0xffff || __SILICON_REVISION__ >= 0x3)) || \
       !defined(__SILICON_REVISION__))
      /* 0xFF807FEF-0xFF807FFF used by boot-loader for 0.3 and later. */
      RESERVE(___bldr3=0xFF807FEF,___bldr3l=17)