spokepov.lss

旋转16个LED灯控制程序

 254:	99 23       	and	r25, r25
 256:	f9 f4       	brne	.+62     	; 0x296 <__vector_2+0xb4>
 258:	80 91 61 00 	lds	r24, 0x0061
 25c:	8f 5f       	subi	r24, 0xFF	; 255
 25e:	80 93 61 00 	sts	0x0061, r24
 262:	80 91 61 00 	lds	r24, 0x0061
 266:	86 30       	cpi	r24, 0x06	; 6
 268:	11 f4       	brne	.+4      	; 0x26e <__vector_2+0x8c>
 26a:	90 93 61 00 	sts	0x0061, r25
 26e:	80 91 61 00 	lds	r24, 0x0061
 272:	e8 2f       	mov	r30, r24
 274:	ff 27       	eor	r31, r31
 276:	e4 5d       	subi	r30, 0xD4	; 212
 278:	ff 4f       	sbci	r31, 0xFF	; 255
 27a:	c8 95       	lpm
 27c:	80 2d       	mov	r24, r0
 27e:	80 93 62 00 	sts	0x0062, r24
 282:	80 91 61 00 	lds	r24, 0x0061
 286:	e8 2f       	mov	r30, r24
 288:	ff 27       	eor	r31, r31
 28a:	ea 5d       	subi	r30, 0xDA	; 218
 28c:	ff 4f       	sbci	r31, 0xFF	; 255
 28e:	c8 95       	lpm
 290:	80 2d       	mov	r24, r0
 292:	80 93 63 00 	sts	0x0063, r24
 296:	80 91 62 00 	lds	r24, 0x0062
 29a:	88 0f       	add	r24, r24
 29c:	88 0f       	add	r24, r24
 29e:	80 93 6e 00 	sts	0x006E, r24
 2a2:	10 92 6d 00 	sts	0x006D, r1
 2a6:	80 91 6e 00 	lds	r24, 0x006E
 2aa:	8c 5f       	subi	r24, 0xFC	; 252
 2ac:	80 93 68 00 	sts	0x0068, r24
 2b0:	84 e0       	ldi	r24, 0x04	; 4
 2b2:	80 93 67 00 	sts	0x0067, r24
 2b6:	8e b5       	in	r24, 0x2e	; 46
 2b8:	81 60       	ori	r24, 0x01	; 1
 2ba:	8e bd       	out	0x2e, r24	; 46
 2bc:	89 b7       	in	r24, 0x39	; 57
 2be:	80 64       	ori	r24, 0x40	; 64
 2c0:	89 bf       	out	0x39, r24	; 57
 2c2:	08 c0       	rjmp	.+16     	; 0x2d4 <__vector_2+0xf2>
 2c4:	8c ef       	ldi	r24, 0xFC	; 252
 2c6:	82 df       	rcall	.-252    	; 0x1cc <set_all>
 2c8:	8e b5       	in	r24, 0x2e	; 46
 2ca:	8e 7f       	andi	r24, 0xFE	; 254
 2cc:	8e bd       	out	0x2e, r24	; 46
 2ce:	80 e1       	ldi	r24, 0x10	; 16
 2d0:	80 93 60 00 	sts	0x0060, r24
 2d4:	10 92 66 00 	sts	0x0066, r1
 2d8:	10 92 65 00 	sts	0x0065, r1
 2dc:	10 92 64 00 	sts	0x0064, r1
 2e0:	ff 91       	pop	r31
 2e2:	ef 91       	pop	r30
 2e4:	bf 91       	pop	r27
 2e6:	af 91       	pop	r26
 2e8:	9f 91       	pop	r25
 2ea:	8f 91       	pop	r24
 2ec:	7f 91       	pop	r23
 2ee:	6f 91       	pop	r22
 2f0:	5f 91       	pop	r21
 2f2:	4f 91       	pop	r20
 2f4:	3f 91       	pop	r19
 2f6:	2f 91       	pop	r18
 2f8:	0f 90       	pop	r0
 2fa:	0f be       	out	0x3f, r0	; 63
 2fc:	0f 90       	pop	r0
 2fe:	1f 90       	pop	r1
 300:	18 95       	reti

00000302 <ioinit>:
 302:	83 e7       	ldi	r24, 0x73	; 115
 304:	81 bb       	out	0x11, r24	; 17
 306:	8f ed       	ldi	r24, 0xDF	; 223
 308:	87 bb       	out	0x17, r24	; 23
 30a:	80 e1       	ldi	r24, 0x10	; 16
 30c:	88 bb       	out	0x18, r24	; 24
 30e:	8c e4       	ldi	r24, 0x4C	; 76
 310:	82 bb       	out	0x12, r24	; 18
 312:	98 e0       	ldi	r25, 0x08	; 8
 314:	95 bf       	out	0x35, r25	; 53
 316:	80 ec       	ldi	r24, 0xC0	; 192
 318:	8b bf       	out	0x3b, r24	; 59
 31a:	10 be       	out	0x30, r1	; 48
 31c:	84 e0       	ldi	r24, 0x04	; 4
 31e:	83 bf       	out	0x33, r24	; 51
 320:	89 b7       	in	r24, 0x39	; 57
 322:	82 60       	ori	r24, 0x02	; 2
 324:	89 bf       	out	0x39, r24	; 57
 326:	1f bc       	out	0x2f, r1	; 47
 328:	9e bd       	out	0x2e, r25	; 46
 32a:	10 92 64 00 	sts	0x0064, r1
 32e:	10 92 66 00 	sts	0x0066, r1
 332:	10 92 65 00 	sts	0x0065, r1
 336:	85 e0       	ldi	r24, 0x05	; 5
 338:	80 93 61 00 	sts	0x0061, r24
 33c:	81 e0       	ldi	r24, 0x01	; 1
 33e:	80 93 63 00 	sts	0x0063, r24
 342:	08 95       	ret

00000344 <main>:
  
}

int main(void) {
 344:	cf ed       	ldi	r28, 0xDF	; 223
 346:	d0 e0       	ldi	r29, 0x00	; 0
 348:	de bf       	out	0x3e, r29	; 62
 34a:	cd bf       	out	0x3d, r28	; 61

  uint8_t cmd;			// the reason we reset

  // MCUSR is the MCU Status Register (page 40).  It tells us
  // why we reset, and a reset is the only way to get here.
  
  cmd = MCUSR;
 34c:	84 b7       	in	r24, 0x34	; 52
  
  // The first order of business is to tell the chip that
  // we've got things under control.
  
  MCUSR = 0;
 34e:	14 be       	out	0x34, r1	; 52
  
  // Turn on watchdog timer immediately, this protects against
  // a 'stuck' system by resetting it.
  
  // WDTCSR is the Watchdog Timer Control Register (page 45).
  // We set it so that it'll generate a watchdog interrupt
  // every second.  The idea is that if things mess up,
  // the watchdog will kickstart us.
  
  WDTCSR = _BV(WDE) | _BV(WDP2) | _BV(WDP1); // 1 second
 350:	8e e0       	ldi	r24, 0x0E	; 14
 352:	81 bd       	out	0x21, r24	; 33
  
  // Initialize the various pins of the ATMEL, and set up
  // the interrupts.
  
  ioinit();
 354:	d6 df       	rcall	.-84     	; 0x302 <ioinit>
  
  // Show that we are active.
  
  set_all(~0x01);
 356:	8e ef       	ldi	r24, 0xFE	; 254
 358:	39 df       	rcall	.-398    	; 0x1cc <set_all>

  // enable the interrupts.  I think this is not needed
  // since it'll immediately be done by the loop, below.
  
  sei();
 35a:	78 94       	sei
  
  // Loop until we timeout, at which point the ATMEL is
  // put to sleep.  If the communications routine timed
  // out, or the user pressed the button for >500ms,
  // then sensor_timer will be 0xFFFF and we'll immediately
  // sleep.
  
  // Change to for (;;) to see if it makes any difference
  
  for (;;) {
  
    // Reset the watchdog Timer.
    //
    // QUESTION: What's with toggling the PD0 output line here?
    // it doesn't seem to be connected to anything according to
    // the circuit diagram...
    
    // *** PORTD |= 0x1;
    asm("wdr");
 35c:	a8 95       	wdr
    // *** PORTD &= ~0x1;

	// If the sensor_timer (incremented by TIMER0) maxes out
	// (in about 3 minutes), then sleep everything.
	
    if (sensor_timer.bytes.high_byte == 0xFF) {
 35e:	80 91 66 00 	lds	r24, 0x0066
 362:	8f 3f       	cpi	r24, 0xFF	; 255
 364:	d9 f7       	brne	.-10     	; 0x35c <main+0x18>
      
      // Avoid pesky interruptions
      
      cli();
 366:	f8 94       	cli
      
      // Turn off all LEDs - I guess LED 0 is one of the "invisible ones"
      
      set_all(0xFF);
 368:	31 df       	rcall	.-414    	; 0x1cc <set_all>
      
      // Turn off power to the Hall Effect sensor.
      
      SENSOR_PORT &= ~_BV(SENSORPOWER);
 36a:	96 98       	cbi	0x12, 6	; 18
      
      // Deselect EEPROM
      
      SPIEE_CS_PORT |= _BV(SPIEE_CS);      // pull CS high to deselect
 36c:	c4 9a       	sbi	0x18, 4	; 24
      
      // Turn off Watchdog (must be restarted when we get the wakeup)
      // Wakeup will be via the button interrupt.
      
      WDTCSR |= _BV(WDCE) | _BV(WDE);
 36e:	81 b5       	in	r24, 0x21	; 33
 370:	88 61       	ori	r24, 0x18	; 24
 372:	81 bd       	out	0x21, r24	; 33
      WDTCSR = 0;
 374:	11 bc       	out	0x21, r1	; 33
      MCUCR |= _BV(SM1) | _BV(SM0) | _BV(SE);
 376:	85 b7       	in	r24, 0x35	; 53
 378:	80 67       	ori	r24, 0x70	; 112
 37a:	85 bf       	out	0x35, r24	; 53
      
      // Re-enable interrupts so we can get the wakeup!
      
      sei();
 37c:	78 94       	sei
     
      // Go into sleep mode
      
      asm("sleep");
 37e:	88 95       	sleep
 380:	ed cf       	rjmp	.-38     	; 0x35c <main+0x18>

00000382 <spi_transfer_n>:
// code space!

// Move n bits of data over the serial link

void spi_transfer_n(uint8_t c, uint8_t n) {
 382:	96 2f       	mov	r25, r22

  // Stuff the byte to transfer into the serial data register
  
  USIDR = c;
 384:	8f b9       	out	0x0f, r24	; 15
  
  // Set up the status register.  On each state transition of
  // the serial bus (up or down), the lower 4 bits will be
  // incremented - so twice per bit.  When that overflows,
  // the transfer is done.  So if they start out as 0, 8
  // bits get moved.  But if you start it out at a different
  // value, you can move an arbitrary number of bits
  
  USISR = _BV(USIOIF) | (16 - (n<<1));
 386:	99 0f       	add	r25, r25
 388:	80 e1       	ldi	r24, 0x10	; 16
 38a:	89 1b       	sub	r24, r25
 38c:	80 64       	ori	r24, 0x40	; 64
 38e:	8e b9       	out	0x0e, r24	; 14

  // While the transfer has not finished
  
  while ( (USISR & _BV(USIOIF)) == 0) {

    // Send out another bit
    
    USICR = _BV(USIWM0) | _BV(USICS1) | _BV(USICLK) | _BV(USITC);
 390:	76 99       	sbic	0x0e, 6	; 14
 392:	04 c0       	rjmp	.+8      	; 0x39c <spi_transfer_n+0x1a>
 394:	8b e1       	ldi	r24, 0x1B	; 27
 396:	8d b9       	out	0x0d, r24	; 13
 398:	76 9b       	sbis	0x0e, 6	; 14
 39a:	fd cf       	rjmp	.-6      	; 0x396 <spi_transfer_n+0x14>
 39c:	08 95       	ret

0000039e <spi_transfer>:
    //NOP;  // slow down so that the eeprom isnt overwhelmed

  }

}

// Move 4 bytes over the serial link (to the 1K/4K EEPROM or the
// LED shift registers, or both!).  This code does things "blind",
// clocking 16 times, to transfer the data as fast as possible.

void spi_transfer(uint8_t c) {

  USIDR = c;
 39e:	8f b9       	out	0x0f, r24	; 15
  USISR = _BV(USIOIF);
 3a0:	80 e4       	ldi	r24, 0x40	; 64
 3a2:	8e b9       	out	0x0e, r24	; 14

  while ( (USISR & _BV(USIOIF)) == 0) {

    USICR = _BV(USIWM0) | _BV(USICS1) | _BV(USICLK) | _BV(USITC);
 3a4:	76 99       	sbic	0x0e, 6	; 14
 3a6:	04 c0       	rjmp	.+8      	; 0x3b0 <spi_transfer+0x12>
 3a8:	8b e1       	ldi	r24, 0x1B	; 27
 3aa:	8d b9       	out	0x0d, r24	; 13
 3ac:	76 9b       	sbis	0x0e, 6	; 14
 3ae:	fd cf       	rjmp	.-6      	; 0x3aa <spi_transfer+0xc>
 3b0:	08 95       	ret

000003b2 <spieeprom_read>:
    //NOP;  // slow down so that the eeprom isnt overwhelmed

  }

  // The byte read, if any, will be in USIDR
  
}

void spieeprom_read(uint16_t addr, uint8_t *buff, uint8_t len) {
 3b2:	ff 92       	push	r15
 3b4:	0f 93       	push	r16
 3b6:	1f 93       	push	r17
 3b8:	cf 93       	push	r28
 3ba:	df 93       	push	r29
 3bc:	08 2f       	mov	r16, r24
 3be:	19 2f       	mov	r17, r25
 3c0:	d7 2f       	mov	r29, r23
 3c2:	c6 2f       	mov	r28, r22
 3c4:	f4 2e       	mov	r15, r20
  uint8_t i;

  SPIEE_CS_PORT &= ~_BV(SPIEE_CS); // pull CS low
 3c6:	c4 98       	cbi	0x18, 4	; 24
	...
  NOP; NOP; NOP; NOP;

  spi_transfer(SPI_EEPROM_READ);           // send READ command
 3d0:	83 e0       	ldi	r24, 0x03	; 3
 3d2:	e5 df       	rcall	.-54     	; 0x39e <spi_transfer>
  spi_transfer(addr >> 8);                 // send high addr 
 3d4:	81 2f       	mov	r24, r17
 3d6:	99 27       	eor	r25, r25
 3d8:	e2 df       	rcall	.-60     	; 0x39e <spi_transfer>
  spi_transfer(addr & 0xFF);               // send low addr
 3da:	80 2f       	mov	r24, r16
 3dc:	e0 df       	rcall	.-64     	; 0x39e <spi_transfer>

  for (i=0; i<len; i++)	{				   // read in the right number of
 3de:	00 e0       	ldi	r16, 0x00	; 0
 3e0:	0f 15       	cp	r16, r15
 3e2:	30 f4       	brcc	.+12     	; 0x3f0 <spieeprom_read+0x3e>
    spi_transfer(0);					   // bits, then move to buff[]
 3e4:	80 e0       	ldi	r24, 0x00	; 0
 3e6:	db df       	rcall	.-74     	; 0x39e <spi_transfer>
    buff[i] = USIDR;
 3e8:	8f b1       	in	r24, 0x0f	; 15
 3ea:	89 93       	st	Y+, r24
 3ec:	0f 5f       	subi	r16, 0xFF	; 255
 3ee:	f8 cf       	rjmp	.-16     	; 0x3e0 <spieeprom_read+0x2e>
  }

  SPIEE_CS_PORT |= _BV(SPIEE_CS);      // pull CS high
 3f0:	c4 9a       	sbi	0x18, 4	; 24
 3f2:	df 91       	pop	r29
 3f4:	cf 91       	pop	r28
 3f6:	1f 91       	pop	r17
 3f8:	0f 91       	pop	r16
 3fa:	ff 90       	pop	r15
 3fc:	08 95       	ret