stm32f10x_tim1.h

STM32下做的usb转RS232程序

/* TIM1 Output Compare N Idle State -----------------------------------------*/
#define TIM1_OCNIdleState_Set              ((u16)0x0001)
#define TIM1_OCNIdleState_Reset            ((u16)0x0000)

#define IS_TIM1_OCNIDLE_STATE(STATE) ((STATE == TIM1_OCNIdleState_Set) || \
                                      (STATE == TIM1_OCNIdleState_Reset))

/* TIM1 Input Capture Polarity ----------------------------------------------*/
#define  TIM1_ICPolarity_Rising            ((u16)0x0000)
#define  TIM1_ICPolarity_Falling           ((u16)0x0001)

#define IS_TIM1_IC_POLARITY(POLARITY) ((POLARITY == TIM1_ICPolarity_Rising) || \
                                       (POLARITY == TIM1_ICPolarity_Falling))

/* TIM1 Input Capture Selection ---------------------------------------------*/
#define TIM1_ICSelection_DirectTI          ((u16)0x0001)
#define TIM1_ICSelection_IndirectTI        ((u16)0x0002)
#define TIM1_ICSelection_TRC               ((u16)0x0003)

#define IS_TIM1_IC_SELECTION(SELECTION) ((SELECTION == TIM1_ICSelection_DirectTI) || \
                                         (SELECTION == TIM1_ICSelection_IndirectTI) || \
                                         (SELECTION == TIM1_ICSelection_TRC))

/* TIM1 Input Capture Prescaler ---------------------------------------------*/
#define TIM1_ICPSC_DIV1                    ((u16)0x0000)
#define TIM1_ICPSC_DIV2                    ((u16)0x0004)
#define TIM1_ICPSC_DIV4                    ((u16)0x0008)
#define TIM1_ICPSC_DIV8                    ((u16)0x000C)

#define IS_TIM1_IC_PRESCALER(PRESCALER) ((PRESCALER == TIM1_ICPSC_DIV1) || \
                                         (PRESCALER == TIM1_ICPSC_DIV2) || \
                                         (PRESCALER == TIM1_ICPSC_DIV4) || \
                                         (PRESCALER == TIM1_ICPSC_DIV8))
                                         
/* TIM1 Input Capture Filer Value ---------------------------------------------*/
#define IS_TIM1_IC_FILTER(ICFILTER) (ICFILTER <= 0xF)                                              

/* TIM1 interrupt sources ---------------------------------------------------*/
#define TIM1_IT_Update                     ((u16)0x0001)
#define TIM1_IT_CC1                        ((u16)0x0002)
#define TIM1_IT_CC2                        ((u16)0x0004)
#define TIM1_IT_CC3                        ((u16)0x0008)
#define TIM1_IT_CC4                        ((u16)0x0010)
#define TIM1_IT_COM                        ((u16)0x0020)
#define TIM1_IT_Trigger                    ((u16)0x0040)
#define TIM1_IT_Break                      ((u16)0x0080)

#define IS_TIM1_IT(IT) (((IT & (u16)0xFF00) == 0x0000) && (IT != 0x0000))

#define IS_TIM1_GET_IT(IT) ((IT == TIM1_IT_Update) || \
                            (IT == TIM1_IT_CC1) || \
                            (IT == TIM1_IT_CC2) || \
                            (IT == TIM1_IT_CC3) || \
                            (IT == TIM1_IT_CC4) || \
                            (IT == TIM1_IT_COM) || \
                            (IT == TIM1_IT_Trigger) || \
                            (IT == TIM1_IT_Break))

/* TIM1 DMA Base address ----------------------------------------------------*/
#define TIM1_DMABase_CR1                   ((u16)0x0000)
#define TIM1_DMABase_CR2                   ((u16)0x0001)
#define TIM1_DMABase_SMCR                  ((u16)0x0002)
#define TIM1_DMABase_DIER                  ((u16)0x0003)
#define TIM1_DMABase_SR                    ((u16)0x0004)
#define TIM1_DMABase_EGR                   ((u16)0x0005)
#define TIM1_DMABase_CCMR1                 ((u16)0x0006)
#define TIM1_DMABase_CCMR2                 ((u16)0x0007)
#define TIM1_DMABase_CCER                  ((u16)0x0008)
#define TIM1_DMABase_CNT                   ((u16)0x0009)
#define TIM1_DMABase_PSC                   ((u16)0x000A)
#define TIM1_DMABase_ARR                   ((u16)0x000B)
#define TIM1_DMABase_RCR                   ((u16)0x000C)
#define TIM1_DMABase_CCR1                  ((u16)0x000D)
#define TIM1_DMABase_CCR2                  ((u16)0x000E)
#define TIM1_DMABase_CCR3                  ((u16)0x000F)
#define TIM1_DMABase_CCR4                  ((u16)0x0010)
#define TIM1_DMABase_BDTR                  ((u16)0x0011)
#define TIM1_DMABase_DCR                   ((u16)0x0012)

#define IS_TIM1_DMA_BASE(BASE) ((BASE == TIM1_DMABase_CR1) || \
                                (BASE == TIM1_DMABase_CR2) || \
                                (BASE == TIM1_DMABase_SMCR) || \
                                (BASE == TIM1_DMABase_DIER) || \
                                (BASE == TIM1_DMABase_SR) || \
                                (BASE == TIM1_DMABase_EGR) || \
                                (BASE == TIM1_DMABase_CCMR1) || \
                                (BASE == TIM1_DMABase_CCMR2) || \
                                (BASE == TIM1_DMABase_CCER) || \
                                (BASE == TIM1_DMABase_CNT) || \
                                (BASE == TIM1_DMABase_PSC) || \
                                (BASE == TIM1_DMABase_ARR) || \
                                (BASE == TIM1_DMABase_RCR) || \
                                (BASE == TIM1_DMABase_CCR1) || \
                                (BASE == TIM1_DMABase_CCR2) || \
                                (BASE == TIM1_DMABase_CCR3) || \
                                (BASE == TIM1_DMABase_CCR4) || \
                                (BASE == TIM1_DMABase_BDTR) || \
                                (BASE == TIM1_DMABase_DCR))

/* TIM1 DMA Burst Length ----------------------------------------------------*/
#define TIM1_DMABurstLength_1Byte          ((u16)0x0000)
#define TIM1_DMABurstLength_2Bytes         ((u16)0x0100)
#define TIM1_DMABurstLength_3Bytes         ((u16)0x0200)
#define TIM1_DMABurstLength_4Bytes         ((u16)0x0300)
#define TIM1_DMABurstLength_5Bytes         ((u16)0x0400)
#define TIM1_DMABurstLength_6Bytes         ((u16)0x0500)
#define TIM1_DMABurstLength_7Bytes         ((u16)0x0600)
#define TIM1_DMABurstLength_8Bytes         ((u16)0x0700)
#define TIM1_DMABurstLength_9Bytes         ((u16)0x0800)
#define TIM1_DMABurstLength_10Bytes        ((u16)0x0900)
#define TIM1_DMABurstLength_11Bytes        ((u16)0x0A00)
#define TIM1_DMABurstLength_12Bytes        ((u16)0x0B00)
#define TIM1_DMABurstLength_13Bytes        ((u16)0x0C00)
#define TIM1_DMABurstLength_14Bytes        ((u16)0x0D00)
#define TIM1_DMABurstLength_15Bytes        ((u16)0x0E00)
#define TIM1_DMABurstLength_16Bytes        ((u16)0x0F00)
#define TIM1_DMABurstLength_17Bytes        ((u16)0x1000)
#define TIM1_DMABurstLength_18Bytes        ((u16)0x1100)

#define IS_TIM1_DMA_LENGTH(LENGTH) ((LENGTH == TIM1_DMABurstLength_1Byte) || \
                                    (LENGTH == TIM1_DMABurstLength_2Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_3Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_4Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_5Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_6Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_7Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_8Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_9Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_10Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_11Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_12Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_13Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_14Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_15Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_16Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_17Bytes) || \
                                    (LENGTH == TIM1_DMABurstLength_18Bytes))

/* TIM1 DMA sources ---------------------------------------------------------*/
#define TIM1_DMA_Update                    ((u16)0x0100)
#define TIM1_DMA_CC1                       ((u16)0x0200)
#define TIM1_DMA_CC2                       ((u16)0x0400)
#define TIM1_DMA_CC3                       ((u16)0x0800)
#define TIM1_DMA_CC4                       ((u16)0x1000)
#define TIM1_DMA_COM                       ((u16)0x2000)
#define TIM1_DMA_Trigger                   ((u16)0x4000)

#define IS_TIM1_DMA_SOURCE(SOURCE) (((SOURCE & (u16)0x80FF) == 0x0000) && (SOURCE != 0x0000))

/* TIM1 External Trigger Prescaler ------------------------------------------*/
#define TIM1_ExtTRGPSC_OFF                 ((u16)0x0000)
#define TIM1_ExtTRGPSC_DIV2                ((u16)0x1000)
#define TIM1_ExtTRGPSC_DIV4                ((u16)0x2000)
#define TIM1_ExtTRGPSC_DIV8                ((u16)0x3000)

#define IS_TIM1_EXT_PRESCALER(PRESCALER) ((PRESCALER == TIM1_ExtTRGPSC_OFF) || \
                                          (PRESCALER == TIM1_ExtTRGPSC_DIV2) || \
                                          (PRESCALER == TIM1_ExtTRGPSC_DIV4) || \
                                          (PRESCALER == TIM1_ExtTRGPSC_DIV8))

/* TIM1 Internal Trigger Selection ------------------------------------------*/
#define TIM1_TS_ITR0                       ((u16)0x0000)
#define TIM1_TS_ITR1                       ((u16)0x0010)
#define TIM1_TS_ITR2                       ((u16)0x0020)
#define TIM1_TS_ITR3                       ((u16)0x0030)
#define TIM1_TS_TI1F_ED	                   ((u16)0x0040)
#define TIM1_TS_TI1FP1                     ((u16)0x0050)
#define TIM1_TS_TI2FP2                     ((u16)0x0060)
#define TIM1_TS_ETRF                       ((u16)0x0070)

#define IS_TIM1_TRIGGER_SELECTION(SELECTION) ((SELECTION == TIM1_TS_ITR0) || \
                                              (SELECTION == TIM1_TS_ITR1) || \
                                              (SELECTION == TIM1_TS_ITR2) || \
                                              (SELECTION == TIM1_TS_ITR3) || \
                                              (SELECTION == TIM1_TS_TI1F_ED) || \
                                              (SELECTION == TIM1_TS_TI1FP1) || \
                                              (SELECTION == TIM1_TS_TI2FP2) || \
                                              (SELECTION == TIM1_TS_ETRF))

#define IS_TIM1_INTERNAL_TRIGGER_SELECTION(SELECTION) ((SELECTION == TIM1_TS_ITR0) || \
                                                       (SELECTION == TIM1_TS_ITR1) || \
                                                       (SELECTION == TIM1_TS_ITR2) || \
                                                       (SELECTION == TIM1_TS_ITR3))

#define IS_TIM1_TIX_TRIGGER_SELECTION(SELECTION) ((SELECTION == TIM1_TS_TI1F_ED) || \
                                                  (SELECTION == TIM1_TS_TI1FP1) || \
                                                  (SELECTION == TIM1_TS_TI2FP2))

/* TIM1 External Trigger Polarity -------------------------------------------*/
#define TIM1_ExtTRGPolarity_Inverted       ((u16)0x8000)
#define TIM1_ExtTRGPolarity_NonInverted    ((u16)0x0000)

#define IS_TIM1_EXT_POLARITY(POLARITY) ((POLARITY == TIM1_ExtTRGPolarity_Inverted) || \
                                        (POLARITY == TIM1_ExtTRGPolarity_NonInverted))

/* TIM1 Prescaler Reload Mode -----------------------------------------------*/
#define TIM1_PSCReloadMode_Update          ((u16)0x0000)
#define TIM1_PSCReloadMode_Immediate       ((u16)0x0001)

#define IS_TIM1_PRESCALER_RELOAD(RELOAD) ((RELOAD == TIM1_PSCReloadMode_Update) || \
                                          (RELOAD == TIM1_PSCReloadMode_Immediate))

/* TIM1 Forced Action -------------------------------------------------------*/
#define TIM1_ForcedAction_Active           ((u16)0x0050)
#define TIM1_ForcedAction_InActive         ((u16)0x0040)

#define IS_TIM1_FORCED_ACTION(ACTION) ((ACTION == TIM1_ForcedAction_Active) || \
                                       (ACTION == TIM1_ForcedAction_InActive))

/* TIM1 Encoder Mode --------------------------------------------------------*/ 
#define TIM1_EncoderMode_TI1               ((u16)0x0001)
#define TIM1_EncoderMode_TI2               ((u16)0x0002)
#define TIM1_EncoderMode_TI12              ((u16)0x0003)

#define IS_TIM1_ENCODER_MODE(MODE) ((MODE == TIM1_EncoderMode_TI1) || \
                                    (MODE == TIM1_EncoderMode_TI2) || \
                                    (MODE == TIM1_EncoderMode_TI12))