📄 24c04test.lst
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377 // - The maximum SCL clock rate will be ~1/3 the Timer1 overflow rate
378 // - Timer1 enabled
379 //
380 void Timer1_Init (void)
381 {
382 1 CKCON &= ~0x0B; // Timer1 clock source = SYSCLK / 12
383 1 TMOD = 0x20; // Timer1 in 8-bit auto-reload mode
384 1
385 1 TH1 = -(SYSCLK/SMB_FREQUENCY/12/3); // Timer1 configured to overflow at 1/3
386 1 // the rate defined by SMB_FREQUENCY
387 1
388 1 TL1 = -(SYSCLK/SMB_FREQUENCY/12/3); // Timer1 preloaded to overflow at 1/3
389 1 // the rate defined by SMB_FREQUENCY
390 1
391 1 TR1 = 1; // Timer1 enabled
392 1 }
393
394 //------------------------------------------------------------------------------------
395 // PORT1_Init
396 //------------------------------------------------------------------------------------
397 //
398
399 void Port1_Init (void)
400 {
401 1 P0SKIP = 0xFF;
402 1 P1SKIP = 0x01;
403 1 XBR0 = 0x04;
404 1 XBR1 = 0x40; // Enable crossbar and weak pull-ups
405 1
406 1 P0MDOUT = 0x00; // All P0 pins open-drain output
407 1 P1MDOUT = 0x00;
408 1 P0 = 0xFF;
409 1 P1 = 0xFF;
410 1 }
411
412 //------------------------------------------------------------------------------------
413 // SMBus Interrupt Service Routine (ISR)
414 //------------------------------------------------------------------------------------
415 //
416 // SMBus ISR state machine
417 // - Master only implementation - no slave or arbitration states defined
418 // - All incoming data is written starting at the global pointer <pSMB_DATA_IN>
419 // - All outgoing data is read from the global pointer <pSMB_DATA_OUT>
420 //
421 void SMBus_ISR (void) interrupt 7
422 {
423 1 bit FAIL = 0; // Used by the ISR to flag failed
424 1 // transfers
C51 COMPILER V8.08 24C04TEST 01/04/2008 11:11:58 PAGE 8
425 1
426 1 static char i; // Used by the ISR to count the
427 1 // number of data bytes sent or
428 1 // received
429 1
430 1 static bit SEND_START = 0; // Send a start
431 1
432 1 switch (SMB0CN & 0xF0) // Status vector
433 1 {
434 2 // Master Transmitter/Receiver: START condition transmitted.
435 2 case SMB_MTSTA:
436 2 SMB0DAT = TARGET; // Load address of the target slave
437 2 SMB0DAT |= SMB_RW; // Load R/W bit
438 2 STA = 0; // Manually clear START bit
439 2 i = 0;
440 2 _nop_(); // reset data byte counter
441 2 break;
442 2
443 2 // Master Transmitter: Data byte (or Slave Address) transmitted
444 2 case SMB_MTDB:
445 2 if (ACK) // Slave Address or Data Byte
446 2 { // Acknowledged?
447 3 if (SEND_START)
448 3 {
449 4 STA = 1;
450 4 SEND_START = 0;
451 4 break;
452 4 }
453 3 if(SMB_SENDWORDADDR) // Are we sending the word address?
454 3 {
455 4 SMB_SENDWORDADDR = 0; // Clear flag
456 4 SMB0DAT = WORD_ADDR; // send word address
457 4
458 4 if (SMB_RANDOMREAD)
459 4 {
460 5 SEND_START = 1; // send a START after the next ACK cycle
461 5 SMB_RW = READ;
462 5 }
463 4
464 4 break;
465 4 }
466 3
467 3 if (SMB_RW==WRITE) // Is this transfer a WRITE?
468 3 {
469 4
470 4 if (i < SMB_DATA_LEN) // Is there data to send?
471 4 {
472 5 SMB0DAT = *pSMB_DATA_OUT; // send data byte
473 5 pSMB_DATA_OUT++; // increment data out pointer
474 5 i++; // increment number of bytes sent
475 5 }
476 4 else
477 4 {
478 5 STO = 1; // set STO to terminte transfer
479 5 SMB_BUSY = 0; // clear software busy flag
480 5 }
481 4 }
482 3 else {} // If this transfer is a READ,
483 3 // then take no action. Slave
484 3 // address was transmitted. A
485 3 // separate 'case' is defined
486 3 // for data byte recieved.
C51 COMPILER V8.08 24C04TEST 01/04/2008 11:11:58 PAGE 9
487 3 }
488 2 else // If slave NACK,
489 2 {
490 3 if(SMB_ACKPOLL)
491 3 {
492 4 STA = 1; // Restart transfer
493 4 }
494 3 else
495 3 {
496 4 FAIL = 1; // Indicate failed transfer
497 4 } // and handle at end of ISR
498 3 }
499 2 break;
500 2
501 2 // Master Receiver: byte received
502 2 case SMB_MRDB:
503 2 if ( i < SMB_DATA_LEN ) // Is there any data remaining?
504 2 {
505 3 *pSMB_DATA_IN = SMB0DAT; // Store received byte
506 3 pSMB_DATA_IN++; // Increment data in pointer
507 3 i++; // Increment number of bytes received
508 3 ACK = 1; // Set ACK bit (may be cleared later
509 3 // in the code)
510 3
511 3 }
512 2
513 2 if (i == SMB_DATA_LEN) // This is the last byte
514 2 {
515 3 SMB_BUSY = 0; // Free SMBus interface
516 3 ACK = 0; // Send NACK to indicate last byte
517 3 // of this transfer
518 3 STO = 1; // Send STOP to terminate transfer
519 3 }
520 2
521 2 break;
522 2
523 2 default:
524 2 FAIL = 1; // Indicate failed transfer
525 2 // and handle at end of ISR
526 2 break;
527 2 }
528 1
529 1 if (FAIL) // If the transfer failed,
530 1 {
531 2 SMB0CN &= ~0x40; // Reset communication
532 2 SMB0CN |= 0x40;
533 2 SMB_BUSY = 0; // Free SMBus
534 2 }
535 1
536 1 SI=0; // clear interrupt flag
537 1 }
538
539 //------------------------------------------------------------------------------------
540 // Timer3 Interrupt Service Routine (ISR)
541 //------------------------------------------------------------------------------------
542 //
543 // A Timer3 interrupt indicates an SMBus SCL low timeout.
544 // The SMBus is disabled and re-enabled here
545 //
546 void Timer3_ISR (void) interrupt 14
547 {
548 1 SMB0CN &= ~0x40; // Disable SMBus
C51 COMPILER V8.08 24C04TEST 01/04/2008 11:11:58 PAGE 10
549 1 SMB0CN |= 0x40; // Re-enable SMBus
550 1 TMR3CN &= ~0x80; // Clear Timer3 interrupt-pending flag
551 1
552 1
553 1 }
MODULE INFORMATION: STATIC OVERLAYABLE
CODE SIZE = 619 ----
CONSTANT SIZE = 16 ----
XDATA SIZE = 16 ----
PDATA SIZE = ---- ----
DATA SIZE = 17 35
IDATA SIZE = ---- ----
BIT SIZE = 6 1
END OF MODULE INFORMATION.
C51 COMPILATION COMPLETE. 3 WARNING(S), 0 ERROR(S)
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