📄 24c04test.lst
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183 1 TARGET = EEPROM_ADDR; // Set target slave address
184 1 SMB_RW = WRITE; // Mark next transfer as a write
185 1 SMB_SENDWORDADDR = 1; // Send Word Address after Slave Address
186 1 SMB_RANDOMREAD = 0; // Do not send a START signal after
187 1 // the word address
188 1 SMB_ACKPOLL = 1; // Enable Acknowledge Polling (The ISR
189 1 // will automatically restart the
190 1 // transfer if the slave does not
191 1 // acknowledge its address.
192 1
193 1 // Specify the Outgoing Data
194 1 WORD_ADDR = addr; // Set the target address in the EEPROM's
195 1 // internal memory space
196 1
197 1 SMB_SINGLEBYTE_OUT = dat; // store dat (local variable) in a global
198 1 // variable so the ISR can read it after
199 1 // this function exits
200 1
201 1 pSMB_DATA_OUT = &SMB_SINGLEBYTE_OUT; // The outgoing data pointer points to
202 1 // the <dat> variable.
203 1
204 1 SMB_DATA_LEN = 1; // Specify to ISR that the next transfer
205 1 // will contain one data byte
206 1
207 1 // Initiate SMBus Transfer
208 1 STA = 1;
209 1
210 1 }
211
212
213
214 //------------------------------------------------------------------------------------
215 // EEPROM_ByteRead ()
216 //------------------------------------------------------------------------------------
217 //
218 // This function returns a single byte from location <addr> in the EEPROM then
219 // polls the <SMB_BUSY> flag until the read is complete.
220 //
221 unsigned char EEPROM_ByteRead( unsigned char addr)
222 {
223 1 // unsigned char retval; // Holds the return value
224 1
225 1 while (SMB_BUSY); // Wait for SMBus to be free.
226 1 SMB_BUSY = 1; // Claim SMBus (set to busy)
227 1
228 1 // Set SMBus ISR parameters
229 1 TARGET = EEPROM_ADDR; // Set target slave address
230 1 SMB_RW = WRITE; // A random read starts as a write
231 1 // then changes to a read after
232 1 // the repeated start is sent. The
233 1 // ISR handles this switchover if
234 1 // the <SMB_RANDOMREAD> bit is set.
235 1 SMB_SENDWORDADDR = 1; // Send Word Address after Slave Address
236 1 SMB_RANDOMREAD = 1; // Send a START after the word address
237 1 SMB_ACKPOLL = 1; // Enable Acknowledge Polling
238 1
C51 COMPILER V8.08 24C04TEST 01/04/2008 11:11:58 PAGE 5
239 1
240 1 // Specify the Incoming Data
241 1 WORD_ADDR = addr; // Set the target address in the EEPROM's
242 1 // internal memory space
243 1
244 1 pSMB_DATA_IN = &retval; // The incoming data pointer points to
245 1 // the <retval> variable.
246 1
247 1 SMB_DATA_LEN = 1; // Specify to ISR that the next transfer
248 1 // will contain one data byte
249 1
250 1 // Initiate SMBus Transfer
251 1 STA = 1;
252 1 while(SMB_BUSY); // Wait until data is read
253 1
254 1 return retval;
255 1
256 1 }
257 //------------------------------------------------------------------------------------
258 // EEPROM_WriteArray ()
259 //------------------------------------------------------------------------------------
260 // Writes <len> data bytes to the EEPROM slave specified by the <EEPROM_ADDR>
261 // constant.
262 //
263 void EEPROM_WriteArray (unsigned char dest_addr, unsigned char* src_addr,
264 unsigned char len)
265 {
266 1 unsigned char i;
267 1 unsigned char* pData = (unsigned char*) src_addr;
268 1
269 1
270 1
271 1 for( i = 0; i < len; i++ ){
272 2 EEPROM_ByteWrite(dest_addr++, *pData++);
273 2 }
274 1
275 1 }
276 //------------------------------------------------------------------------------------
277 //------------------------------------------------------------------------------------
278 // EEPROM_ReadArray ()
279 //------------------------------------------------------------------------------------
280 // Reads up to 256 data bytes from the EEPROM slave specified by the <EEPROM_ADDR>
281 // constant.
282 //
283 void EEPROM_ReadArray (unsigned char* dest_addr, unsigned char src_addr,
284 unsigned char len)
285 {
286 1 while (SMB_BUSY); // Wait for SMBus to be free.
287 1 SMB_BUSY = 1; // Claim SMBus (set to busy)
288 1
289 1 // Set SMBus ISR parameters
290 1 TARGET = EEPROM_ADDR; // Set target slave address
291 1 SMB_RW = WRITE; // A random read starts as a write
292 1 // then changes to a read after
293 1 // the repeated start is sent. The
294 1 // ISR handles this switchover if
295 1 // the <SMB_RANDOMREAD> bit is set.
296 1 SMB_SENDWORDADDR = 1; // Send Word Address after Slave Address
297 1 SMB_RANDOMREAD = 1; // Send a START after the word address
298 1 SMB_ACKPOLL = 1; // Enable Acknowledge Polling
299 1
300 1 // Specify the Incoming Data
C51 COMPILER V8.08 24C04TEST 01/04/2008 11:11:58 PAGE 6
301 1 WORD_ADDR = src_addr; // Set the target address in the EEPROM's
302 1 // internal memory space
303 1
304 1 pSMB_DATA_IN = (unsigned char*) dest_addr;// Set the the incoming data pointer
305 1
306 1
307 1 SMB_DATA_LEN = len; // Specify to ISR that the next transfer
308 1 // will contain <len> data bytes
309 1
310 1
311 1 // Initiate SMBus Transfer
312 1 STA = 1;
313 1 while(SMB_BUSY); // Wait until data is read
314 1
315 1 }
316 //------------------------------------------------------------------------------------
317 // Initialization Routines
318 //------------------------------------------------------------------------------------
319
320 //------------------------------------------------------------------------------------
321 // SMBus_Init()
322 //------------------------------------------------------------------------------------
323 //
324 // SMBus configured as follows:
325 // - SMBus enabled
326 // - Slave mode disabled
327 // - Timer1 used as clock source. The resulting SCL frequency will be approximately
328 // 1/3 the Timer1 overflow rate
329 // - Setup and hold time extensions enabled
330 // - Free and SCL low timeout detection enabled
331 //
332 void SMBus_Init (void)
333 {
334 1 SMB0CF = 0x5D; // Use Timer1 overflows as SMBus clock
335 1 // source;
336 1 // Disable slave mode;
337 1 // Enable setup & hold time extensions;
338 1 // Enable SMBus Free timeout detect;
339 1 // Enable SCL low timeout detect;
340 1
341 1 SMB0CF |= 0x80; // Enable SMBus;
342 1 }
343
344 //------------------------------------------------------------------------------------
345 // Timer3_Init()
346 //------------------------------------------------------------------------------------
347 //
348 // Timer3 configured for use by the SMBus low timeout detect feature as follows:
349 // - Timer3 in 16-bit auto-reload mode
350 // - SYSCLK/12 as Timer3 clock source
351 // - Timer3 reload registers loaded for a 25ms overflow period
352 // - Timer3 pre-loaded to overflow after 25ms
353 // - Timer3 enabled
354 //
355 void Timer3_Init (void)
356 {
357 1 TMR3CN = 0x00; // Timer3 configured for 16-bit
358 1 // auto-reload,
359 1 // low-byte interrupt disabled
360 1
361 1 TMR3 = -(SYSCLK/12/40); // Timer3 configured to overflow after
362 1 TMR3RL = -(SYSCLK/12/40); // ~25ms (for SMBus low timeout detect)
C51 COMPILER V8.08 24C04TEST 01/04/2008 11:11:58 PAGE 7
363 1
364 1
365 1 CKCON &= ~0x40; // Timer3 uses SYSCLK/12
366 1 TMR3 |= 0x04; // Start Timer3
367 1 }
368
369 //------------------------------------------------------------------------------------
370 // Timer1_Init()
371 //------------------------------------------------------------------------------------
372 //
373 // Timer1 configured as the SMBus clock source as follows:
374 // - Timer1 in 8-bit auto-reload mode
375 // - SYSCLK / 12 as Timer1 clock source
376 // - Timer1 overflow rate => 3 * SMB_FREQUENCY
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