can_defines.v

来自「FPGA数字电子系统设计与开发实例导航(源程序)」· Verilog 代码 · 共 13 行

// Uncomment following line if you want to use WISHBONE interface. Otherwise
// 8051 interface is used.
// `define   CAN_WISHBONE_IF

// Uncomment following line if you want to use CAN in Actel APA devices (embedded memory used)
// `define   ACTEL_APA_RAM

// Uncomment following line if you want to use CAN in Xilinx devices (embedded memory used)
 `define   XILINX_RAM