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📄 tutorial2local.map

📁 介绍NRF24L01的增强型突发模式（Enhanced ShockBurst Mode）,此模式有效数据速率为2Mbps。其中文件nrf24l01.c实现增强型突发模式
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                     test   0x0023d0    program     static                          
                 vfprintf   0x00144e    program     extern C:\MCC18\src\TRADIT~1\stdclib\vfprintf.c
                   ADCON0   0x000fc2       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
               ADCON0bits   0x000fc2       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   ADCON1   0x000fc1       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
               ADCON1bits   0x000fc1       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    ADRES   0x000fc3       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   ADRESH   0x000fc4       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   ADRESL   0x000fc3       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                      BSR   0x000fe0       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                  CCP1CON   0x000fbd       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
              CCP1CONbits   0x000fbd       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                  CCP2CON   0x000fba       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
              CCP2CONbits   0x000fba       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    CCPR1   0x000fbe       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   CCPR1H   0x000fbf       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   CCPR1L   0x000fbe       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    CCPR2   0x000fbb       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   CCPR2H   0x000fbc       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   CCPR2L   0x000fbb       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     DDRA   0x000f92       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 DDRAbits   0x000f92       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     DDRB   0x000f93       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 DDRBbits   0x000f93       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     DDRC   0x000f94       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 DDRCbits   0x000f94       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     DDRD   0x000f95       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 DDRDbits   0x000f95       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     DDRE   0x000f96       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 DDREbits   0x000f96       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
            DelayCounter1   0x00001c       data     extern C:\MCC18\SRC\TRADIT~1\DELAYS\delayd1.asm
            DelayCounter2   0x00001b       data     extern C:\MCC18\SRC\TRADIT~1\DELAYS\delayd2.asm
                    EEADR   0x000fa9       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   EECON1   0x000fa6       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
               EECON1bits   0x000fa6       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   EECON2   0x000fa7       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   EEDATA   0x000fa8       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     FSR0   0x000fe9       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    FSR0H   0x000fea       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    FSR0L   0x000fe9       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     FSR1   0x000fe1       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    FSR1H   0x000fe2       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    FSR1L   0x000fe1       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     FSR2   0x000fd9       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    FSR2H   0x000fda       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    FSR2L   0x000fd9       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    INDF0   0x000fef       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    INDF1   0x000fe7       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    INDF2   0x000fdf       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   INTCON   0x000ff2       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                  INTCON2   0x000ff1       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
              INTCON2bits   0x000ff1       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                  INTCON3   0x000ff0       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
              INTCON3bits   0x000ff0       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
               INTCONbits   0x000ff2       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     IPR1   0x000f9f       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 IPR1bits   0x000f9f       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     IPR2   0x000fa2       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 IPR2bits   0x000fa2       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     LATA   0x000f89       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 LATAbits   0x000f89       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     LATB   0x000f8a       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 LATBbits   0x000f8a       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     LATC   0x000f8b       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 LATCbits   0x000f8b       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     LATD   0x000f8c       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 LATDbits   0x000f8c       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     LATE   0x000f8d       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 LATEbits   0x000f8d       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   LVDCON   0x000fd2       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
               LVDCONbits   0x000fd2       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   OSCCON   0x000fd3       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
               OSCCONbits   0x000fd3       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                       PC   0x000ff9       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                      PCL   0x000ff9       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   PCLATH   0x000ffa       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   PCLATU   0x000ffb       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     PIE1   0x000f9d       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 PIE1bits   0x000f9d       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     PIE2   0x000fa0       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 PIE2bits   0x000fa0       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     PIR1   0x000f9e       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 PIR1bits   0x000f9e       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     PIR2   0x000fa1       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 PIR2bits   0x000fa1       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   PLUSW0   0x000feb       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   PLUSW1   0x000fe3       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   PLUSW2   0x000fdb       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    PORTA   0x000f80       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                PORTAbits   0x000f80       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    PORTB   0x000f81       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                PORTBbits   0x000f81       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    PORTC   0x000f82       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                PORTCbits   0x000f82       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    PORTD   0x000f83       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                PORTDbits   0x000f83       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    PORTE   0x000f84       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                PORTEbits   0x000f84       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 POSTDEC0   0x000fed       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 POSTDEC1   0x000fe5       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 POSTDEC2   0x000fdd       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 POSTINC0   0x000fee       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 POSTINC1   0x000fe6       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 POSTINC2   0x000fde       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                      PR2   0x000fcb       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                  PREINC0   0x000fec       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                  PREINC1   0x000fe4       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                  PREINC2   0x000fdc       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     PROD   0x000ff3       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    PRODH   0x000ff4       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    PRODL   0x000ff3       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     RCON   0x000fd0       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                 RCONbits   0x000fd0       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    RCREG   0x000fae       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                    RCSTA   0x000fab       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                RCSTAbits   0x000fab       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                     SIGN   0x000000       data     extern C:\MCC18\SRC\TRADIT~1\MATH\cmath18.asm
                    SPBRG   0x000faf       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   SSPADD   0x000fc8       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
                   SSPBUF   0x000fc9       data     extern C:\MCC18\SRC\TRADIT~1\PROC\p18f452.asm
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