signal_gene.qsf

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# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		signal_gene_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name DEVICE "EP1K30TC144-3"
set_global_assignment -name FAMILY ACEX1K
set_global_assignment -name TOP_LEVEL_ENTITY signal_gene
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 7.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "00:42:43  DECEMBER 30, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION 7.0
set_global_assignment -name VERILOG_FILE datarom.v
set_global_assignment -name MIF_FILE signal_gene.mif
set_global_assignment -name VERILOG_FILE signal_gene.v
set_global_assignment -name GLITCH_DETECTION ON
set_global_assignment -name OPTIMIZE_HOLD_TIMING OFF
set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
set_global_assignment -name VECTOR_WAVEFORM_FILE signal_gene.vwf
set_location_assignment PIN_54 -to inclock
set_location_assignment PIN_72 -to q_out[7]
set_location_assignment PIN_70 -to q_out[6]
set_location_assignment PIN_69 -to q_out[5]
set_location_assignment PIN_68 -to q_out[4]
set_location_assignment PIN_67 -to q_out[3]
set_location_assignment PIN_65 -to q_out[2]
set_location_assignment PIN_42 -to q_out[1]
set_location_assignment PIN_41 -to q_out[0]
set_location_assignment PIN_8 -to i[0]
set_location_assignment PIN_9 -to i[1]
set_location_assignment PIN_10 -to i[2]
set_location_assignment PIN_12 -to i[3]
set_location_assignment PIN_18 -to control[0]
set_location_assignment PIN_19 -to control[1]
set_global_assignment -name SIGNALTAP_FILE signal_gene.stp