500-avr32.patch

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+      arg0 = TREE_VALUE (arglist);
+      arg1 = TREE_VALUE (TREE_CHAIN (arglist));
+      op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
+      op1 = expand_expr (arg1, NULL_RTX, VOIDmode, 0);
+      mode0 = insn_data[icode].operand[0].mode;
+      mode1 = insn_data[icode].operand[1].mode;
+
+      if (!(*insn_data[icode].operand[0].predicate) (op0, mode0))
+	{
+	  error ("Parameter 1 to __builtin_mtdr must be a constant number");
+	  return gen_reg_rtx (mode0);
+	}
+      if (!(*insn_data[icode].operand[1].predicate) (op1, mode1))
+	op1 = copy_to_mode_reg (mode1, op1);
+      pat = GEN_FCN (icode) (op0, op1);
+      if (!pat)
+	return 0;
+      emit_insn (pat);
+      return NULL_RTX;
+    case AVR32_BUILTIN_CACHE:
+      icode = CODE_FOR_cache;
+      arg0 = TREE_VALUE (arglist);
+      arg1 = TREE_VALUE (TREE_CHAIN (arglist));
+      op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
+      op1 = expand_expr (arg1, NULL_RTX, VOIDmode, 0);
+      mode0 = insn_data[icode].operand[0].mode;
+      mode1 = insn_data[icode].operand[1].mode;
+
+      if (!(*insn_data[icode].operand[1].predicate) (op1, mode1))
+	{
+	  error ("Parameter 2 to __builtin_cache must be a constant number");
+	  return gen_reg_rtx (mode1);
+	}
+
+      if (!(*insn_data[icode].operand[0].predicate) (op0, mode0))
+	op0 = copy_to_mode_reg (mode0, op0);
+
+      pat = GEN_FCN (icode) (op0, op1);
+      if (!pat)
+	return 0;
+      emit_insn (pat);
+      return NULL_RTX;
+    case AVR32_BUILTIN_SYNC:
+    case AVR32_BUILTIN_MUSFR:
+      {
+	const char *fname;
+	switch (fcode)
+	  {
+	  default:
+	  case AVR32_BUILTIN_SYNC:
+	    icode = CODE_FOR_sync;
+	    fname = "sync";
+	    break;
+	  case AVR32_BUILTIN_MUSFR:
+	    icode = CODE_FOR_musfr;
+	    fname = "musfr";
+	    break;
+	  }
+
+	arg0 = TREE_VALUE (arglist);
+	op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
+	mode0 = insn_data[icode].operand[0].mode;
+
+	if (!(*insn_data[icode].operand[0].predicate) (op0, mode0))
+	  {
+	    if (icode == CODE_FOR_musfr)
+	      op0 = copy_to_mode_reg (mode0, op0);
+	    else
+	      {
+		error ("Parameter to __builtin_%s is illegal.", fname);
+		return gen_reg_rtx (mode0);
+	      }
+	  }
+	pat = GEN_FCN (icode) (op0);
+	if (!pat)
+	  return 0;
+	emit_insn (pat);
+	return NULL_RTX;
+      }
+    case AVR32_BUILTIN_TLBR:
+      icode = CODE_FOR_tlbr;
+      pat = GEN_FCN (icode) (NULL_RTX);
+      if (!pat)
+	return 0;
+      emit_insn (pat);
+      return NULL_RTX;
+    case AVR32_BUILTIN_TLBS:
+      icode = CODE_FOR_tlbs;
+      pat = GEN_FCN (icode) (NULL_RTX);
+      if (!pat)
+	return 0;
+      emit_insn (pat);
+      return NULL_RTX;
+    case AVR32_BUILTIN_TLBW:
+      icode = CODE_FOR_tlbw;
+      pat = GEN_FCN (icode) (NULL_RTX);
+      if (!pat)
+	return 0;
+      emit_insn (pat);
+      return NULL_RTX;
+    case AVR32_BUILTIN_BREAKPOINT:
+      icode = CODE_FOR_breakpoint;
+      pat = GEN_FCN (icode) (NULL_RTX);
+      if (!pat)
+	return 0;
+      emit_insn (pat);
+      return NULL_RTX;
+    case AVR32_BUILTIN_XCHG:
+      icode = CODE_FOR_xchg;
+      arg0 = TREE_VALUE (arglist);
+      arg1 = TREE_VALUE (TREE_CHAIN (arglist));
+      op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
+      op1 = expand_expr (arg1, NULL_RTX, VOIDmode, 0);
+      tmode = insn_data[icode].operand[0].mode;
+      mode0 = insn_data[icode].operand[1].mode;
+      mode1 = insn_data[icode].operand[3].mode;
+
+      if (!(*insn_data[icode].operand[3].predicate) (op1, mode1))
+	{
+	  op1 = copy_to_mode_reg (mode1, op1);
+	}
+
+      if (!(*insn_data[icode].operand[2].predicate) (op0, mode0))
+	{
+	  op0 = copy_to_mode_reg (mode0, op0);
+	}
+
+      if (target == 0
+	  || GET_MODE (target) != tmode
+	  || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+	target = gen_reg_rtx (tmode);
+      pat = GEN_FCN (icode) (target, op0, op0, op1);
+      if (!pat)
+	return 0;
+      emit_insn (pat);
+      return target;
+    case AVR32_BUILTIN_LDXI:
+      icode = CODE_FOR_ldxi;
+      arg0 = TREE_VALUE (arglist);
+      arg1 = TREE_VALUE (TREE_CHAIN (arglist));
+      arg2 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist)));
+      op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
+      op1 = expand_expr (arg1, NULL_RTX, VOIDmode, 0);
+      op2 = expand_expr (arg2, NULL_RTX, VOIDmode, 0);
+      tmode = insn_data[icode].operand[0].mode;
+      mode0 = insn_data[icode].operand[1].mode;
+      mode1 = insn_data[icode].operand[2].mode;
+
+      if (!(*insn_data[icode].operand[1].predicate) (op0, mode0))
+	{
+	  op0 = copy_to_mode_reg (mode0, op0);
+	}
+
+      if (!(*insn_data[icode].operand[2].predicate) (op1, mode1))
+	{
+	  op1 = copy_to_mode_reg (mode1, op1);
+	}
+
+      if (!(*insn_data[icode].operand[3].predicate) (op2, SImode))
+	{
+	  error
+	    ("Parameter 3 to __builtin_ldxi must be a valid extract shift operand: (0|8|16|24)");
+	  return gen_reg_rtx (mode0);
+	}
+
+      if (target == 0
+	  || GET_MODE (target) != tmode
+	  || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+	target = gen_reg_rtx (tmode);
+      pat = GEN_FCN (icode) (target, op0, op1, op2);
+      if (!pat)
+	return 0;
+      emit_insn (pat);
+      return target;
+    case AVR32_BUILTIN_BSWAP16:
+      {
+	icode = CODE_FOR_bswap_16;
+	arg0 = TREE_VALUE (arglist);
+	arg0_mode = TYPE_MODE (TREE_TYPE (arg0));
+	mode0 = insn_data[icode].operand[1].mode;
+	if (arg0_mode != mode0)
+	  arg0 = build1 (NOP_EXPR,
+			 (*lang_hooks.types.type_for_mode) (mode0, 0), arg0);
+
+	op0 = expand_expr (arg0, NULL_RTX, HImode, 0);
+	tmode = insn_data[icode].operand[0].mode;
+
+
+	if (!(*insn_data[icode].operand[1].predicate) (op0, mode0))
+	  {
+	    op0 = copy_to_mode_reg (mode0, op0);
+	  }
+
+	if (target == 0
+	    || GET_MODE (target) != tmode
+	    || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+	  {
+	    target = gen_reg_rtx (tmode);
+	  }
+
+
+	pat = GEN_FCN (icode) (target, op0);
+	if (!pat)
+	  return 0;
+	emit_insn (pat);
+
+	return target;
+      }
+    case AVR32_BUILTIN_BSWAP32:
+      {
+	icode = CODE_FOR_bswap_32;
+	arg0 = TREE_VALUE (arglist);
+	op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
+	tmode = insn_data[icode].operand[0].mode;
+	mode0 = insn_data[icode].operand[1].mode;
+
+	if (!(*insn_data[icode].operand[1].predicate) (op0, mode0))
+	  {
+	    op0 = copy_to_mode_reg (mode0, op0);
+	  }
+
+	if (target == 0
+	    || GET_MODE (target) != tmode
+	    || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+	  target = gen_reg_rtx (tmode);
+
+
+	pat = GEN_FCN (icode) (target, op0);
+	if (!pat)
+	  return 0;
+	emit_insn (pat);
+
+	return target;
+      }
+    case AVR32_BUILTIN_MVCR_W:
+    case AVR32_BUILTIN_MVCR_D:
+      {
+	arg0 = TREE_VALUE (arglist);
+	arg1 = TREE_VALUE (TREE_CHAIN (arglist));
+	op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
+	op1 = expand_expr (arg1, NULL_RTX, VOIDmode, 0);
+
+	if (fcode == AVR32_BUILTIN_MVCR_W)
+	  icode = CODE_FOR_mvcrsi;
+	else
+	  icode = CODE_FOR_mvcrdi;
+
+	tmode = insn_data[icode].operand[0].mode;
+
+	if (target == 0
+	    || GET_MODE (target) != tmode
+	    || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+	  target = gen_reg_rtx (tmode);
+
+	if (!(*insn_data[icode].operand[1].predicate) (op0, SImode))
+	  {
+	    error
+	      ("Parameter 1 to __builtin_cop is not a valid coprocessor number.");
+	    error ("Number should be between 0 and 7.");
+	    return NULL_RTX;
+	  }
+
+	if (!(*insn_data[icode].operand[2].predicate) (op1, SImode))
+	  {
+	    error
+	      ("Parameter 2 to __builtin_cop is not a valid coprocessor register number.");
+	    error ("Number should be between 0 and 15.");
+	    return NULL_RTX;
+	  }
+
+	pat = GEN_FCN (icode) (target, op0, op1);
+	if (!pat)
+	  return 0;
+	emit_insn (pat);
+
+	return target;
+      }
+    case AVR32_BUILTIN_MACSATHH_W:
+    case AVR32_BUILTIN_MACWH_D:
+    case AVR32_BUILTIN_MACHH_D:
+      {
+	arg0 = TREE_VALUE (arglist);
+	arg1 = TREE_VALUE (TREE_CHAIN (arglist));
+	arg2 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist)));
+	op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
+	op1 = expand_expr (arg1, NULL_RTX, VOIDmode, 0);
+	op2 = expand_expr (arg2, NULL_RTX, VOIDmode, 0);
+
+	icode = ((fcode == AVR32_BUILTIN_MACSATHH_W) ? CODE_FOR_macsathh_w :
+		 (fcode == AVR32_BUILTIN_MACWH_D) ? CODE_FOR_macwh_d :
+		 CODE_FOR_machh_d);
+
+	tmode = insn_data[icode].operand[0].mode;
+	mode0 = insn_data[icode].operand[1].mode;
+	mode1 = insn_data[icode].operand[2].mode;
+
+
+	if (!target
+	    || GET_MODE (target) != tmode
+	    || !(*insn_data[icode].operand[0].predicate) (target, tmode))
+	  target = gen_reg_rtx (tmode);
+
+	if (!(*insn_data[icode].operand[0].predicate) (op0, tmode))
+	  {
+	    /* If op0 is already a reg we must cast it to the correct mode. */
+	    if (REG_P (op0))
+	      op0 = convert_to_mode (tmode, op0, 1);
+	    else
+	      op0 = copy_to_mode_reg (tmode, op0);
+	  }
+
+	if (!(*insn_data[icode].operand[1].predicate) (op1, mode0))
+	  {
+	    /* If op1 is already a reg we must cast it to the correct mode. */
+	    if (REG_P (op1))
+	      op1 = convert_to_mode (mode0, op1, 1);
+	    else
+	      op1 = copy_to_mode_reg (mode0, op1);
+	  }
+
+	if (!(*insn_data[icode].operand[2].predicate) (op2, mode1))
+	  {
+	    /* If op1 is already a reg we must cast it to the correct mode. */
+	    if (REG_P (op2))
+	      op2 = convert_to_mode (mode1, op2, 1);
+	    else
+	      op2 = copy_to_mode_reg (mode1, op2);
+	  }
+
+	emit_move_insn (target, op0);
+
+	pat = GEN_FCN (icode) (target, op1, op2);
+	if (!pat)
+	  return 0;
+	emit_insn (pat);
+	return target;
+      }
+    case AVR32_BUILTIN_MVRC_W:
+    case AVR32_BUILTIN_MVRC_D:
+      {
+	arg0 = TREE_VALUE (arglist);
+	arg1 = TREE_VALUE (TREE_CHAIN (arglist));
+	arg2 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist)));
+	op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
+	op1 = expand_expr (arg1, NULL_RTX, VOIDmode, 0);
+	op2 = expand_expr (arg2, NULL_RTX, VOIDmode, 0);
+
+	if (fcode == AVR32_BUILTIN_MVRC_W)
+	  icode = CODE_FOR_mvrcsi;
+	else
+	  icode = CODE_FOR_mvrcdi;
+
+	if (!(*insn_data[icode].operand[0].predicate) (op0, SImode))
+	  {
+	    error ("Parameter 1 is not a valid coprocessor number.");
+	    error ("Number should be between 0 and 7.");
+	    return NULL_RTX;
+	  }
+
+	if (!(*insn_data[icode].operand[1].predicate) (op1, SImode))
+	  {
+	    error ("Parameter 2 is not a valid coprocessor register number.");
+	    error ("Number should be between 0 and 15.");
+	    return NULL_RTX;
+	  }
+
+	if (GET_CODE (op2) == CONST_INT
+	    || GET_CODE (op2) == CONST
+	    || GET_CODE (op2) == SYMBOL_REF || GET_CODE (op2) == LABEL_REF)
+	  {
+	    op2 = force_const_mem (insn_data[icode].operand[2].mode, op2);
+	  }
+
+	if (!(*insn_data[icode].operand[2].predicate) (op2, GET_MODE (op2)))
+	  op2 = copy_to_mode_reg (insn_data[icode].operand[2].mode, op2);
+
+
+	pat = GEN_FCN (icode) (op0, op1, op2);
+	if (!pat)
+	  return 0;
+	emit_insn (pat);
+
+	return NULL_RTX;
+      }
+    case AVR32_BUILTIN_COP:
+      {
+	rtx op3, op4;
+	tree arg3, arg4;
+	icode = CODE_FOR_cop;
+	arg0 = TREE_VALUE (arglist);
+	arg1 = TREE_VALUE (TREE_CHAIN (arglist));
+	arg2 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (arglist)));
+	arg3 = TREE_VALUE (TREE_CHAIN (TREE_CHAIN (TREE_CHAIN (arglist))));
+	arg4 =
+	  TREE_VALUE (TREE_CHAIN
+		      (TREE_CHAIN (TREE_CHAIN (TREE_CHAIN (arglist)))));
+	op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
+	op1 = expand_expr (arg1, NULL_RTX, VOIDmode, 0);
+	op2 = expand_expr (arg2, NULL_RTX, VOIDmode, 0);
+	op3 = expand_expr (arg3, NULL_RTX, VOIDmode, 0);
+	op4 = expand_expr (arg4, NULL_RTX, VOIDmode, 0);
+
+	if (!(*insn_data[icode].operand[0].predicate) (op0, SImode))
+	  {
+	    error
+	      ("Parameter 1 to __builtin_cop is not a valid coprocessor number.");
+	    error ("Number should be between 0 and 7.");
+	    return NULL_RTX;
+	  }
+
+	if (!(*insn_data[icode].operand[1].predicate) (op1, SImode))
+	  {
+	    error
+	      ("Parameter 2 to __builtin_cop is not a valid coprocessor register number.");
+	    error ("Number should be between 0 and 15.");