📄 500-avr32.patch
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diff -Nur gcc-4.1.2/config.sub gcc-4.1.2-owrt/config.sub--- gcc-4.1.2/config.sub 2005-12-16 13:57:40.000000000 +0100+++ gcc-4.1.2-owrt/config.sub 2007-05-24 12:03:28.000000000 +0200@@ -239,7 +239,7 @@ | alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \ | alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \ | am33_2.0 \- | arc | arm | arm[bl]e | arme[lb] | armv[2345] | armv[345][lb] | avr \+ | arc | arm | arm[bl]e | arme[lb] | armv[2345] | armv[345][lb] | avr | avr32 \ | bfin \ | c4x | clipper \ | d10v | d30v | dlx | dsp16xx \@@ -316,7 +316,7 @@ | alpha64-* | alpha64ev[4-8]-* | alpha64ev56-* | alpha64ev6[78]-* \ | alphapca5[67]-* | alpha64pca5[67]-* | arc-* \ | arm-* | armbe-* | armle-* | armeb-* | armv*-* \- | avr-* \+ | avr-* | avr32-* \ | bfin-* | bs2000-* \ | c[123]* | c30-* | [cjt]90-* | c4x-* | c54x-* | c55x-* | c6x-* \ | clipper-* | craynv-* | cydra-* \diff -Nur gcc-4.1.2/configure.in gcc-4.1.2-owrt/configure.in--- gcc-4.1.2/configure.in 2006-11-21 18:48:36.000000000 +0100+++ gcc-4.1.2-owrt/configure.in 2007-05-24 12:03:28.000000000 +0200@@ -497,6 +497,9 @@ arm-*-riscix*) noconfigdirs="$noconfigdirs ld target-libgloss ${libgcj}" ;;+ avr32-*-*)+ noconfigdirs="$noconfigdirs target-libiberty target-libmudflap target-libffi ${libgcj}"+ ;; avr-*-*) noconfigdirs="$noconfigdirs target-libiberty target-libstdc++-v3 ${libgcj}" ;;diff -Nur gcc-4.1.2/gcc/builtins.c gcc-4.1.2-owrt/gcc/builtins.c--- gcc-4.1.2/gcc/builtins.c 2006-10-06 19:06:52.000000000 +0200+++ gcc-4.1.2-owrt/gcc/builtins.c 2007-05-24 12:03:28.000000000 +0200@@ -9228,7 +9228,7 @@ do {- code = va_arg (ap, enum tree_code);+ code = va_arg (ap, int); switch (code) { case 0:diff -Nur gcc-4.1.2/gcc/calls.c gcc-4.1.2-owrt/gcc/calls.c--- gcc-4.1.2/gcc/calls.c 2007-01-29 18:08:31.000000000 +0100+++ gcc-4.1.2-owrt/gcc/calls.c 2007-05-24 12:03:28.000000000 +0200@@ -3434,7 +3434,7 @@ for (; count < nargs; count++) { rtx val = va_arg (p, rtx);- enum machine_mode mode = va_arg (p, enum machine_mode);+ enum machine_mode mode = va_arg (p, int); /* We cannot convert the arg value to the mode the library wants here; must do it earlier where we know the signedness of the arg. */diff -Nur gcc-4.1.2/gcc/config/avr32/avr32.c gcc-4.1.2-owrt/gcc/config/avr32/avr32.c--- gcc-4.1.2/gcc/config/avr32/avr32.c 1970-01-01 01:00:00.000000000 +0100+++ gcc-4.1.2-owrt/gcc/config/avr32/avr32.c 2007-05-24 12:03:28.000000000 +0200@@ -0,0 +1,7273 @@+/*+ Target hooks and helper functions for AVR32.+ Copyright 2003-2006 Atmel Corporation.++ Written by Ronny Pedersen, Atmel Norway, <rpedersen@atmel.com>+ Initial porting by Anders 锟絛land.++ This file is part of GCC.++ This program is free software; you can redistribute it and/or modify+ it under the terms of the GNU General Public License as published by+ the Free Software Foundation; either version 2 of the License, or+ (at your option) any later version.++ This program is distributed in the hope that it will be useful,+ but WITHOUT ANY WARRANTY; without even the implied warranty of+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the+ GNU General Public License for more details.++ You should have received a copy of the GNU General Public License+ along with this program; if not, write to the Free Software+ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */++#include "config.h"+#include "system.h"+#include "coretypes.h"+#include "tm.h"+#include "rtl.h"+#include "tree.h"+#include "obstack.h"+#include "regs.h"+#include "hard-reg-set.h"+#include "real.h"+#include "insn-config.h"+#include "conditions.h"+#include "output.h"+#include "insn-attr.h"+#include "flags.h"+#include "reload.h"+#include "function.h"+#include "expr.h"+#include "optabs.h"+#include "toplev.h"+#include "recog.h"+#include "ggc.h"+#include "except.h"+#include "c-pragma.h"+#include "integrate.h"+#include "tm_p.h"+#include "langhooks.h"++#include "target.h"+#include "target-def.h"++#include <ctype.h>++/* Forward definitions of types. */+typedef struct minipool_node Mnode;+typedef struct minipool_fixup Mfix;++/* Obstack for minipool constant handling. */+static struct obstack minipool_obstack;+static char *minipool_startobj;+static rtx minipool_vector_label;++/* True if we are currently building a constant table. */+int making_const_table;++/* Some forward function declarations */+static unsigned long avr32_isr_value (tree);+static unsigned long avr32_compute_func_type (void);+static tree avr32_handle_isr_attribute (tree *, tree, tree, int, bool *);+static tree avr32_handle_acall_attribute (tree *, tree, tree, int, bool *);+static tree avr32_handle_fndecl_attribute (tree * node, tree name, tree args,+ int flags, bool * no_add_attrs);+static void avr32_reorg (void);+bool avr32_return_in_msb (tree type);+bool avr32_vector_mode_supported (enum machine_mode mode);+static void avr32_init_libfuncs (void);+void avr32_load_pic_register (void);+++static void+avr32_add_gc_roots (void)+{+ gcc_obstack_init (&minipool_obstack);+ minipool_startobj = (char *) obstack_alloc (&minipool_obstack, 0);+}+++/* List of all known AVR32 parts */+static const struct part_type_s avr32_part_types[] = {+ /* name, part_type, architecture type, macro */+ {"none", PART_TYPE_AVR32_NONE, ARCH_TYPE_AVR32_AP, "__AVR32__"},+ {"ap7000", PART_TYPE_AVR32_AP7000, ARCH_TYPE_AVR32_AP, "__AVR32_AP7000__"},+ {"ap7010", PART_TYPE_AVR32_AP7010, ARCH_TYPE_AVR32_AP, "__AVR32_AP7010__"},+ {"ap7020", PART_TYPE_AVR32_AP7020, ARCH_TYPE_AVR32_AP, "__AVR32_AP7020__"},+ {"uc3a0256", PART_TYPE_AVR32_UC3A0256, ARCH_TYPE_AVR32_UC, "__AVR32_UC3A0256__"},+ {"uc3a0512", PART_TYPE_AVR32_UC3A0512, ARCH_TYPE_AVR32_UC, "__AVR32_UC3A0512__"},+ {"uc3a1128", PART_TYPE_AVR32_UC3A1128, ARCH_TYPE_AVR32_UC, "__AVR32_UC3A1128__"},+ {"uc3a1256", PART_TYPE_AVR32_UC3A1256, ARCH_TYPE_AVR32_UC, "__AVR32_UC3A1256__"},+ {"uc3a1512", PART_TYPE_AVR32_UC3A1512, ARCH_TYPE_AVR32_UC, "__AVR32_UC3A1512__"},+ {NULL, 0, 0, NULL}+};++/* List of all known AVR32 architectures */+static const struct arch_type_s avr32_arch_types[] = {+ /* name, architecture type, microarchitecture type, feature flags, macro */+ {"ap", ARCH_TYPE_AVR32_AP, UARCH_TYPE_AVR32B, FLAG_AVR32_HAS_DSP |+ FLAG_AVR32_HAS_SIMD | FLAG_AVR32_HAS_UNALIGNED_WORD |+ FLAG_AVR32_HAS_BRANCH_PRED, "__AVR32_AP__"},+ {"uc", ARCH_TYPE_AVR32_UC, UARCH_TYPE_AVR32A,+ FLAG_AVR32_HAS_DSP | FLAG_AVR32_HAS_RMW, "__AVR32_UC__"},+ {NULL, 0, 0, 0, NULL}+};++/* Default arch name */+const char *avr32_arch_name = "ap";+const char *avr32_part_name = "none";++const struct part_type_s *avr32_part;+const struct arch_type_s *avr32_arch;+++/* Override command line options */+void+avr32_override_options (void)+{+ const struct part_type_s *part;+ const struct arch_type_s *arch;++ /* Check if part type is set. */+ for (part = avr32_part_types; part->name; part++)+ if (strcmp (part->name, avr32_part_name) == 0)+ break;++ avr32_part = part;++ if (!part->name)+ {+ fprintf (stderr, "Unknown part `%s' specified\nKnown part names:\n",+ avr32_part_name);+ for (part = avr32_part_types; part->name; part++)+ fprintf (stderr, "\t%s\n", part->name);+ avr32_part = &avr32_part_types[PART_TYPE_AVR32_NONE];+ }++ avr32_arch = &avr32_arch_types[avr32_part->arch_type];++ /* If part was set to "none" then check if arch was set. */+ if (strcmp (avr32_part->name, "none") == 0)+ {+ /* Check if arch type is set. */+ for (arch = avr32_arch_types; arch->name; arch++)+ if (strcmp (arch->name, avr32_arch_name) == 0)+ break;++ avr32_arch = arch;++ if (!arch->name)+ {+ fprintf (stderr, "Unknown arch `%s' specified\nKnown arch names:\n",+ avr32_arch_name);+ for (arch = avr32_arch_types; arch->name; arch++)+ fprintf (stderr, "\t%s\n", arch->name);+ avr32_arch = &avr32_arch_types[ARCH_TYPE_AVR32_AP];+ }+ }++ /* If optimization level is two or greater, then align start of loops to a+ word boundary since this will allow folding the first insn of the loop.+ Do this only for targets supporting branch prediction. */+ if (optimize >= 2 && TARGET_BRANCH_PRED)+ align_loops = 2;++ if (AVR32_ALWAYS_PIC)+ flag_pic = 1;++ if (TARGET_NO_PIC)+ flag_pic = 0;++ avr32_add_gc_roots ();+}+++/*+If defined, a function that outputs the assembler code for entry to a+function. The prologue is responsible for setting up the stack frame,+initializing the frame pointer register, saving registers that must be+saved, and allocating size additional bytes of storage for the+local variables. size is an integer. file is a stdio+stream to which the assembler code should be output.++The label for the beginning of the function need not be output by this+macro. That has already been done when the macro is run.++To determine which registers to save, the macro can refer to the array+regs_ever_live: element r is nonzero if hard register+r is used anywhere within the function. This implies the function+prologue should save register r, provided it is not one of the+call-used registers. (TARGET_ASM_FUNCTION_EPILOGUE must likewise use+regs_ever_live.)++On machines that have ``register windows'', the function entry code does+not save on the stack the registers that are in the windows, even if+they are supposed to be preserved by function calls; instead it takes+appropriate steps to ``push'' the register stack, if any non-call-used+registers are used in the function.++On machines where functions may or may not have frame-pointers, the+function entry code must vary accordingly; it must set up the frame+pointer if one is wanted, and not otherwise. To determine whether a+frame pointer is in wanted, the macro can refer to the variable+frame_pointer_needed. The variable's value will be 1 at run+time in a function that needs a frame pointer. (see Elimination).++The function entry code is responsible for allocating any stack space+required for the function. This stack space consists of the regions+listed below. In most cases, these regions are allocated in the+order listed, with the last listed region closest to the top of the+stack (the lowest address if STACK_GROWS_DOWNWARD is defined, and+the highest address if it is not defined). You can use a different order+for a machine if doing so is more convenient or required for+compatibility reasons. Except in cases where required by standard+or by a debugger, there is no reason why the stack layout used by GCC+need agree with that used by other compilers for a machine.+*/++#undef TARGET_ASM_FUNCTION_PROLOGUE+#define TARGET_ASM_FUNCTION_PROLOGUE avr32_target_asm_function_prologue+++#undef TARGET_DEFAULT_SHORT_ENUMS+#define TARGET_DEFAULT_SHORT_ENUMS hook_bool_void_false++#undef TARGET_PROMOTE_FUNCTION_ARGS+#define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true++#undef TARGET_PROMOTE_FUNCTION_RETURN+#define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true++#undef TARGET_PROMOTE_PROTOTYPES+#define TARGET_PROMOTE_PROTOTYPES hook_bool_tree_true++#undef TARGET_MUST_PASS_IN_STACK+#define TARGET_MUST_PASS_IN_STACK avr32_must_pass_in_stack++#undef TARGET_PASS_BY_REFERENCE+#define TARGET_PASS_BY_REFERENCE avr32_pass_by_reference++#undef TARGET_STRICT_ARGUMENT_NAMING+#define TARGET_STRICT_ARGUMENT_NAMING avr32_strict_argument_naming++#undef TARGET_VECTOR_MODE_SUPPORTED_P+#define TARGET_VECTOR_MODE_SUPPORTED_P avr32_vector_mode_supported++#undef TARGET_RETURN_IN_MEMORY+#define TARGET_RETURN_IN_MEMORY avr32_return_in_memory++#undef TARGET_RETURN_IN_MSB+#define TARGET_RETURN_IN_MSB avr32_return_in_msb++#undef TARGET_ARG_PARTIAL_BYTES+#define TARGET_ARG_PARTIAL_BYTES avr32_arg_partial_bytes++#undef TARGET_STRIP_NAME_ENCODING+#define TARGET_STRIP_NAME_ENCODING avr32_strip_name_encoding++#define streq(string1, string2) (strcmp (string1, string2) == 0)++#undef TARGET_ATTRIBUTE_TABLE+#define TARGET_ATTRIBUTE_TABLE avr32_attribute_table++#undef TARGET_COMP_TYPE_ATTRIBUTES+#define TARGET_COMP_TYPE_ATTRIBUTES avr32_comp_type_attributes+++#undef TARGET_RTX_COSTS+#define TARGET_RTX_COSTS avr32_rtx_costs++#undef TARGET_CANNOT_FORCE_CONST_MEM+#define TARGET_CANNOT_FORCE_CONST_MEM avr32_cannot_force_const_mem++#undef TARGET_ASM_INTEGER+#define TARGET_ASM_INTEGER avr32_assemble_integer++/*+ * Switches to the appropriate section for output of constant pool+ * entry x in mode. You can assume that x is some kind of constant in+ * RTL. The argument mode is redundant except in the case of a+ * const_int rtx. Select the section by calling readonly_data_ section+ * or one of the alternatives for other sections. align is the+ * constant alignment in bits.+ *+ * The default version of this function takes care of putting symbolic+ * constants in flag_ pic mode in data_section and everything else in+ * readonly_data_section.+ */+#undef TARGET_ASM_SELECT_RTX_SECTION+#define TARGET_ASM_SELECT_RTX_SECTION avr32_select_rtx_section+++/*+ * If non-null, this hook performs a target-specific pass over the+ * instruction stream. The compiler will run it at all optimization+ * levels, just before the point at which it normally does+ * delayed-branch scheduling.+ *+ * The exact purpose of the hook varies from target to target. Some+ * use it to do transformations that are necessary for correctness,+ * such as laying out in-function constant pools or avoiding hardware+ * hazards. Others use it as an opportunity to do some+ * machine-dependent optimizations.+ *+ * You need not implement the hook if it has nothing to do. The+ * default definition is null.+ */+#undef TARGET_MACHINE_DEPENDENT_REORG+#define TARGET_MACHINE_DEPENDENT_REORG avr32_reorg++/* Target hook for assembling integer objects.+ Need to handle integer vectors */+static bool+avr32_assemble_integer (rtx x, unsigned int size, int aligned_p)+{+ if (avr32_vector_mode_supported (GET_MODE (x)))+ {+ int i, units;++ if (GET_CODE (x) != CONST_VECTOR)+ abort ();++ units = CONST_VECTOR_NUNITS (x);++ switch (GET_MODE (x))+ {+ case V2HImode:+ size = 2;+ break;+ case V4QImode:+ size = 1;+ break;+ default:+ abort ();+ }++ for (i = 0; i < units; i++)+ {+ rtx elt;++ elt = CONST_VECTOR_ELT (x, i);+ assemble_integer (elt, size, i == 0 ? 32 : size * BITS_PER_UNIT, 1);+ }
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